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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmU014027; Wed, 7 Feb 2024 16:55:26 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 1/9] arm64: dts: ti: k3-am62a-main: Add sdhci0 instance Date: Wed, 7 Feb 2024 16:55:18 -0600 Message-ID: <20240207225526.3953230-2-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282738863297692 X-GMAIL-MSGID: 1790282738863297692 From: Nitin Yadav Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap values according to the datasheet[0], refer to Table 7-79. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Nitin Yadav Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 972971159a62..ce5f278235a4 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -536,6 +536,24 @@ main_gpio1: gpio@601000 { status = "disabled"; }; + sdhci0: mmc@fa10000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; + interrupts = ; + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&k3_clks 57 6>; + assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-hs200 = <0x6>; + status = "disabled"; + }; + sdhci1: mmc@fa00000 { compatible = "ti,am62-sdhci"; reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; From patchwork Wed Feb 7 22:55:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198117 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2552780dyb; Wed, 7 Feb 2024 14:56:55 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWDgyjvyHgNHHCdjVPfahi/bnMH2qAHcRlCbFYNsLkNi8PwssdnfP+Z12bvw3q/1kKy9PajT3v39i8Dha93EhGKN+G+kg== X-Google-Smtp-Source: AGHT+IEq/G2MhCDypIT/wooaToSi664iekptEwRxEgdEsghWy/1Xi6W3ijZwCY5rU8U8GA8r8OWQ X-Received: by 2002:a05:6402:614:b0:560:c888:e9e4 with SMTP id n20-20020a056402061400b00560c888e9e4mr840168edv.6.1707346615097; Wed, 07 Feb 2024 14:56:55 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346615; cv=pass; d=google.com; s=arc-20160816; b=uK/sJ+RDZEoP3qy6ZdtGeggR8wsre1x/cQTi479KW6wKtiwENSsj0H9cvWrouhCZy4 YmG5j1imZAfc7pAXWDAq50kEdTUEzGeHNxMUUeVaLm1Vrh/YVIyX5x7rv9Hx4iCKrCip PDgFIWvdnjaTf8qQpHGo6bqZMtB4a/xsr46rgGwGEWFoZRzYpf8iFKikl8yUr9Yk3LxZ ApUIX8FCvBzsN9lUw2KJpsUJgNhYul841EbUHnvn2s0mEPJADlFkn42wEttn9ZroEIkQ MrRH+IFxyyNYzYJONJAcALoc9TKE30gBj/9Rf7iD53AO0k7F4qh6xPk2CQnNmg6L6fkk djWw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=aKC3bNCwNMsnTfZxsiEGvPlTn9Qm7mUqp3b7qpQ++Lc=; fh=ntgiqg/UaqBt5gTJ1xbjr1sZXO5l2nyux6RYk9pX+no=; b=U7YVZnrPeIaXaAEzcD561vlgpilNML2FgMqZLxUetxUPnhwAVjvfwhO5xdWzHjgUcg BnKPdNiTfM+vW5NdOT3HOAeK4baCeQB+G3mEb/KtAOV/Z8iseCFjw+AYR0W1n4z5T2vM n/U69ZHQ49WtmkFmTGltavjzfjLhI44Ndv+tsaSn2ZwZ3fcmkF9CW3Sw9jV6owDTzxmW ZBUo7TRUgHYkJXjNOmHwnTehpeThD+DuIOOus2G8O1yZLdHaDFRZ9+KgjvjUwL+euyUK Y87h7u3Fx5it+e1vOg1muv/4nyQ3DHQEzQQ6kBn84bRZuD366khLKlZ7RxZah2mVszgg iQyA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OEkrITiQ; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-57277-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57277-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCXxiY4enB2bCGSc+0p8N+c6XyY6e3d3HeX6s9InAQP6QD+li8L8pEp8AeYQOI3geuP65JO9eeJi/Y2wBkijwyQmSZ8FWQ== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmV014027; Wed, 7 Feb 2024 16:55:26 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 2/9] arm64: dts: ti: k3-am62a-main: Add sdhci2 instance Date: Wed, 7 Feb 2024 16:55:19 -0600 Message-ID: <20240207225526.3953230-3-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282684434003060 X-GMAIL-MSGID: 1790282684434003060 Add sdhci2 DT node in k3-am62a-main for mmc2. Add otap/itap values according to the datasheet[0], Refer to Table 7-97. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index ce5f278235a4..6806288ec227 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -579,6 +579,30 @@ sdhci1: mmc@fa00000 { status = "disabled"; }; + sdhci2: mmc@fa20000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0xfa20000 0x00 0x260>, <0x00 0xfa28000 0x00 0x134>; + interrupts = ; + power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; + clock-names = "clk_ahb", "clk_xin"; + bus-width = <4>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; + ti,otap-del-sel-sdr50 = <0xc>; + ti,otap-del-sel-sdr104 = <0x6>; + ti,otap-del-sel-ddr50 = <0x9>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; + no-1-8-v; + status = "disabled"; + }; + usbss0: dwc3-usb@f900000 { compatible = "ti,am62-usb"; reg = <0x00 0x0f900000 0x00 0x800>; From patchwork Wed Feb 7 22:55:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198121 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2553117dyb; Wed, 7 Feb 2024 14:58:00 -0800 (PST) X-Google-Smtp-Source: AGHT+IHHpzWiGgg1tpimw6qyUBnv2cFutggMHhSEwAtLGYnIY2HEeTEaP75coLseOPLMy3QOVeoR X-Received: by 2002:a17:907:7810:b0:a38:10d8:215e with SMTP id la16-20020a170907781000b00a3810d8215emr4150524ejc.23.1707346680589; Wed, 07 Feb 2024 14:58:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346680; cv=pass; d=google.com; s=arc-20160816; b=u4LQPhnrZuIX17+EOprAxKSCBk71iSKmKbtom+hpAd8Isq+unRGiIyU1ucukJXS2YG 1wuiD8PzAmRj8M6mt2tK1e0TESYrJfBcF6xFc2HNl/bMOiP2BDG5xbAGwig5L2X0xl0a StllKS+XtCiPOVGLW9ZLbvVHf5Hx5G5jYUo5cbmafU+znzYuLNH6soc4k4Zvq7d+qBMt /sVUt4PFnQCgeUvz1d1mb1Hx05dPzrPSQq9qYITipZvPYJ1nZZINoBF5YRHrjaS70cqT YrlyagqoU//xQH4mKYe7d73yjmGql36JBOiQpTMBYJscIbhGx3M1GzFC+jUPI6cHGJsS uaDQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=gjIQkQk0XyLlWC62YyfoYsqGsstVP1Jl1mRAtlNrcmg=; fh=fSNHiW1yfTa4rwSK+uns1xMhqX2JRnxRfnk1uY7K3AU=; b=SttawPwBBiaew7QySkkP+96iMvMaC+gOdL0t9KWYIEI1Vzc/nZrifvZqIqeJywN5Gk iQlMcObuzwEuO6n9fAcf3kKDNX95l7rICyRChY/uTRgw6FGRG4r1Sr7gkBii4HmQxAuQ 18w3kzpfhYh4mx9QW0LI9hpfLjAZ6s+Zp8LOUlMxeyNHj9Q7xMVqK7BY72xPf5XvtTKs 9z7AAe+//zG+IJM3TsM1EU7WbROJG/26ZyZjeQO1ewdTMyTOEV/mMbEzBg5HN69CffK+ fOzFTp0TSspV/ezyokRsH4Pi5Iai8pBY2NTRul5uoOn4GalbRI3GCu2wrRq/SLE8YNF0 Pn7w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=p4a1smpo; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-57283-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57283-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCWLlVMm9TcYmTO8ea+T9QGaVfDBmbHAKqnNg/or0s75xUPAmG9iKOAEgU1HgIzQMIrp2bzNBC6QFPr0Y8oObqbNRLr9iA== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmW014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 3/9] arm64: dts: ti: k3-am62a7-sk: Enable eMMC support Date: Wed, 7 Feb 2024 16:55:20 -0600 Message-ID: <20240207225526.3953230-4-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282753021130368 X-GMAIL-MSGID: 1790282753021130368 From: Nitin Yadav Add support for 32GB eMMC card on AM62A7 SK. Includes adding mmc0 pins settings. Add mmc0 alias for sdhci0 in k3-am62a7-sk.dts. Signed-off-by: Nitin Yadav Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 26 +++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index f5ae91bf1bdb..c99b2e90f76d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -20,6 +20,7 @@ aliases { serial0 = &wkup_uart0; serial2 = &main_uart0; serial3 = &main_uart1; + mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -263,6 +264,22 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ >; }; + main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ + AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ + AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ + AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ + AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ + AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ + AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ + AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ + AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ + AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ + >; + }; + main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ @@ -550,6 +567,15 @@ &main_i2c2 { clock-frequency = <400000>; }; +&sdhci0 { + /* eMMC */ + status = "okay"; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc0_pins_default>; + disable-wp; +}; + &sdhci1 { /* SD/MMC */ status = "okay"; From patchwork Wed Feb 7 22:55:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198120 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2553050dyb; Wed, 7 Feb 2024 14:57:48 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVkbkoJEgzPjlcRPCQG0w4vO4bhkHx/PPWR5tF5fOkwNlR1FQmrsxZZWtRHKeVt4tb2lV8YdTj4N+NENkauQCa3Z4DdQA== X-Google-Smtp-Source: AGHT+IHEqWZEnq86Ifbc8Z4urClOO2ZRCHmnyBdP0harlVp3RUF7dEEn+pIzz0QOV+NHrLRrqsQh X-Received: by 2002:a05:6830:2b06:b0:6e2:b467:f9a2 with SMTP id l6-20020a0568302b0600b006e2b467f9a2mr6622354otv.7.1707346668232; Wed, 07 Feb 2024 14:57:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346668; cv=pass; d=google.com; s=arc-20160816; b=tbBjBsE93E96v7URTwyuf2vjY2PKBJXYKZR0HOg89BghaHx+WHeDOYT0d6A2bXmSYM 3eQCn96FMvqKONQgxzmmH3zIhkX3xEsVc6/O/KyrMxhd7MIWAejo9HmEcr6n4ZnDKCCe MBA6DIa+3tWZ1a+kVrH7dTz3xBmM2Aln+URxSVI+wy/htGuFoyclPYChgk+MEQX46Jhx jG+VUhnsVOqx37dotFz9iDMrRqqN0hC9Di8y3cGHyt8N6Qnw2e62ENVb/rIBTfihtneN FoecZNssaxQqZH8UPClLlE8M8Ns7OHAkIC2ze6W4BXLSiGHiMN3nGFGUi7j/Mcg6S1mb Oa1w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=hUydIEOTuqHDfvM49AYx6tel8EOPS7VljbOdHOCBU1Q=; fh=rmNQusYta8SfhBNwfy/WBfTL13x11Dp0/D5XHy+fgug=; b=zh4sodQM6jZma44Vsu2VCHtEnUOsdhtfDzliMdNN0Y46TyMjhdgJxK3dHOb8EIfJoq nTLxbeacpF1uTaGArQeVdCXOkZEs2aCdvVwXxovGTI6ho15FG/ZGAIu8tB0RVjKW3pJC qzHS9LXIX/kIfTC7rgrpJeiRxOH7uvpZa8t/tu38lixVe4W2mwwp3zvJlAae43SPuTQ4 A4Y97CLLqZ704VGOVrb1ECH+bT6Iu6mqPw9ftZwLfiYFSlW76Go4Tr8a/+0ENS3gFZi3 zdV8eG8d0Gb5GlBaXl8+wNNCTkXsbgXs4qqMZwsdimDKWdzJ4QqWKWCprQd4Qg/S+gtB PnHA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="jJ/FWzQG"; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-57281-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57281-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCVq+ry2nfvdP2lwumyxydk/uakTwJjX+hNc8DNyTiiOFXhf2nP5qtoh+XtMCxoi022rFTDxFYGF30vwxkBXdtHa0RwYzg== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmX014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 4/9] arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC Date: Wed, 7 Feb 2024 16:55:21 -0600 Message-ID: <20240207225526.3953230-5-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282740238517306 X-GMAIL-MSGID: 1790282740238517306 Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1. [0] https://www.ti.com/lit/ds/symlink/am6442.pdf Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index ddd382a0d735..9bfa0a969bfc 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -633,6 +633,9 @@ sdhci0: mmc@fa10000 { ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-ddr52 = <0x6>; ti,otap-del-sel-hs200 = <0x7>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; + ti,itap-del-sel-ddr52 = <0x3>; status = "disabled"; }; @@ -645,12 +648,16 @@ sdhci1: mmc@fa00000 { clock-names = "clk_ahb", "clk_xin"; ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-sd-hs = <0xf>; + ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-sdr104 = <0x6>; ti,otap-del-sel-ddr50 = <0x9>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; ti,clkbuf-sel = <0x7>; status = "disabled"; }; From patchwork Wed Feb 7 22:55:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198116 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2552713dyb; Wed, 7 Feb 2024 14:56:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IGUiF45D7NDE34d2urwBaaadXgHiRPNnA3AtkYDdzD+hhYcEDd+cHGVnnRlsuzmdc3Xkq9Y X-Received: by 2002:a17:906:40c8:b0:a38:3815:5346 with SMTP id a8-20020a17090640c800b00a3838155346mr4416064ejk.30.1707346602764; Wed, 07 Feb 2024 14:56:42 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346602; cv=pass; d=google.com; s=arc-20160816; b=HH7O8OcWLwS8YGiwRP2LlbceZRuE/xB73ZIrYXijtjnL9bLjJyOdT76159mo5wqwf5 wC2VPl+1vk3UpGMe5iDRYUxN4a7rvz3sONJ7XWbgh9hgXat8NNoMxGzRKildSSE9DWJT drFwSXWWkUPPffrRCT6BmS9+3GuzWrfrtgT92BpjbJRSvpVYAjS+Sg+WBaiY73j1vwt+ ykyEwcTfyhO9b3cmkrFZn7+y9loH5X4P5Lsp7v3icekza7+P7dBIM5cqjiknO/f6LRqM +pkNVuCtGBH9NDLXR1AvAW9I3/asciC+4yYkjhNEqq/t86DKlX0UCb5lzvpM4dDge+lI j3EQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=SsPXo9SU5AZfR9W25lHGx7P3x7huSy5Ek3nDYu+grKw=; fh=/M2D9mTm9yPEzrG1eG/yXoKmCTz8dEwrN8v+BET7dV0=; b=WahblihBioZS3mnJ4Gkpy4phQ4gfpI27Ty0U7gJhn2u7+p/FAFexzycRwWhdjiHZfI fPiHjjppBl9Hpabfj3Gy2qbY7UKiWgGZcU1eHjx9pc9II3lYp9P3zupCLsJo0Uxm3c2t 2Dl6tjCEACHWM7zjPa0kEvaRBXW7fLhhZzGpDRHI6hbKQUbY1ZkfnLH8Os3txYcLUX9h Naa/e+L7ht6nNIqkkQykQ+2sIRwXTI6ys05QvCHk1T50ZSzEs7FRB7Qc8TvmehFy+q8g oUDYFuDZTAaRc43w8ytcvgtGNCd5U0lb/42CgjgB56MorfRl7XyJMlmsfifHhYpfmCe7 fvEw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aHCGenfS; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-57276-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57276-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCW0eQ3Q3AnTI7VAwZAU4Ut645cvQM3pyRSWF41+/k/lYqQPLQkl0nvfohVFrkmYURmPQ26OJA/pWdtHTpAMFvDxEMM7xg== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmY014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 5/9] arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC Date: Wed, 7 Feb 2024 16:55:22 -0600 Message-ID: <20240207225526.3953230-6-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282671134888289 X-GMAIL-MSGID: 1790282671134888289 Add OTAP/ITAP values to enable HS400 timing for MMC0 and SDR104 timing for MMC1/MMC2. Remove no-1-8-v property to enable the highest speed mode possible. Update MMC OTAP/ITAP values according to the datasheet [0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2. [0] https://www.ti.com/lit/ds/symlink/am62p.pdf Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 44 +++++++++++++++++++++-- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 1 - 2 files changed, 41 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index ef1c982a90d8..e43530beb79f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -534,7 +534,21 @@ sdhci0: mmc@fa10000 { clock-names = "clk_ahb", "clk_xin"; assigned-clocks = <&k3_clks 57 2>; assigned-clock-parents = <&k3_clks 57 4>; - ti,otap-del-sel-legacy = <0x0>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + ti,clkbuf-sel = <0x7>; + ti,strobe-sel = <0x77>; + ti,trm-icp = <0x8>; + ti,otap-del-sel-legacy = <0x1>; + ti,otap-del-sel-mmc-hs = <0x1>; + ti,otap-del-sel-ddr52 = <0x6>; + ti,otap-del-sel-hs200 = <0x8>; + ti,otap-del-sel-hs400 = <0x5>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; + ti,itap-del-sel-ddr52 = <0x3>; status = "disabled"; }; @@ -545,7 +559,19 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - ti,otap-del-sel-legacy = <0x8>; + bus-width = <4>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; + ti,otap-del-sel-sdr50 = <0xc>; + ti,otap-del-sel-ddr50 = <0x9>; + ti,otap-del-sel-sdr104 = <0x6>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; status = "disabled"; }; @@ -556,7 +582,19 @@ sdhci2: mmc@fa20000 { power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; - ti,otap-del-sel-legacy = <0x8>; + bus-width = <4>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; + ti,otap-del-sel-sdr50 = <0xc>; + ti,otap-del-sel-ddr50 = <0x9>; + ti,otap-del-sel-sdr104 = <0x6>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 95a0146279b1..8c73587b0b62 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -424,7 +424,6 @@ &sdhci1 { pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; - no-1-8-v; bootph-all; }; From patchwork Wed Feb 7 22:55:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198123 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2553152dyb; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmZ014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 6/9] arm64: dts: ti: k3-am6*: Remove DLL properties for soft PHYs Date: Wed, 7 Feb 2024 16:55:23 -0600 Message-ID: <20240207225526.3953230-7-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282761240338014 X-GMAIL-MSGID: 1790282761240338014 Remove DLL properties which are not applicable for soft PHYs since these PHYs do not have a DLL to enable. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 3 --- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 3 --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 1 - arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 1 - arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 - arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 - 9 files changed, 14 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index fe0cc4a9a501..79ed5cbbbda1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -561,7 +561,6 @@ sdhci0: mmc@fa10000 { assigned-clock-parents = <&k3_clks 57 8>; mmc-ddr-1_8v; mmc-hs200-1_8v; - ti,trm-icp = <0x2>; bus-width = <8>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; @@ -580,7 +579,6 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -604,7 +602,6 @@ sdhci2: mmc@fa20000 { power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; - ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index 3b4246ce49de..bb6a5837bcb3 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -819,7 +819,6 @@ &sdhci0 { bootph-all; pinctrl-names = "default"; pinctrl-0 = <&emmc_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; status = "okay"; }; @@ -832,7 +831,6 @@ &sdhci1 { vmmc-supply = <&vdd_3v3_sd>; vqmmc-supply = <&vdd_sd_dv>; - ti,driver-strength-ohm = <50>; disable-wp; cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; cd-debounce-delay-ms = <100>; @@ -849,7 +847,6 @@ &sdhci2 { ti,fails-without-test-cd; cap-power-off-card; keep-power-in-suspend; - ti,driver-strength-ohm = <50>; assigned-clocks = <&k3_clks 157 158>; assigned-clock-parents = <&k3_clks 157 160>; #address-cells = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 6806288ec227..f283777d54b4 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,7 +561,6 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index c99b2e90f76d..f241637a5642 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -582,7 +582,6 @@ &sdhci1 { vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 8c73587b0b62..5c9b73726ebd 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -422,7 +422,6 @@ &sdhci1 { vqmmc-supply = <&vddshv_sdio>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi index 6dd496cd459a..3c45782ab2b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -411,7 +411,6 @@ &sdhci0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; }; @@ -421,7 +420,6 @@ &sdhci1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 9bfa0a969bfc..a29847735c6e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -646,7 +646,6 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names = "clk_ahb", "clk_xin"; - ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 5c546ae76d3e..f308076d608a 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -508,7 +508,6 @@ &sdhci1 { pinctrl-names = "default"; bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index cce04e188ff6..b286eaa02ada 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -471,7 +471,6 @@ &sdhci1 { pinctrl-names = "default"; bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; disable-wp; }; From patchwork Wed Feb 7 22:55:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198115 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2552692dyb; Wed, 7 Feb 2024 14:56:39 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXr+Wfjj29qK81OO98iP2aZRw/PW4zG5tF6OoMei3UfIWDOP564Zk3I7wj+02vkgbrFQSuEKAIJoUemjTExk6xbog0rKA== X-Google-Smtp-Source: AGHT+IHAxAnu6sF/T9NkeJjtsHGvx4eJydqcnXtgN7vSngX+dFM+je/Eo/leoQYstGSJgIwopIy8 X-Received: by 2002:a05:6870:390e:b0:218:dc16:1d0a with SMTP id b14-20020a056870390e00b00218dc161d0amr7795928oap.13.1707346599589; Wed, 07 Feb 2024 14:56:39 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346599; cv=pass; d=google.com; s=arc-20160816; b=KMqxswrGJlZqb6l/Z9n2jwCXvMjhQ9oyuksj6enj7V0ZgA9tWgYkq0Q0thoJ9HEz/f 47D2b+kNIuzqmMMxaoUfBhQLnoNzRFeG7j94Js4nr+7jBqeeopF6T1d02pae07LEZrUX A7S5vTllqYWIKfVkPbnoHepLuR88ju8XTyoUWpSKLajSV31pJCf151QKHbrAXm95g/6v A2o8RjU74u2ITM0oqVfR7q/ZHPRDlXNUmhrFd8LuTsX/Kj6KRWUa5gtcXvvNgOk8wZ7C GBSFeXVG9jHdAOZArHL/LRFHWYzwYdBKrgBy3kDAG2d7c++qhVC9oKG1UMGln4YxksWo TBzQ== ARC-Message-Signature: i=2; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQma014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 7/9] arm64: dts: ti: k3-am6*: Fix ti,clkbuf-sel property in MMC nodes Date: Wed, 7 Feb 2024 16:55:24 -0600 Message-ID: <20240207225526.3953230-8-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282667892080120 X-GMAIL-MSGID: 1790282667892080120 Move ti,clkbuf-sel property above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if ti,clkbuf-sel is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing ti,clkbuf-sel for MMC0 in k3-am64-main. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 79ed5cbbbda1..410b390ce5d5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -579,6 +579,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; + ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -590,7 +591,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; - ti,clkbuf-sel = <0x7>; bus-width = <4>; status = "disabled"; }; @@ -602,6 +602,7 @@ sdhci2: mmc@fa20000 { power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; + ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -613,7 +614,6 @@ sdhci2: mmc@fa20000 { ti,itap-del-sel-sd-hs = <0xa>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; - ti,clkbuf-sel = <0x7>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index f283777d54b4..ddb76cd66f88 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,6 +561,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; + ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; @@ -572,7 +573,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - ti,clkbuf-sel = <0x7>; bus-width = <4>; no-1-8-v; status = "disabled"; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index a29847735c6e..bea05be7cb48 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -628,6 +628,7 @@ sdhci0: mmc@fa10000 { clock-names = "clk_ahb", "clk_xin"; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; @@ -646,6 +647,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names = "clk_ahb", "clk_xin"; + ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; @@ -657,7 +659,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - ti,clkbuf-sel = <0x7>; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmb014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 8/9] arm64: dts: ti: k3-am6*: Fix bus-width property in MMC nodes Date: Wed, 7 Feb 2024 16:55:25 -0600 Message-ID: <20240207225526.3953230-9-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282713458347964 X-GMAIL-MSGID: 1790282713458347964 Move bus-width property to *main.dtsi, above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if the bus-width property is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing bus-width for MMC2 in k3-am62-main. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 1 - arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 -- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 - 6 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 410b390ce5d5..55420eb1c620 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -559,9 +559,9 @@ sdhci0: mmc@fa10000 { clock-names = "clk_ahb", "clk_xin"; assigned-clocks = <&k3_clks 57 6>; assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; - bus-width = <8>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; @@ -579,6 +579,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; + bus-width = <4>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; @@ -591,7 +592,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; - bus-width = <4>; status = "disabled"; }; @@ -602,6 +602,7 @@ sdhci2: mmc@fa20000 { power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; + bus-width = <4>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index bb6a5837bcb3..a34e0df2ab86 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -842,7 +842,6 @@ &sdhci2 { vmmc-supply = <&wlan_en>; pinctrl-names = "default"; pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>; - bus-width = <4>; non-removable; ti,fails-without-test-cd; cap-power-off-card; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index ddb76cd66f88..253c1857eedf 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,6 +561,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; + bus-width = <4>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; @@ -573,7 +574,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - bus-width = <4>; no-1-8-v; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index bea05be7cb48..bc9c9ff993e6 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -626,6 +626,7 @@ sdhci0: mmc@fa10000 { power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 57 0>, <&k3_clks 57 1>; clock-names = "clk_ahb", "clk_xin"; + bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; ti,clkbuf-sel = <0x7>; @@ -647,6 +648,7 @@ sdhci1: mmc@fa00000 { power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names = "clk_ahb", "clk_xin"; + bus-width = <4>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index f308076d608a..83f2b00726b5 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -494,7 +494,6 @@ eeprom@0 { /* eMMC */ &sdhci0 { status = "okay"; - bus-width = <8>; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -506,7 +505,6 @@ &sdhci1 { status = "okay"; vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; - bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index b286eaa02ada..67cd41bf806e 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -469,7 +469,6 @@ &sdhci1 { status = "okay"; vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; - bus-width = <4>; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; }; From patchwork Wed Feb 7 22:55:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 198122 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2553129dyb; Wed, 7 Feb 2024 14:58:03 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUFcd6tuBuph1PzvIjiZ8hiLS3uvwrokuxFFU8x/XCCj1fzgRgIS+nR46J3gkw1enbLgyQWbedHegmnFvfgldZxevZewA== X-Google-Smtp-Source: AGHT+IHLHY+NF+hDD4Aj+T3x3Qtlc8537HOkpauhTnoK82h7qgDSp8SkE5v09HkSNV83zyTpDavN X-Received: by 2002:a05:6a00:180f:b0:6e0:5037:4597 with SMTP id y15-20020a056a00180f00b006e050374597mr5487288pfa.18.1707346683749; Wed, 07 Feb 2024 14:58:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346683; cv=pass; d=google.com; s=arc-20160816; b=a8NuKe0KymBiPwl0ELbrBewYuZrn1L1woHbXhb8bA/oBwBMsiQHK9L7AX4IYWdA6lD Mre5LgiINDoHNrUhh3OQQ+sUrgtrUeeMHdyApiv7n0PpppbOjRSLEp2nlxHYXBySHpV0 3zOYH7zBouVCUH2R/7UKagmIGxWj8pmCisXMcmvfl/bdylV/tMx51e/XHjwm3bNdy7bh tGT7mvtbLuBxz7JhSj1hdIfHkeUTtSPWzxZ5FTbdG/gXq4rmaUmcWnDw2xGg62hNwd2F h2z2qBzMSpG2S1sQ64Bdi3ffBduTjGOI4j1wmVGQzKQsNHXjsoWDzeO6RK4275f7ui5d dsjg== ARC-Message-Signature: i=2; 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Wed, 7 Feb 2024 16:55:26 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmc014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 9/9] arm64: dts: ti: k3-am6*: Fix bootph-all property in MMC node Date: Wed, 7 Feb 2024 16:55:26 -0600 Message-ID: <20240207225526.3953230-10-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282755968356746 X-GMAIL-MSGID: 1790282755968356746 Add missing bootph-all property for AM62p MMC0 and AM64x MMC0 nodes. Move the location of bootph-all property in MMC1 for k3-am62p5-sk to match Sitara board files. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 3 ++- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 5c9b73726ebd..17c6c2fc0e09 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -410,6 +410,7 @@ &main_i2c2 { }; &sdhci0 { + bootph-all; status = "okay"; ti,driver-strength-ohm = <50>; disable-wp; @@ -417,13 +418,13 @@ &sdhci0 { &sdhci1 { /* SD/MMC */ + bootph-all; status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vddshv_sdio>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; - bootph-all; }; &cpsw3g { diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 83f2b00726b5..84619782e52d 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -493,6 +493,7 @@ eeprom@0 { /* eMMC */ &sdhci0 { + bootph-all; status = "okay"; non-removable; ti,driver-strength-ohm = <50>;