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Wed, 7 Feb 2024 12:23:24 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 1AE71C0000EA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337404; bh=dD5CiEBNHUt0N9vBp3Iuh/sIzIg6rQGjDXZDEISTQvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j+L+Xr5u5YndSrR2wOyMNOhK7B/MmGQXbh9Bfpn2CU/l57PH0ocqBmRVUbSeBvEK4 O6NHVXs9CQ3os+3gVuuqteEpWkswLyzs/62d7Z0wBLcRdnvmrTZ3szKxYrUxMbXuVI jV58wuEvooE537rPfKq6i8ruIuxumwpiGNNSuE/A= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 751F518041CAC4; Wed, 7 Feb 2024 12:23:22 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Rob Herring , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 01/12] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs Date: Wed, 7 Feb 2024 12:22:46 -0800 Message-Id: <20240207202257.271784-2-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790277852385431059 X-GMAIL-MSGID: 1790277852385431059 Update the descriptions to reflect different families of broadband SoC and use the general name bcmbca for ARM based SoC. Remove the requirement of interrupts property to reflect the driver code and only require interrupt-names when interrupts property present. Also add myself to the list of maintainers. Signed-off-by: William Zhang Reviewed-by: David Regan Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli --- Changes in v5: - Add reviewed-by tag Changes in v4: - Split the yaml changes into three patches. This is the first one Changes in v3: - Update brcm,nand-use-wp description - Revert the description change to BCM63168 SoC-specific NAND controller Changes in v2: - Revert the new compatible string nand-bcmbca - Drop the BCM63168 compatible fix to avoid any potential ABI incompatibility issue - Simplify the explanation for brcm,nand-use-wp - Keep the interrupt name requirement when interrupt number is specified .../devicetree/bindings/mtd/brcm,brcmnand.yaml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index f57e96374e67..e54ca08a798a 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller maintainers: - Brian Norris - Kamal Dasu + - William Zhang description: | The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND @@ -18,9 +19,10 @@ description: | supports basic PROGRAM and READ functions, among other features. This controller was originally designed for STB SoCs (BCM7xxx) but is now - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and - iProc/Cygnus. Its history includes several similar (but not fully register - compatible) versions. + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus. + Its history includes several similar (but not fully register compatible) + versions. -- Additional SoC-specific NAND controller properties -- @@ -53,7 +55,7 @@ properties: - brcm,brcmnand-v7.2 - brcm,brcmnand-v7.3 - const: brcm,brcmnand - - description: BCM63138 SoC-specific NAND controller + - description: BCMBCA SoC-specific NAND controller items: - const: brcm,nand-bcm63138 - enum: @@ -177,6 +179,8 @@ allOf: - const: iproc-idm - const: iproc-ext - if: + required: + - interrupts properties: interrupts: minItems: 2 @@ -189,7 +193,6 @@ unevaluatedProperties: false required: - reg - reg-names - - interrupts examples: - | From patchwork Wed Feb 7 20:22:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198113 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2550432dyb; Wed, 7 Feb 2024 14:50:12 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUde5qI9cEc/W15oQKbO9Yyfi4xuxBnaafb83g5Uxma5/IJcpbmMC9clPQ2lpQUxolyBxFxm9WB3C2UI7gp1HU2k8BavA== X-Google-Smtp-Source: AGHT+IFpIilXMOctLH6chDIH6CNiJtKArbg9lZzpCTs/MgzqXCwpzknrSIQPPNwQ1rBJb4OyrdfH X-Received: by 2002:ac8:4d89:0:b0:42b:ff73:504a with SMTP id a9-20020ac84d89000000b0042bff73504amr6642412qtw.54.1707346212721; Wed, 07 Feb 2024 14:50:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346212; cv=pass; d=google.com; s=arc-20160816; b=n25qkUrWipSro0APBvMZAlV78AvXgUwM3B5WvwmZRcUXkP1uRYl1BXbgVlCI2jgiyl 2I/QgVYtf+Y8/2gO/XWbv7X/a65Nd6ooFjVyLQrOYMjxkVCNG2WXoN31EeKWomRpaNEp ZGVq2ssAY+uV6Z9cjp3O6aJETnC98+KSpSHCr/sMibgTCGYObPr5HdPkbVY0XbsUQfcv UoyrXFh9KxZpStZu/KLyVQH4BFdrLLmuTQHtUoE4em7bkNQ17EtfVNxp6pbpVVu0RSZs 0lfDt2S8UUvhX8u4ytkWezormGxyBCi4Qx/3c5bQLPXWE3YfmbRSOOqqgonNvvGZ8zSa dVOg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=4cPlpetHf4jOUPiyQ82kaHmfJU2jbdMOkAcgR51B9aw=; fh=nHoa4UeRC15vUSwQggIEPbC6L8UT1xdrwtHevipfVwg=; b=ZdPdTRnJ5n4GrXzlNLif6OeTV0L+mzMNfYK+tU7k7YggSsOEBvS5Qm7/RbzCoQNQrr c5oiEbsHjVVZ3MNU0Agrl0QR+gQRnFyhFWh3iPZUmdg+kBh023skFsF08II7knAy5CgI cqxFSHTuNnt1ohM8UhYhegNmKpU7RsBRI4m+xmN4NfEGuyddYLQ/iH151/XpyZRj139y +pOtbHEEsx642ipbF7wxEInSdMmnknX6mDecrcKHMau+dx0O30ZkHQmaMHd5eIuQ56q5 DJnIWHYZeXqNdPixSiXtLYKBxyOwX2K1xKrLghI0kWsSg0nczBptCxPBqc5QS+8vSNRF mATA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=EYzpPF1G; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57013-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57013-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCXGLDAJ+4xyI2eGUDBO1OJsTBvHZip9WMZuZLuBULtKZrFAEtUxPGO0AWFo+DI9/dh03CrJ4eGK2By2tl4gl0g6Z0Jgug== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 7 Feb 2024 12:23:28 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 2EDA4C002E04 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337408; bh=2MG0NMfZmd9Qh5xJzY5hxI6VpQVPWSkYrqSpDO/Rr3I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EYzpPF1GgnNk+wK9Irbe1dqf5j3sQScSLPH2Lb/2SVXjMZvC5Jv3HDhJc3iLNRfje ntpUky6sT01Bf1ahwUXVjvc1e/oD12IWxAu22jLsHC/XRZYe6m+PjQ4dNgDAvkeVFa ztY6/vkzUFHiSsxtTbY/MEdkenxVn515hsZ8TMcY= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id A7FE018041CAC4; Wed, 7 Feb 2024 12:23:26 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 02/12] dt-bindings: mtd: brcmnand: Add WP pin connection property Date: Wed, 7 Feb 2024 12:22:47 -0800 Message-Id: <20240207202257.271784-3-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790282262185464300 X-GMAIL-MSGID: 1790282262185464300 Add brcm,wp-not-connected property to have an option for disabling this feature on broadband board design that does not connect WP pin. Signed-off-by: William Zhang Reviewed-by: Conor Dooley Reviewed-by: Florian Fainelli --- Changes in v5: - Update the description of this new property Changes in v4: - Move the WP pin property to this separate patch and change it to boolean type. Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index e54ca08a798a..6a717bcedfd3 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -113,6 +113,13 @@ properties: earlier versions of this core that include WP type: boolean + brcm,wp-not-connected: + description: + Use this property when WP pin is not physically wired to the NAND chip. + Write protection feature cannot be used. By default, controller assumes + the pin is connected and feature is used. + $ref: /schemas/types.yaml#/definitions/flag + patternProperties: "^nand@[a-f0-9]$": type: object From patchwork Wed Feb 7 20:22:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198131 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2580691dyb; Wed, 7 Feb 2024 16:03:52 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUc7/Pnkc2rDrbPZfJhI27uWD6OHNZZVJ/72FSZDzzzCQusqdQg00VAgLF1xJBJpOVvyRCHjUnYEzWC/yjfM0HYH8rW1Q== X-Google-Smtp-Source: AGHT+IE08TJZHds6MGY1gTDt4896vdEgwOorWxV/DDskDMYOb7PkFRaNJpG88SF5/ydCASkHYCgq X-Received: by 2002:a17:902:e746:b0:1d9:a3f4:6452 with SMTP id p6-20020a170902e74600b001d9a3f46452mr7460946plf.23.1707350632354; Wed, 07 Feb 2024 16:03:52 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707350632; cv=pass; d=google.com; s=arc-20160816; b=jDXBPOHwz8wnXuCJn3iZaTRQ/pyj/on/FQKcWN4MQUyACWGjbucYbWUM8b3VtuqvGH yk4caDJ5crn+OBF2LAPWWje9wv5fY9/4wJuD9KepLZNuUk8qqvnI8udXa6ksjgerMd9d egpWO6YaU0/Pkv6tR4RRb1+JOPLzEGOU5yfKz1WoAsoUqwec44sGV91UwLjK44Uxn+sL bc1CLdIjHm83UmP+mF0h5yK8r5xyZnhOZrtGDwPilUUQZ75nbnElfGGvmcnoEzmUWGH5 9eDYwogd41GrPTUgCKaRztHdf43PV+6C4bCsIL2ofCSqYq/oQ7gmL2bbpN+nDuoese7I CCxg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=mKzxWW0mGxIoPonH39yER9sLg7y5VlCXxSuwsmgHDpU=; fh=YbZU+n6IzwM2BlijNJgEMVUOdSp4aSDk38aHM1IFeeo=; b=oI12cqNqTuO5byNUbrRhuX8V450PPW5JH7y6ysFTN1KcB1VmT6i1nGusudhEhVlXiO kE+W3ZM7bw/g0jz3ib96YFzUDlWtvn9Dh6viTI1R4FiLFxRkwhg1fQFXzYiO9jaopAsm TqLfNzEEf2uHFz/8Z1uMrXjFqZ3k2+cKnfszJkUBc8G+P18DESWogi5edKuhAz5kwk9q sfgNG3NjkEj0yjBC9hlfV9NtaCOhdFyUeVQtL7GEa93ZChp4jRacZt2Id2BB5mLmteZS D8h5CjO65xsGyV886YujIu+FRx80sX6EOg8TqZ/ZJjvQ91WuqMHDu4bJtXGqV1sMLrEN wagg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=Ix1v4o9b; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57014-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57014-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCVrV5E/AxHpwJlJW3uXx/y9TV9nUWmdBrmoqRBuA7cm8cW6YWcaIXHBGI+CZQTVyUUBLwg7Dt5s/uZLRfW9boSXn6vthA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wed, 7 Feb 2024 12:23:35 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 2C616C002E08 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337415; bh=tkkKLCiY+CmMh/9fyV9TP9Qpf1i/v+KHxHF98/KxN+U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ix1v4o9bKQFqE4Iq/7WQfxDfx2qYveU8FtEqQHEPNaNYdCYT5IM5bJE59Thpp+1fU N3mVgwVY7/aetVlvupau5v6F1Xu2oNkutjYM1hhd9zaNT5Y6NSwhag2LcWJoyOiZAU 9dnxC7ZPD4zTY1BFOQRaD+dmuN/wsu05Rn1R5w/Y= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id BB3FF18041CAC4; Wed, 7 Feb 2024 12:23:33 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 03/12] dt-bindings: mtd: brcmnand: Add ecc strap property Date: Wed, 7 Feb 2024 12:22:48 -0800 Message-Id: <20240207202257.271784-4-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790286896360924168 X-GMAIL-MSGID: 1790286896360924168 Add brcm,nand-ecc-use-strap to get ecc and spare area size settings from board boot strap for broadband board designs because they do not specify ecc setting in dts but rather using the strap setting. Signed-off-by: William Zhang Reviewed-by: Conor Dooley --- Changes in v5: - Update the description for this ecc strap property - Add check to make sure brcm,nand-ecc-use-strap and nand-ecc-strength/brcm,nand-oob-sector-size can not be used at the same time Changes in v4: - Move ecc strap property to this separate patch and remove some non-binding related text from the description Changes in v3: None Changes in v2: None .../bindings/mtd/brcm,brcmnand.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index 6a717bcedfd3..52a4c993b6f1 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -146,6 +146,13 @@ patternProperties: layout. $ref: /schemas/types.yaml#/definitions/uint32 + brcm,nand-ecc-use-strap: + description: + This property requires the host system to get the ECC strength + and step size from the SoC NAND boot strap setting. This is a + common hardware design on BCMBCA based boards. + $ref: /schemas/types.yaml#/definitions/flag + unevaluatedProperties: false allOf: @@ -195,6 +202,18 @@ allOf: required: - interrupt-names + - if: + patternProperties: + "^nand@[a-f0-9]$": + required: + - brcm,nand-ecc-use-strap + then: + patternProperties: + "^nand@[a-f0-9]$": + properties: + nand-ecc-strength: false + brcm,nand-oob-sector-size: false + unevaluatedProperties: false required: From patchwork Wed Feb 7 20:22:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198114 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2550840dyb; Wed, 7 Feb 2024 14:51:16 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCU0T1AmjnRYssTQCfQauihQikfa3I6yRmWAobGdumGgyqNv6buP1bhT3b0cBHW6A1olJWLX+OPkC3R0+MZt9QP2uTU3eQ== X-Google-Smtp-Source: AGHT+IFZjKOUyogDLQ01zMO67LiuS9uJ9TaTGHyX89GgVqSQtuz9eBsABGsq3Bk8mnQpFB8Uo6mF X-Received: by 2002:aa7:d846:0:b0:55f:e147:2524 with SMTP id f6-20020aa7d846000000b0055fe1472524mr4999677eds.38.1707346276104; Wed, 07 Feb 2024 14:51:16 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707346276; cv=pass; d=google.com; s=arc-20160816; b=vwfFAminN4ZsUniLM9hCBuM/2WacxQroa4voyN8fl9uG29LwBmI9oOgz1xoUIetVQ1 HFnVutWG1H+GemCAj8KRJHz4kPg7RUG4cd1L6sEJ5DLvMeIrFXRbtQowU8bj+nuXzgGi OiqQUGNyEx0fEDLcdnCwzcXL5j23R3/pWgkzAGACeFRqhrWZIqxW6hiapZYOYRZljzsR WTHhDKlnLRR218k41kBsRt5TZ5WiPieRDJT0HJNh7pH0SHoECG3qtz+E83VQbpjqpAZW FcJH4SbPtOCp+LTW5Xn+ehy56TQdUMA2IoSzAQ1zAIrT8z4r7SU+GjT02YZeQoi+0Upz AHYg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=JLMvKs3fIhV67bHO6epae/Tca2obb29n+hkZhCWjfZY=; fh=XrTUlpCcEz+pizKYEpmwXYQtvnSqNOuTMfm+/c7sDlk=; b=mIJ2bhYBXn18tWe4/omM0Dtu5X1miPrFQJt8+g4jwMbNmWEY8GjKUyCy1wHq+NBuPN o9/jRr/tAnzVdx9/4TPTVlb6u89fxW2atlOj3MUUnu14R2l8de5lcyX8IkeNBZjwQCAt mT4qofVAitrxR2a6CcHMbVCuC06XttBXKGS5N9P6JYrVFDz1Nmz7USLo87eBcz9Z3nW2 rfdqowwa1ukOoEs6K3dSd7kNcZSdReuxFRarETenY6FHiffU0dPHsIf5ksCYB/zLwCd6 1RWgM3JbIerWYH1em/WcwPl0p2TMkv7Kq7CdxxFsqXRKxocLFXcJGckgllIAHzWHlzJ7 5dnA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=wFRFFSWh; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57015-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57015-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCX2h/cw7+phFF0ceXOnqNqmpAtJ6NrxAjzDlAjvn+KRT2yGPmA2Jp122q9trs59zPLx4Xa/V8bIvq0u+WLiedeXvzV37g== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: None arch/arm/boot/dts/broadcom/bcm47622.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63138.dtsi | 7 ++++++- arch/arm/boot/dts/broadcom/bcm63148.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63178.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6756.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6846.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6855.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6878.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm947622.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 14 +++++++------- arch/arm/boot/dts/broadcom/bcm963148.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963178.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96756.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96846.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96855.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96878.dts | 10 ++++++++++ 17 files changed, 191 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi index 7cd38de118c3..485863f9c420 100644 --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi index 4ef02283612b..e74ba6bf370d 100644 --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi @@ -229,7 +229,12 @@ nand_controller: nand-controller@2000 { reg-names = "nand", "nand-int-base"; status = "disabled"; interrupts = ; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; }; serial@4400 { diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi index 24431de1810e..53703827ee3f 100644 --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x2000 0x600>, <0xf0 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm63178.dtsi b/arch/arm/boot/dts/broadcom/bcm63178.dtsi index 3f9aed96babf..6d8d33498983 100644 --- a/arch/arm/boot/dts/broadcom/bcm63178.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63178.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6756.dtsi b/arch/arm/boot/dts/broadcom/bcm6756.dtsi index 1d8d957d65dd..6433f8fa5eff 100644 --- a/arch/arm/boot/dts/broadcom/bcm6756.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6756.dtsi @@ -139,6 +139,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi index cf92cf8c4693..ee361cb00b7c 100644 --- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi index 52d6bc89f9f8..52915ec6f339 100644 --- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi index 2c5d706bac7e..70cf23a65fdb 100644 --- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi @@ -120,6 +120,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm947622.dts b/arch/arm/boot/dts/broadcom/bcm947622.dts index 93b8ce22678d..6241485408d3 100644 --- a/arch/arm/boot/dts/broadcom/bcm947622.dts +++ b/arch/arm/boot/dts/broadcom/bcm947622.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138.dts b/arch/arm/boot/dts/broadcom/bcm963138.dts index 1b405c249213..7fd87e05ec20 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138.dts @@ -29,3 +29,13 @@ &serial0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts index b5af61853a07..f60d09908ab9 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts @@ -32,15 +32,15 @@ &serial1 { }; &nand_controller { + brcm,wp-not-connected; status = "okay"; +}; - nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sectors-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + nand-on-flash-bbt; }; &ahci { diff --git a/arch/arm/boot/dts/broadcom/bcm963148.dts b/arch/arm/boot/dts/broadcom/bcm963148.dts index 1f5d6d783f09..44bca063a327 100644 --- a/arch/arm/boot/dts/broadcom/bcm963148.dts +++ b/arch/arm/boot/dts/broadcom/bcm963148.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963178.dts b/arch/arm/boot/dts/broadcom/bcm963178.dts index d036e99dd8d1..098a222cd71a 100644 --- a/arch/arm/boot/dts/broadcom/bcm963178.dts +++ b/arch/arm/boot/dts/broadcom/bcm963178.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96756.dts b/arch/arm/boot/dts/broadcom/bcm96756.dts index 8b104f3fb14a..402038d3cd0c 100644 --- a/arch/arm/boot/dts/broadcom/bcm96756.dts +++ b/arch/arm/boot/dts/broadcom/bcm96756.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96846.dts b/arch/arm/boot/dts/broadcom/bcm96846.dts index 55852c229608..943896afb7cc 100644 --- a/arch/arm/boot/dts/broadcom/bcm96846.dts +++ b/arch/arm/boot/dts/broadcom/bcm96846.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96855.dts b/arch/arm/boot/dts/broadcom/bcm96855.dts index 2ad880af2104..571663d9a1ea 100644 --- a/arch/arm/boot/dts/broadcom/bcm96855.dts +++ b/arch/arm/boot/dts/broadcom/bcm96855.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96878.dts b/arch/arm/boot/dts/broadcom/bcm96878.dts index b7af8ade7a9d..8d6eddd54c6e 100644 --- a/arch/arm/boot/dts/broadcom/bcm96878.dts +++ b/arch/arm/boot/dts/broadcom/bcm96878.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; From patchwork Wed Feb 7 20:22:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198097 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2521363dyb; Wed, 7 Feb 2024 13:41:51 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCURaLl8pHVh5mSvtDmBEMDiLIzePjcj9tTMREa01nH4sQxK/XFw7M/MlzvRyNdkTaBbc4Ae1JL3uaL/av4FhSPXlsT0LA== X-Google-Smtp-Source: AGHT+IHSWPC256tQOuemg1R8g+VeHoUE7mUnnqfNHnBq/k7nuz+qqWllA1L3Sw2AVXaLLsDNWGkn X-Received: by 2002:a17:902:d386:b0:1d9:95c5:296e with SMTP id e6-20020a170902d38600b001d995c5296emr5665867pld.53.1707342110848; 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Wed, 7 Feb 2024 12:23:44 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 2203AC0000DB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337424; bh=yA5EW467l5W4K1izc5KPjWHrjNf/HNEsP8kshSDOM1I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rKdojV2/lo+qlrEWr/RJenKStmRM3zYRFa/86QiFs4K9RpDw/k/qXj5FXju19AFtk 9yfbfmndNoDkUQZkk4SWfzZEPqgN0eedOLYKOzCPNC2MDgHaS+K9N4T/UEFlhUDX4r XLUTwNYIbIpV61X0GW8wRvgyY2q1n5yxUqN8hWRQ= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id ADD1218041CAC4; Wed, 7 Feb 2024 12:23:42 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Conor Dooley , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 05/12] arm64: dts: broadcom: bcmbca: Add NAND controller node Date: Wed, 7 Feb 2024 12:22:50 -0800 Message-Id: <20240207202257.271784-6-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790277961597721952 X-GMAIL-MSGID: 1790277961597721952 Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts files. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: - Add nand controller node label for 4908 so it is consistent with other SoCs and can be referenced by board dts file arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 4 ++-- arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts | 10 ++++++++++ 14 files changed, 156 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi index 2f124b027bbf..336016e334d9 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -589,7 +589,7 @@ hsspi: spi@1000 { status = "disabled"; }; - nand-controller@1800 { + nand_controller: nand-controller@1800 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; @@ -597,7 +597,7 @@ nand-controller@1800 { reg-names = "nand", "nand-int-base"; interrupts = ; interrupt-names = "nand_ctlrdy"; - status = "okay"; + status = "disabled"; nandcs: nand@0 { compatible = "brcm,nandcs"; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi index d658c81f7285..14b2adfb817c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi index 4f474d47022e..589b8a1efc72 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi @@ -119,6 +119,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi index 909f254dc47d..48d618e75866 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi @@ -137,6 +137,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi index 685ae32951c9..1d1303cf90f3 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi index 820553ce541b..00c62c1e5df0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi index 0eb93c298297..caeaf428dc15 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi @@ -156,5 +156,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts index c4e6e71f6310..030ffa5364fb 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts index e69cd683211a..4b779e6c22e1 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts index db2c82d6dfd8..2851e8e41bf4 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts index 25c12bc63545..17dc594fe83f 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts index faba21f03120..34832a734734 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts index 9808331eede2..e1396b5544b7 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts index 1f561c8e13b0..30bbf6f2917e 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; 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Wed, 7 Feb 2024 12:23:55 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 3010CC002E04 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337435; bh=aYqxL4BBe2rAkKvxSn/snRDQonR+FFPllbJPIAsOqLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E1pS0UF2re5sLE5NhE8w83gdk+v0S2bGOfO/+ZKu2hGZMJg5ffuzCbhrx1VI81whO fXjD7AbnocYRZCitxyssyYgkPaDl9jGra/XRKt61IUbX/+vLOvLE4Xs0Tn+vHhfdNr Fws8s1be5lDzsbwBtM6KN/GZ8vf5sLTojvdvRgME= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id BF58118041CAC4; Wed, 7 Feb 2024 12:23:53 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Conor Dooley , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 06/12] arm64: dts: broadcom: bcmbca: Update router boards Date: Wed, 7 Feb 2024 12:22:51 -0800 Message-Id: <20240207202257.271784-7-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790288233490118494 X-GMAIL-MSGID: 1790288233490118494 Enable the nand controller and add WP pin connection property in actual board dts as they are board level properties now that they are disabled and moved out from SoC dtsi. Also remove the unnecessary brcm,nand-has-wp property from AC5300 board. This property is only needed for some old controller that this board does not apply. Signed-off-by: William Zhang --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None .../boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 5 +++++ .../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 5 +++++ .../boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 6 +++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 78204d71ecd2..999d93730240 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -125,6 +125,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts index fcf092c81b59..19fc03ef47a0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts @@ -155,6 +155,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts index d94a53d68320..52f928dbfa3c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts @@ -166,11 +166,15 @@ led@19 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; nand-on-flash-bbt; - brcm,nand-has-wp; #address-cells = <1>; #size-cells = <0>; From patchwork Wed Feb 7 20:22:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198127 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2561507dyb; Wed, 7 Feb 2024 15:15:12 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVpgCpq4iBwV0G4ziYai92LjQnOMp2zMMqYdXXtaJBxSaHv6QoOHR3KKMxH5vviOdfsPrn4tza+rf4o0w4ikwncyNTevw== X-Google-Smtp-Source: AGHT+IE5FvKt2aDKnIuhV1jVRifF/YUD3tRfVc20y/6HlxvGwy0Ek3E4rZUap+tKxP0yr0PhxVNZ X-Received: by 2002:ac8:5f49:0:b0:42c:4425:c79 with SMTP id y9-20020ac85f49000000b0042c44250c79mr2650385qta.62.1707347712063; Wed, 07 Feb 2024 15:15:12 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707347712; cv=pass; d=google.com; s=arc-20160816; b=LmtvcO+uZMXZmd9Nfh85VgcMQwXgbDIZRSWXcLErGA460pOimoBNQ2MnrE0k20Zn+J Hxm3ZbNghukzD10Wmyb1wR59qDM61noxhBRKItSO9uVgvuAkV3X+dk6qh8Bby2cMyEOY n97CoAfdn99IyIKmMJrRVR8agf6BuoNEsb0KJn5f8Rq5WWqlqkfSGc9xmv3SIqHEYE+g SHo0j0wm1G5/WGgbtk7Eys+YvL4tfA3u46qprFJtnxU67SiBjVPJdOdneCpZCmvO35Z8 bWhCHjsvHnXM6didKUvV636HKFVqmxNQLXHZd8+Fc6ZJKai9Gl8aBVEro2ILD5mottWY FH4A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=pUIaYpWoQCeCPw89b6UYLhkDSu8kT+6JfKhrJqwsNEg=; fh=W0GzGEYjyCxjSH/GtLxPvs4Ob2QniJkrnCuFQIZwFbo=; b=W8g6pZ8bWVHBSt3DybWxao4cuOB7CuOt/qTL7xqNAndj8Rw0HnqLKFlHCAwXu7n/RP V85TaX9mcrtD67dQX9qDLuNXTeFp9+VnVvSbbHyWMCvF+7deTtExz2FXQkkHRARRvrXT yiZkrxCUkPWJp62EVk6T3Nbkw4Inrk6F0eB98lKlx/T6X609kw4RG65VrZbZOQ4/wm/3 +O3COmw181sBzuHv4etaFd+G6WopIsN8ub5CK7IGDI/X6BrsL+hfZm3FQiJlcoxkJSzj tTB9j3I3J4K+jqJ+fT/HzqVdZg/ywuZUas0MrSJ2DayrxG8WqQAcrXXJ3YZIen+D+D42 Wddg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=vsPwnlEA; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57018-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57018-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCU/CP0cWQ6TLpT8pFaE98RUvlq2V7Z+WGUyhgBkkm/Yo5fbNl+rwHnChMKYKE3chebBKMxBI74nsqQcDQ2iF2FaUCrnfA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 7 Feb 2024 12:24:01 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com EFD40C0094C9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337442; bh=fap2QRMJq91paTF2CoIPWcqMi57rjjpFgPZ3W9wFpM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vsPwnlEAQAaZ+0CBFkqxDzbRnEychnoCtJu5uVoR8LUt+U5CSyv/AlfqAzaTCX7LA pW5aevSpgQBoNdVHk/kp2DgIUXaYe4sdVhipHf4j701DNAVOqIvjzhGZj/aA2Od2E7 u9TvnTE8LaqcCYdmG8wfTXxJTIR9G4jq1TGQZOnE= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 7903F18041CAC4; Wed, 7 Feb 2024 12:24:00 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Florian Fainelli , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH v5 07/12] mtd: rawnand: brcmnand: Rename bcm63138 nand driver Date: Wed, 7 Feb 2024 12:22:52 -0800 Message-Id: <20240207202257.271784-8-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790283834717774192 X-GMAIL-MSGID: 1790283834717774192 In preparing to support multiple BCMBCA SoCs, rename bcm63138 to bcmbca in the driver code and driver file name. Signed-off-by: William Zhang Reviewed-by: David Regan Acked-by: Florian Fainelli --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/Makefile | 2 +- drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c | 99 ------------------- drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 99 +++++++++++++++++++ 3 files changed, 100 insertions(+), 100 deletions(-) delete mode 100644 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c create mode 100644 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 9907e3ec4bb2..0536568c6467 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,7 +2,7 @@ # link order matters; don't link the more generic brcmstb_nand.o before the # more specific iproc_nand.o, for instance obj-$(CONFIG_MTD_NAND_BRCMNAND_IPROC) += iproc_nand.o -obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcm63138_nand.o +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BCM63XX) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BRCMSTB) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c deleted file mode 100644 index 968c5b674b08..000000000000 --- a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright © 2015 Broadcom Corporation - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "brcmnand.h" - -struct bcm63138_nand_soc { - struct brcmnand_soc soc; - void __iomem *base; -}; - -#define BCM63138_NAND_INT_STATUS 0x00 -#define BCM63138_NAND_INT_EN 0x04 - -enum { - BCM63138_CTLRDY = BIT(4), -}; - -static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; - u32 val = brcmnand_readl(mmio); - - if (val & BCM63138_CTLRDY) { - brcmnand_writel(val & ~BCM63138_CTLRDY, mmio); - return true; - } - - return false; -} - -static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; - u32 val = brcmnand_readl(mmio); - - if (en) - val |= BCM63138_CTLRDY; - else - val &= ~BCM63138_CTLRDY; - - brcmnand_writel(val, mmio); -} - -static int bcm63138_nand_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct bcm63138_nand_soc *priv; - struct brcmnand_soc *soc; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - soc = &priv->soc; - - priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - soc->ctlrdy_ack = bcm63138_nand_intc_ack; - soc->ctlrdy_set_enabled = bcm63138_nand_intc_set; - - return brcmnand_probe(pdev, soc); -} - -static const struct of_device_id bcm63138_nand_of_match[] = { - { .compatible = "brcm,nand-bcm63138" }, - {}, -}; -MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match); - -static struct platform_driver bcm63138_nand_driver = { - .probe = bcm63138_nand_probe, - .remove_new = brcmnand_remove, - .driver = { - .name = "bcm63138_nand", - .pm = &brcmnand_pm_ops, - .of_match_table = bcm63138_nand_of_match, - } -}; -module_platform_driver(bcm63138_nand_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Brian Norris"); -MODULE_DESCRIPTION("NAND driver for BCM63138"); diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 000000000000..3e2f3b79788d --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT_STATUS 0x00 +#define BCMBCA_NAND_INT_EN 0x04 + +enum { + BCMBCA_CTLRDY = BIT(4), +}; + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_STATUS; + u32 val = brcmnand_readl(mmio); + + if (val & BCMBCA_CTLRDY) { + brcmnand_writel(val & ~BCMBCA_CTLRDY, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= BCMBCA_CTLRDY; + else + val &= ~BCMBCA_CTLRDY; + + brcmnand_writel(val, mmio); +} + +static int bcmbca_nand_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct bcmbca_nand_soc *priv; + struct brcmnand_soc *soc; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + soc = &priv->soc; + + priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + + return brcmnand_probe(pdev, soc); +} + +static const struct of_device_id bcmbca_nand_of_match[] = { + { .compatible = "brcm,nand-bcm63138" }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcmbca_nand_of_match); + +static struct platform_driver bcmbca_nand_driver = { + .probe = bcmbca_nand_probe, + .remove_new = brcmnand_remove, + .driver = { + .name = "bcmbca_nand", + .pm = &brcmnand_pm_ops, + .of_match_table = bcmbca_nand_of_match, + } +}; +module_platform_driver(bcmbca_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Brian Norris"); +MODULE_DESCRIPTION("NAND driver for BCMBCA"); From patchwork Wed Feb 7 20:22:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198129 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2566843dyb; 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Wed, 7 Feb 2024 12:24:05 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 48939C0094CB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337445; bh=3KI+0H7nre5BBb1mmhtPwiG4aWlQO8hYYw+faxeJstM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HMo4Y+GPif6wR5z2grQbbEMwdkWpMt6TTdgkZKgxEbzxAEKH9OOSGthlH4YY3gakM Vq0N2FLp0VHRFwEArGVxUsGNzce8Li4YpULVCxEASOy1AKuA5bSf3R3MgokJ2rcyzj UWwFPIGCuHFJO4QSR/Fbnb/Sh8mk1p+6HC7ULOfo= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id D693A18041CAC4; Wed, 7 Feb 2024 12:24:03 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 08/12] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface Date: Wed, 7 Feb 2024 12:22:53 -0800 Message-Id: <20240207202257.271784-9-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790284722322061237 X-GMAIL-MSGID: 1790284722322061237 The BCMBCA broadband SoC integrates the NAND controller differently than STB, iProc and other SoCs. It has different endianness for NAND cache data. Add a SoC read data bus shim for BCMBCA to meet the specific SoC need and performance improvement using the optimized memcpy function on NAND cache memory. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: None Changes in v3: - Updated bcmbca_read_data_bus comment Changes in v2: - Drop the is_param argument to the read data bus function now that we have the exec_op API to read the parameter page and ONFI data - Remove be32_to_cpu from brcmnand_read_data_bus drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 27 +++++++++++++++++++++ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 ++++++++++++--- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 2 ++ 3 files changed, 46 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c index 3e2f3b79788d..7ad3e7a98f97 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -26,6 +26,18 @@ enum { BCMBCA_CTLRDY = BIT(4), }; +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) { struct bcmbca_nand_soc *priv = @@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) brcmnand_writel(val, mmio); } +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer)) + memcpy((void *)buffer, (void *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + static int bcmbca_nand_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -73,6 +99,7 @@ static int bcmbca_nand_probe(struct platform_device *pdev) soc->ctlrdy_ack = bcmbca_nand_intc_ack; soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; return brcmnand_probe(pdev, soc); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8faca43ae1ff..73fdf7ce21aa 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -851,6 +851,20 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl, return brcmnand_readl(ctrl->edu_base + offs); } +static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + struct brcmnand_soc *soc = ctrl->soc; + int i; + + if (soc->read_data_bus) { + soc->read_data_bus(soc, flash_cache, buffer, fc_words); + } else { + for (i = 0; i < fc_words; i++) + buffer[i] = brcmnand_read_fc(ctrl, i); + } +} + static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) { @@ -1975,7 +1989,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, { struct brcmnand_host *host = nand_get_controller_data(chip); struct brcmnand_controller *ctrl = host->ctrl; - int i, j, ret = 0; + int i, ret = 0; brcmnand_clear_ecc_addr(ctrl); @@ -1988,8 +2002,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, if (likely(buf)) { brcmnand_soc_data_bus_prepare(ctrl->soc, false); - for (j = 0; j < FC_WORDS; j++, buf++) - *buf = brcmnand_read_fc(ctrl, j); + brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf, FC_WORDS); + buf += FC_WORDS; brcmnand_soc_data_bus_unprepare(ctrl->soc, false); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index 928114c0be5e..7261a69989fe 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -24,6 +24,8 @@ struct brcmnand_soc { void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); 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Wed, 7 Feb 2024 12:24:07 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com DCBC9C0094CA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337447; bh=1Yh76Q4bafQj8j8zmFp3LQ71wEoIHitjS2PH4qKEFkw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mh5eTHW3ecA8+Yd5hfuEAI6bzxkyankIbx4jjFcQK5LNCrnYe8YT5HgfHSByl+OMW Mp5X/1wxKS8XM0lm4MxP1zUwOTvZidsNnkB7frF+6AMMmquNlUHUixMkQG7g48gmMa JsPb7d+uovlY1Q9FMVvmDNaIDFxEzDT8Y2mSBMTE= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 6B45618041CAC4; Wed, 7 Feb 2024 12:24:06 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 09/12] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap Date: Wed, 7 Feb 2024 12:22:54 -0800 Message-Id: <20240207202257.271784-10-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790285015959145001 X-GMAIL-MSGID: 1790285015959145001 BCMBCA broadband SoC based board design does not specify ecc setting in dts but rather use the SoC NAND strap info to obtain the ecc strength and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for this purpose and update driver to support this option. The generic nand ecc settings still take precedence over this flag. For example, if nand-ecc-strength is set in the dts, the driver ignores the strap setting and falls back to original behavior. This makes sure that the existing BCMBCA board dts still works the old way even the strap flag is set in the BCMBCA chip dtsi. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Update the comments for ecc setting selection Changes in v3: None Changes in v2: - Minor cosmetic fixes drivers/mtd/nand/raw/brcmnand/brcmnand.c | 83 ++++++++++++++++++++++-- 1 file changed, 76 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 73fdf7ce21aa..efeee9e80213 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1038,6 +1038,19 @@ static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl) return -1; } +static int brcmnand_get_sector_size_1k(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + int shift = brcmnand_sector_1k_shift(ctrl); + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + + if (shift < 0) + return 0; + + return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1; +} + static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) { struct brcmnand_controller *ctrl = host->ctrl; @@ -1055,6 +1068,38 @@ static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) nand_writereg(ctrl, acc_control_offs, tmp); } +static int brcmnand_get_spare_size(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + u32 acc = nand_readreg(ctrl, acc_control_offs); + + return (acc & brcmnand_spare_area_mask(ctrl)); +} + +static int brcmnand_get_ecc_strength(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + int sector_size_1k = brcmnand_get_sector_size_1k(host); + int spare_area_size, ecc_level, ecc_strength; + u32 acc; + + spare_area_size = brcmnand_get_spare_size(host); + acc = nand_readreg(ctrl, acc_control_offs); + ecc_level = (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_shift; + if (sector_size_1k) + ecc_strength = ecc_level * 2; + else if (spare_area_size == 16 && ecc_level == 15) + ecc_strength = 1; /* hamming */ + else + ecc_strength = ecc_level; + + return ecc_strength; +} + /*********************************************************************** * CS_NAND_SELECT ***********************************************************************/ @@ -2622,19 +2667,43 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) nanddev_get_memorg(&chip->base); struct brcmnand_controller *ctrl = host->ctrl; struct brcmnand_cfg *cfg = &host->hwcfg; - char msg[128]; + struct device_node *np = nand_get_flash_node(chip); u32 offs, tmp, oob_sector; - int ret; + int ret, sector_size_1k = 0; + bool use_strap = false; + char msg[128]; memset(cfg, 0, sizeof(*cfg)); + use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap"); - ret = of_property_read_u32(nand_get_flash_node(chip), - "brcm,nand-oob-sector-size", + /* + * Set ECC size and strength based on hw configuration from strap + * if brcm,nand-ecc-use-strap is set. However if nand-ecc-strength + * is set, its value will be used and ignore the strap setting. + */ + if (chip->ecc.strength) + use_strap = 0; + + if (use_strap) { + chip->ecc.strength = brcmnand_get_ecc_strength(host); + sector_size_1k = brcmnand_get_sector_size_1k(host); + if (chip->ecc.size == 0) { + if (sector_size_1k < 0) + chip->ecc.size = 512; + else + chip->ecc.size = 512 << sector_size_1k; + } + } + + ret = of_property_read_u32(np, "brcm,nand-oob-sector-size", &oob_sector); if (ret) { - /* Use detected size */ - cfg->spare_area_size = mtd->oobsize / - (mtd->writesize >> FC_SHIFT); + if (use_strap) + cfg->spare_area_size = brcmnand_get_spare_size(host); + else + /* Use detected size */ + cfg->spare_area_size = mtd->oobsize / + (mtd->writesize >> FC_SHIFT); } else { cfg->spare_area_size = oob_sector; } From patchwork Wed Feb 7 20:22:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198079 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2486015dyb; Wed, 7 Feb 2024 12:26:24 -0800 (PST) X-Google-Smtp-Source: AGHT+IEgI3z6pnncl8srD3mlMjP57D3j5I230Sk4OglCHOl+AqQBk/v7cpu8qoQoe8/4xQQDhwmW X-Received: by 2002:a05:6402:1814:b0:560:a95:5385 with SMTP id g20-20020a056402181400b005600a955385mr5546136edy.24.1707337584601; Wed, 07 Feb 2024 12:26:24 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707337584; cv=pass; d=google.com; s=arc-20160816; b=nmwJd4JJKlz2JTRKNF9xhJg7L/96EmmeL2VlPWp4CVYAN3Bd4pxxvW3dmBzO5p3Po/ hFObnZtlB/5lXrZ7etV4ZJBA0coKqwP1pbYqEQmHDE5Mg7vuLwDdvDrBaMdaOQFEpiSp MveRCzoZFZFc6CthdjJG0Jw4TRm+RInHzVyB8njooWJxJSwnEpCC/uci+HbFDNQAbNM3 dBkw1TSojs9QenXLN/LMEVooqe35hon6a3ViL+mIeDPLWacHjcbE1y8001VDBwVvtPfH VfOup0jG65gA7Q2BiJrSDjMKfDDqeZqOUaGc1u9uTT8n9Mp2Q5CTcbSEVWQ68XG8plue Mk+w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=nZrR7JwKd51aTsZqOrtbFzQBcNmBsdxEapH6SC+pbno=; fh=VDZjNVJMjvNHIM2cICw0ot1qthj47J58IcKS4FgMBKY=; b=OFAz5zXq8v9oPShjOnn/cSCvJbhxiUuH+apWaxQ0nIla9mWAXmIwMb9IqvApPi0vlT Jhi1ZEO/wKjTy93i/buDAVrp8tjw3y/OVXTqay9EhjpjE7m3tCgmvtQMmZTYXADqHVv7 04k4aRqsBdOsnw1BnaNZ2GvKpdgOflQcdMJ5EFUTePoIFuOO7wKx9kz/2xfJ63Ylx5KA +sBKVoyIL15QHV61pi76bSuqR1WeheYtYKxmom9EyD1ZUH2Y9+rwVrwTsdg3+qWT0SeE xccn8dotd0NRVqlW4xxt3qrDhRYKk0c1OLw3BdNA8a81z6zP3m0jagJdM/+f0vhZtAQa Sbvw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=Tlirzqhu; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57021-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57021-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCVolR68n9aTIbRNUeQ4iQBH+GWSZp4LSNHpG9s26nZMURxRb6iZS0PyqLpl5JCz5G26oOHEQ8VAS0R/WlRx0bbGJBua+Q== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wed, 7 Feb 2024 12:24:11 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com D7BADC002E04 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337451; bh=LUvXfylQz7V0uRO9qJXNQP+bE5k1kmYrwKzlIAWOYL8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TlirzqhuOg4tzEbiBkiwG77jPDzlr/bygIvtETqRJAeJSvGAkBKcdW74oig5H971m +TASW5kxTqfJ/6Xr8yMbDxWyWItcj20C4moqq7sQYUl8fEhl9ACvmN0OBcvMqf3Eov 5ycU0qevpNPAqMh/f7IHSu9ryvTDNWpCqmYmBIUg= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 72E8618041CAC4; Wed, 7 Feb 2024 12:24:10 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , Florian Fainelli , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 10/12] mtd: rawnand: brcmnand: Support write protection setting from dts Date: Wed, 7 Feb 2024 12:22:55 -0800 Message-Id: <20240207202257.271784-11-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790273215011935945 X-GMAIL-MSGID: 1790273215011935945 The write protection feature is controlled by the module parameter wp_on with default set to enabled. But not all the board use this feature especially in BCMBCA broadband board. And module parameter is not sufficient as different board can have different option. Add a device tree property and allow this feature to be configured through the board dts on per board basis. Signed-off-by: William Zhang Reviewed-by: Florian Fainelli Reviewed-by: Kamal Dasu Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Use the new brcm,wp-not-connected property based on the dts binding change Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index efeee9e80213..8c1489ff7bd6 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -3218,6 +3218,10 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* Disable XOR addressing */ brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0); + /* Check if the board connects the WP pin */ + if (of_property_read_bool(dn, "brcm,wp-not-connected")) + wp_on = 0; + if (ctrl->features & BRCMNAND_HAS_WP) { /* Permanently disable write protection */ if (wp_on == 2) From patchwork Wed Feb 7 20:22:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 198132 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp2581442dyb; Wed, 7 Feb 2024 16:05:08 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVD3r4JehrG061TZ5vFmTFFzlrFylRx55/VhYIwviqWn1PjYFBvUkgDwAz5zY3ltyhKEcMJfTA/k5wwhWdV7tj1o1XGaA== X-Google-Smtp-Source: AGHT+IFioMBHm8PeObQVX9jD1Am1RAr4EMYAbTZH6WrpgG4PRyDuH9faN7Az7gQ8mm1DQ7SbZY/T X-Received: by 2002:a05:6214:500a:b0:68c:ae6d:2959 with SMTP id jo10-20020a056214500a00b0068cae6d2959mr9274379qvb.26.1707350708086; Wed, 07 Feb 2024 16:05:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707350708; cv=pass; d=google.com; s=arc-20160816; b=HwFt6KPupZIL+AweHQRrLu0ah4LYq8OH4RuXKf951oduMBEGnhqDwI9D0Nls8RPDGK zIv3PIY6GmZ/6qBFztT5ghoFJZMG0p2HkW3s+Mimysi6CQ/AeHJy8gPRhVlzzdCeeHTH c8Ns4UIQQKpvFPp4Y/LfBuj3JjDGozLPr8kSyQqBLjOlol/v2ITpm/FiQslbVa5ryazY 7Nv0OMsCXbUXdbYK1bI/9mWsWXv80AOV7Z6H75qx8IQHEVmOOLDhOFbnLQ9URqRMhtt2 iwPfV4xrhQ93T/USrgrHDZ2iLDSv5MPl1UTaEO51NCra7M08+AIAuusfLbKNCUYPkKh5 HGug== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=8ZCbiEfjrJjD72zxkpoWbYt9TGVqzUwSSEluopUvfc4=; fh=oXT5ltM4iN7aR5ErN+9jmY7U27gS7jdJ6QQoi/J87hs=; b=tZAhVtwCG4WudXeU+XTQjTEAI3ljevjlyDQ2ZhUbPmuGRWdqzVEM1uvcofercFGxz8 wXCdaCkTYYPMqUB8nsqht0Frt59uRjoJW4rERb7Vt9AzQtZzc0Gbh4+qdocvCHpUJCiz 1E4m2uaQyvn0w+nwIoBXP2k7LpFeTsXQKqMMlFbwnkX/pu84D2MOAQmY/r1JZdoq/oLy eCLjASgp6ZMJPPQf2Bk/bOWKdgWegbGmHNBLlusbe0N+LbysTkuv7T5WZ0RhkogVULln CnB+9ww4kKQ9xqJ5CSWAuyCtnUc7taX8s+sriV9auuPb/z/KpU0l+qIpd1UnpRM3MfsR D0uQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=wITfm5rY; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-57022-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57022-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=2; AJvYcCUySb5cDDlvDysoCXCK1Xat80pOuXW3s8We2nxUT2OTDg16SXYY8Syhmb1OaTJWKQIljdLsJCEMBYAYxxfp7l4gVj95Dw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 7 Feb 2024 12:24:15 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 6501EC002E08 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337455; bh=LJwvyvOKR5RJUCQ82QvQcFaSQlghSut08Ka3BcQ0Pc8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wITfm5rYzDUAMutE/vaLo4aGl2F+KOQ93Xuw1i6tNJ/JyeBft+7D9NzmayFClBqiT do8ErGbitG+vXXW8pCli70B7FjPPLXexdf7kZwxTYPJnY8a/sdELyGjdCkglsQouFj Ed7yEp+Wnam2x8OxTQx7e82CXIrxoxGFTxNPx/BY= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id F3F5018041CAC4; Wed, 7 Feb 2024 12:24:13 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, David Regan , Dan Carpenter , William Zhang , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 11/12] mtd: rawnand: brcmnand: exec_op helper functions return type fixes Date: Wed, 7 Feb 2024 12:22:56 -0800 Message-Id: <20240207202257.271784-12-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790286975885318165 X-GMAIL-MSGID: 1790286975885318165 From: David Regan fix return type for exec_op reset and status detect helper functions Reported-by: Dan Carpenter Closes: http://lists.infradead.org/pipermail/linux-mtd/2023-December/102423.html Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation") Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v5: None Changes in v4: - Fix the commit id in the fixes tag Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8c1489ff7bd6..7ce2b267676f 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -625,7 +625,7 @@ enum { /* Only for v7.2 */ #define ACC_CONTROL_ECC_EXT_SHIFT 13 -static u8 brcmnand_status(struct brcmnand_host *host); +static int brcmnand_status(struct brcmnand_host *host); static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl) { @@ -1749,7 +1749,7 @@ static int brcmnand_waitfunc(struct nand_chip *chip) INTFC_FLASH_STATUS; } -static u8 brcmnand_status(struct brcmnand_host *host) +static int brcmnand_status(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; struct mtd_info *mtd = nand_to_mtd(chip); @@ -1760,7 +1760,7 @@ static u8 brcmnand_status(struct brcmnand_host *host) return brcmnand_waitfunc(chip); } -static u8 brcmnand_reset(struct brcmnand_host *host) +static int brcmnand_reset(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; @@ -2492,11 +2492,14 @@ static int brcmnand_exec_op(struct nand_chip *chip, if (brcmnand_op_is_status(op)) { status = op->instrs[1].ctx.data.buf.in; - *status = brcmnand_status(host); + ret = brcmnand_status(host); + if (ret < 0) + return ret; + + *status = ret & 0xFF; return 0; - } - else if (brcmnand_op_is_reset(op)) { + } else if (brcmnand_op_is_reset(op)) { ret = brcmnand_reset(host); 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Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v5: - Update the commit message Changes in v4: - Revert the log level change for correctable ecc error Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 7ce2b267676f..e50582b45182 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1143,7 +1143,7 @@ static int bcmnand_ctrl_poll_status(struct brcmnand_host *host, if ((val & mask) == expected_val) return 0; - dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n", + dev_err(ctrl->dev, "timeout on status poll (expected %x got %x)\n", expected_val, val & mask); return -ETIMEDOUT; @@ -2196,7 +2196,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, return err; } - dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n", + dev_err(ctrl->dev, "uncorrectable error at 0x%llx\n", (unsigned long long)err_addr); mtd->ecc_stats.failed++; /* NAND layer expects zero on ECC errors */