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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMp122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 1/7] mmc: sdhci_am654: Add tuning algorithm for delay chain Date: Tue, 6 Feb 2024 19:15:14 -0600 Message-ID: <20240207011520.3128382-2-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200908195398796 X-GMAIL-MSGID: 1790200908195398796 Currently the sdhci_am654 driver only supports one tuning algorithm which should be used only when DLL is enabled. The ITAPDLY is selected from the largest passing window and the buffer is viewed as a circular buffer. The new algorithm should be used when the delay chain is enabled. The ITAPDLY is selected from the largest passing window and the buffer is not viewed as a circular buffer. This implementation is based off of the following paper: [1]. Also add support for multiple failing windows. [1] https://www.ti.com/lit/an/spract9/spract9.pdf Fixes: 13ebeae68ac9 ("mmc: sdhci_am654: Add support for software tuning") Signed-off-by: Judith Mendez --- Changelog: v1->v2: - Remove unnecessary indentations and if/else in sdhci_am654_calculate_itap() - Optimize sdhci_am654_calculate_itap() --- drivers/mmc/host/sdhci_am654.c | 111 +++++++++++++++++++++++++++------ 1 file changed, 91 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index d659c59422e1..2c66a965c225 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -149,10 +149,17 @@ struct sdhci_am654_data { int strb_sel; u32 flags; u32 quirks; + bool dll_enable; #define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0) }; +struct window { + u8 start; + u8 end; + u8 length; +}; + struct sdhci_am654_driver_data { const struct sdhci_pltfm_data *pdata; u32 flags; @@ -290,10 +297,13 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); - if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) + if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) { sdhci_am654_setup_dll(host, clock); - else + sdhci_am654->dll_enable = true; + } else { sdhci_am654_setup_delay_chain(sdhci_am654, timing); + sdhci_am654->dll_enable = false; + } regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, sdhci_am654->clkbuf_sel); @@ -408,39 +418,100 @@ static u32 sdhci_am654_cqhci_irq(struct sdhci_host *host, u32 intmask) return 0; } -#define ITAP_MAX 32 +#define ITAPDLY_LENGTH 32 +#define ITAPDLY_LAST_INDEX 31 +static u32 sdhci_am654_calculate_itap(struct sdhci_host *host, struct window + *fail_window, u8 num_fails, bool circular_buffer) +{ + struct device *dev = mmc_dev(host->mmc); + struct window pass_window = {0, 0, 0}; + u8 first_fail_start = 0, last_fail_end = 0; + int prev_fail_end = -1; + u8 itap = 0, start_fail = 0, end_fail = 0, pass_length = 0; + u8 i; + + if (!num_fails) + return ITAPDLY_LAST_INDEX >> 1; + + if (fail_window->length == ITAPDLY_LENGTH) { + dev_err(dev, "No passing ITAPDLY, return 0\n"); + return 0; + } + + first_fail_start = fail_window->start; + last_fail_end = fail_window[num_fails - 1].end; + + for (i = 0; i < num_fails; i++) { + start_fail = fail_window[i].start; + end_fail = fail_window[i].end; + pass_length = start_fail - (prev_fail_end + 1); + + if (pass_length > pass_window.length) { + pass_window.start = prev_fail_end + 1; + pass_window.length = pass_length; + } + prev_fail_end = end_fail; + } + + if (!circular_buffer) + pass_length = ITAPDLY_LAST_INDEX - last_fail_end; + else + pass_length = ITAPDLY_LAST_INDEX - last_fail_end + first_fail_start; + + if (pass_length > pass_window.length) { + pass_window.start = last_fail_end + 1; + pass_window.length = pass_length; + } + + if (!circular_buffer) + itap = pass_window.start + (pass_window.length >> 1); + else + itap = (pass_window.start + (pass_window.length >> 1)) % ITAPDLY_LENGTH; + + return (itap < 0 || itap > ITAPDLY_LAST_INDEX ? 0 : itap); +} + static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, u32 opcode) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); - int cur_val, prev_val = 1, fail_len = 0, pass_window = 0, pass_len; - u32 itap; + struct window fail_window[ITAPDLY_LENGTH]; + u8 prev_pass = 1; + u8 fail_index = 0; + u8 curr_pass, itap; + + memset(fail_window, 0, sizeof(fail_window[0]) * ITAPDLY_LENGTH); /* Enable ITAPDLY */ regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK, 1 << ITAPDLYENA_SHIFT); - for (itap = 0; itap < ITAP_MAX; itap++) { + for (itap = 0; itap < ITAPDLY_LENGTH; itap++) { sdhci_am654_write_itapdly(sdhci_am654, itap); - cur_val = !mmc_send_tuning(host->mmc, opcode, NULL); - if (cur_val && !prev_val) - pass_window = itap; + curr_pass = !mmc_send_tuning(host->mmc, opcode, NULL); - if (!cur_val) - fail_len++; + if (!curr_pass && prev_pass) + fail_window[fail_index].start = itap; - prev_val = cur_val; + if (!curr_pass) { + fail_window[fail_index].end = itap; + fail_window[fail_index].length++; + } + + if (curr_pass && !prev_pass) + fail_index++; + + prev_pass = curr_pass; } - /* - * Having determined the length of the failing window and start of - * the passing window calculate the length of the passing window and - * set the final value halfway through it considering the range as a - * circular buffer - */ - pass_len = ITAP_MAX - fail_len; - itap = (pass_window + (pass_len >> 1)) % ITAP_MAX; + + if (fail_window[fail_index].length != 0) + fail_index++; + + itap = sdhci_am654_calculate_itap(host, fail_window, fail_index, + (sdhci_am654->dll_enable)); + sdhci_am654_write_itapdly(sdhci_am654, itap); return 0; From patchwork Wed Feb 7 01:15:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197688 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1929739dyb; Tue, 6 Feb 2024 17:17:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IF88rt8trn6kvEqa4hSpIInKDJM1IycRQIplG2NRlweU8aiPE7NgRqmv26rzEI/YaMJHBwN X-Received: by 2002:ae9:c118:0:b0:785:86e0:c3fc with SMTP id z24-20020ae9c118000000b0078586e0c3fcmr4753594qki.5.1707268646037; Tue, 06 Feb 2024 17:17:26 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707268646; cv=pass; d=google.com; s=arc-20160816; b=tEgXGCbqUhsE0QB6rywF9b4oQUQPEvuA0sTsmYSjY3RVzEcOAZBKTd8UC6gny5puzE hbyKKTvuIdejgmb6n2sTnD49dUBpxKQNhrCuT11dKUVzkv1G/tmeIKfPsLHRTYPvUGvx DBU30abVytRkKZxg45YuK2imyQYudeuz0ZUhQ23k6OX6o+jn2mm1p7W+cB77kPysWfVu Uuxehkp3+kpSatbENgvfb3AG2C9dv7nNnwVPILYe1s8Ppx6fhdAPj+M55F0RMb15Oykr LWzlGhukn57eyumTqAnaWvsHAKLhHb/+FwPfSTDW170xH8xw4nle4/Lk303LBsP1r0yt 6aQQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=ixLIn8/4MEod1tNhTGI8xmWaSLqcdeGvGzPBaoWSn1w=; fh=O2gflyduimQTVhdQecHwihnMH1RWWX5xrMmkMMLJp64=; b=cHyFxpElQmn4c2dqkODetD/ZzmPxduiQBVyNZN78u1/5BiICFL4iLJSsMRU41AOQ2e UDHVyqSnXh7zOWwUEcIORyZIeNA3EiQ49LramPpGiKj3fbZcIEG5swj1P5fDG/JTc/P8 X0PAEEZyqL0tB0Y1E8FyK8MrsrazCgCgMMltUJIJwc8cuG1MX5E8EJvwo9iRwHf73F9B 4sEyu8x2+BHfZJcwiPFHcyMSmVze3jVNMAfXaruodKsLEA2uca/840BLaN1B/HGuUf7K T1uqaC1M2gqe/GNzq6QJnsh1N6pKoKVfYdx3e2VCVLc1bMKTFZFTslVhCep9Po1Z6WSt slvg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qREzwEmJ; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-55784-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-55784-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCXRYW0flwn/e40D1zRsySsPGTnHbkL2PxAYJmW4edI8bOJ7jAqnqbHbuzmRoho2OPM1lBUunBOqJaYi3tCPsdbfdEGVEA== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMq122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 2/7] mmc: sdhci_am654: Write ITAPDLY for DDR52 timing Date: Tue, 6 Feb 2024 19:15:15 -0600 Message-ID: <20240207011520.3128382-3-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200927686945180 X-GMAIL-MSGID: 1790200927686945180 For DDR52 timing, DLL is enabled but tuning is not carried out, therefore the ITAPDLY value in PHY CTRL 4 register is not correct. Fix this by writing ITAPDLY after enabling DLL. Fixes: a161c45f2979 ("mmc: sdhci_am654: Enable DLL only for some speed modes") Signed-off-by: Judith Mendez Reviewed-by: Andrew Davis --- Changelog: v1->v2: - Call sdhci_am654_write_itapdly() in sdhci_am654_set_clock() instead of sdhci_am654_setup_dll() --- drivers/mmc/host/sdhci_am654.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 2c66a965c225..b50db5d4a452 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -299,6 +299,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) { sdhci_am654_setup_dll(host, clock); + sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing]); sdhci_am654->dll_enable = true; } else { sdhci_am654_setup_delay_chain(sdhci_am654, timing); From patchwork Wed Feb 7 01:15:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197685 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1929464dyb; Tue, 6 Feb 2024 17:16:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IFwwLtB++STgrcADUXKdtQP9qERBN3rlGY4R0AKB+6HaJOuLnUOFUc3dACeyhZ2yJKc7DTU X-Received: by 2002:a05:6870:788f:b0:218:73ae:3f24 with SMTP id hc15-20020a056870788f00b0021873ae3f24mr5448126oab.13.1707268600599; Tue, 06 Feb 2024 17:16:40 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707268600; cv=pass; d=google.com; s=arc-20160816; b=pQry6sg2K6YugdYiod3cv5j+uiUEEdbC+wWVBOWdq7NubpYapr84wD/UwwbxvRBg6B gSbvWAJixrEMtF0v6idUMEiTcJiw26JN0+ePfcWvgkyyUSppAaL6TocHQpZDSh3sEm23 vw1cHmnOFkm6uhH6qXNVhA18aR6JGV+5dCEIAoW+s8ezIPCmvmYItkE9vE6xPtVg2o7y CEpQNOpYUnEYpEOBdcW5sJHSU26fNuXty1XVASbIE9iNvlyL5RrA4/RzJZnYEmGPi4Qi nEIYINaS/3Y9Nuu9fYHDkvvbD4TCDrfZQg/fdd2HPd4XnsGIr6Fo6zd8gbsPLJTtYd3o d+SQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=I79Xq4QZvqMGp24bh/kUqX/NZpu2kboS1fPRajutA0U=; fh=Gy3Hmw7k2WOdX+8XljMHGW0HJ/DSvXCtoLAbLU88SlE=; b=OHAqd0Z3+kaXQgkawjnYO4pdDeTLhjbmcEK6xr/ZvfJo1osQtwdvMLWL0u/Zwy5X6b d4iT2dOG9Y7NfWqN0zJMXugCq+1uoRYCF4JJchgbdg46AGjiHz8sGszqGL4WnJEq1jn7 l0WPOqQyHkfrzZJ/pbkNc80EO1uitrndKrtYxwPHB60GaZHL8kA01WQrj4bgH+dAGllC 7JUobG8KkaGwGqayipqCzlp56EPbZImNxLwb6jODDDmv0QalSSf6T8Arx75rI2sQz8m1 eEjuKn0NbJUIwPmVv/bflBAl1XbKhBEjyg1ricuUM0UIBpN2S57TzyY5tysoN6Iy+Xsj DyJw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LmRqUa8c; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-55782-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-55782-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCW5KHLHc9z1BMAJug4NzkCoYseegRp2f1L9NykJG4xrS9YDYkBPQQXrlRqBJ7F6hgBYeOF05SsVSYzgwO7pv8DHBcbujw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMr122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 3/7] mmc: sdhci_am654: Add missing OTAP/ITAP enable Date: Tue, 6 Feb 2024 19:15:16 -0600 Message-ID: <20240207011520.3128382-4-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200880345187124 X-GMAIL-MSGID: 1790200880345187124 Currently the OTAP/ITAP delay enable functionality is missing in the am654_set_clock function which is used for MMC0 on AM62p and AM64x devices. The OTAP delay is not enabled when timing < SDR25 bus speed mode. The ITAP delay is not enabled for all bus speed modes. Add this OTAP/ITAP delay functionality according to the datasheet [1] OTAPDLYENA and ITAPDLYENA for MMC0. [1] https://www.ti.com/lit/ds/symlink/am62p.pdf Fixes: 8ee5fc0e0b3b ("mmc: sdhci_am654: Update OTAPDLY writes") Signed-off-by: Judith Mendez --- Changelog: v1->v2: - Change itap_del_ena[] to type u32 - Revert unnecessary reformating in sdhci_am654_set_clock() and sdhci_j721e_4bit_set_clock() --- drivers/mmc/host/sdhci_am654.c | 40 ++++++++++++++++++++-------------- 1 file changed, 24 insertions(+), 16 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index b50db5d4a452..935f581c05d8 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -143,6 +143,7 @@ struct sdhci_am654_data { struct regmap *base; int otap_del_sel[ARRAY_SIZE(td)]; int itap_del_sel[ARRAY_SIZE(td)]; + u32 itap_del_ena[ARRAY_SIZE(td)]; int clkbuf_sel; int trm_icp; int drv_strength; @@ -239,11 +240,13 @@ static void sdhci_am654_setup_dll(struct sdhci_host *host, unsigned int clock) } static void sdhci_am654_write_itapdly(struct sdhci_am654_data *sdhci_am654, - u32 itapdly) + u32 itapdly, u32 enable) { /* Set ITAPCHGWIN before writing to ITAPDLY */ regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 1 << ITAPCHGWIN_SHIFT); + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK, + enable << ITAPDLYENA_SHIFT); regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYSEL_MASK, itapdly << ITAPDLYSEL_SHIFT); regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0); @@ -260,8 +263,8 @@ static void sdhci_am654_setup_delay_chain(struct sdhci_am654_data *sdhci_am654, mask = SELDLYTXCLK_MASK | SELDLYRXCLK_MASK; regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val); - sdhci_am654_write_itapdly(sdhci_am654, - sdhci_am654->itap_del_sel[timing]); + sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing], + sdhci_am654->itap_del_ena[timing]); } static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) @@ -270,7 +273,6 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); unsigned char timing = host->mmc->ios.timing; u32 otap_del_sel; - u32 otap_del_ena; u32 mask, val; regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); @@ -279,10 +281,9 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) /* Setup DLL Output TAP delay */ otap_del_sel = sdhci_am654->otap_del_sel[timing]; - otap_del_ena = (timing > MMC_TIMING_UHS_SDR25) ? 1 : 0; mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; - val = (otap_del_ena << OTAPDLYENA_SHIFT) | + val = (0x1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT); /* Write to STRBSEL for HS400 speed mode */ @@ -299,7 +300,8 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) { sdhci_am654_setup_dll(host, clock); - sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing]); + sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing], + sdhci_am654->itap_del_ena[timing]); sdhci_am654->dll_enable = true; } else { sdhci_am654_setup_delay_chain(sdhci_am654, timing); @@ -317,6 +319,7 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); unsigned char timing = host->mmc->ios.timing; u32 otap_del_sel; + u32 itap_del_ena; u32 mask, val; /* Setup DLL Output TAP delay */ @@ -325,6 +328,12 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; val = (0x1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT); + + itap_del_ena = sdhci_am654->itap_del_ena[timing]; + + mask |= ITAPDLYENA_MASK; + val |= (itap_del_ena << ITAPDLYENA_SHIFT); + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, @@ -484,12 +493,8 @@ static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, memset(fail_window, 0, sizeof(fail_window[0]) * ITAPDLY_LENGTH); - /* Enable ITAPDLY */ - regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK, - 1 << ITAPDLYENA_SHIFT); - for (itap = 0; itap < ITAPDLY_LENGTH; itap++) { - sdhci_am654_write_itapdly(sdhci_am654, itap); + sdhci_am654_write_itapdly(sdhci_am654, itap, 1); curr_pass = !mmc_send_tuning(host->mmc, opcode, NULL); @@ -513,7 +518,7 @@ static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, itap = sdhci_am654_calculate_itap(host, fail_window, fail_index, (sdhci_am654->dll_enable)); - sdhci_am654_write_itapdly(sdhci_am654, itap); + sdhci_am654_write_itapdly(sdhci_am654, itap, 1); return 0; } @@ -662,9 +667,12 @@ static int sdhci_am654_get_otap_delay(struct sdhci_host *host, host->mmc->caps2 &= ~td[i].capability; } - if (td[i].itap_binding) - device_property_read_u32(dev, td[i].itap_binding, - &sdhci_am654->itap_del_sel[i]); + if (td[i].itap_binding) { + ret = device_property_read_u32(dev, td[i].itap_binding, + &sdhci_am654->itap_del_sel[i]); + if (!ret) + sdhci_am654->itap_del_ena[i] = 0x1; + } } return 0; From patchwork Wed Feb 7 01:15:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197689 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1929798dyb; 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMs122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 4/7] mmc: sdhci_am654: Fix itapdly/otapdly array type Date: Tue, 6 Feb 2024 19:15:17 -0600 Message-ID: <20240207011520.3128382-5-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200936659816978 X-GMAIL-MSGID: 1790200936659816978 While integer type works, the otap_del_sel and itap_del_sel arrays are manipulated as u32, so change array types to u32. Fixes: 8ee5fc0e0b3b ("mmc: sdhci_am654: Update OTAPDLY writes") Fixes: a0a62497f6aa ("mmc: sdhci_am654: Add support for input tap delay") Signed-off-by: Judith Mendez --- drivers/mmc/host/sdhci_am654.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 935f581c05d8..35ba7d921690 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -141,8 +141,8 @@ static const struct timing_data td[] = { struct sdhci_am654_data { struct regmap *base; - int otap_del_sel[ARRAY_SIZE(td)]; - int itap_del_sel[ARRAY_SIZE(td)]; + u32 otap_del_sel[ARRAY_SIZE(td)]; + u32 itap_del_sel[ARRAY_SIZE(td)]; u32 itap_del_ena[ARRAY_SIZE(td)]; int clkbuf_sel; int trm_icp; From patchwork Wed Feb 7 01:15:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197686 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1929510dyb; Tue, 6 Feb 2024 17:16:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IHFo2TAEs5VUVgNsBjmkN5UXUegqZm741QePZ5jrmKAdc7MEakmKse+PyvoLau1Nr5bH3aO X-Received: by 2002:a17:902:fc8d:b0:1d9:5b89:98e4 with SMTP id mf13-20020a170902fc8d00b001d95b8998e4mr3698436plb.41.1707268607327; Tue, 06 Feb 2024 17:16:47 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707268607; cv=pass; d=google.com; s=arc-20160816; b=W5+rJ1yO/flEsOMmuh34Z++8yCWl04f2chjlp1EZjc7uT2U59Ma+6ptQuItXcIRAQK 4Gj5/vOF7P18cHX6yQ1Op2JWZa2dZGrJoLqFQYZ3i4V2PLdVCUTPKabcQOa9MG/KUlsc syygxl8xEvqtYmLmSXf8ifz0kS2tmaeMFVr2R94jgbgeQ35X54Ic35VJrF0bUbprNtD4 k5c5JUrbCyaSiuBUJcRwA7VH9ysDTmn1ZBvPRbpzDR7d8zmz8YAcJg8ejngBZdazLoeu XrqQbfGbTxVj6xR2OGhVXA1XQhWgUld0nsHobQf6V8crwJxLidUos7R8eie+ZiZrGZHD Ya2A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3QkH5PeMfynv1lVwJeFYb8Izoef/fk3NGVZv22VOwP8=; fh=0NrFM7imZcE0yyXNaLeK5FGMyE6xqbQSO3ZuyQqnRPU=; b=mfvMLT2nPvNCP6PQa53FYVjmRKyzYly13Urc1wWkSNm7w1Bc4RRcCnSf/Vd6GwF9eF mRKJO/LG9sco3IVKMC4MVllLleYxXGwBVzgom5obRtgQO/5crUWdR1+Hq8ckHfDHvqMW sFbSHRlKGdVdm1BBibm869nhLZtWyoneq1IxesbZwJWbp80miUsuVoJFvlg7Ms2Qp3n5 ikSOGWFWH1iCsUSviY1mUMEIyJea7NwaM84mjG5lcqOaMsQc5u2yytD6wjMy3pcJDbpy /omOrNjA6JXOgJ0fTAkW+3kBqw0V/3QpD15ytiOXgq4yBprDqkc9hks3r/Q37Pl1JFh/ Qnmg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="e5yk/6Bh"; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-55783-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-55783-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCWMPtsccDcvXiE7tV3rxP2sI3SmgpJxAa5dQTFTetVb3lTiV9Q7OUJ4WYyyVT/9iKdkxOI0zXs2hMMVzDsH13uJ4zsuOA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMt122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 5/7] mmc: sdhci_am654: Update comments in sdhci_am654_set_clock Date: Tue, 6 Feb 2024 19:15:18 -0600 Message-ID: <20240207011520.3128382-6-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200886943718114 X-GMAIL-MSGID: 1790200886943718114 The sdhci_am654_set_clock function is also used to enable delay chain, therefore fix comments to be more generic in case we are not enabling DLL. Fixes: fe52e2fbc6ef ("mmc: sdhci_am654: Fix conditions for enabling dll") Signed-off-by: Judith Mendez --- drivers/mmc/host/sdhci_am654.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 35ba7d921690..3755a015f328 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -279,7 +279,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) sdhci_set_clock(host, clock); - /* Setup DLL Output TAP delay */ + /* Setup Output TAP delay */ otap_del_sel = sdhci_am654->otap_del_sel[timing]; mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; @@ -322,7 +322,7 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, u32 itap_del_ena; u32 mask, val; - /* Setup DLL Output TAP delay */ + /* Setup Output TAP delay */ otap_del_sel = sdhci_am654->otap_del_sel[timing]; mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; From patchwork Wed Feb 7 01:15:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197684 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1929266dyb; Tue, 6 Feb 2024 17:16:11 -0800 (PST) X-Google-Smtp-Source: AGHT+IGRRdIWFIn2GEuOpqbjJ0erzaB6uMEBjJORloKgaSxq34pV4XIZOEOqP2UCn0NcfZVPTNiJ X-Received: by 2002:a05:6a21:8007:b0:19e:3cbf:b311 with SMTP id ou7-20020a056a21800700b0019e3cbfb311mr2703970pzb.35.1707268571226; Tue, 06 Feb 2024 17:16:11 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707268571; cv=pass; d=google.com; s=arc-20160816; b=Fz7y+kpeDCb+5GaXRNMzfYYmpYra3eYQuyzN8QTmqTDjZW0iXhda82taX/x0rKvgIz S/gtLPGdt8xJeoiNmp4VfkdfRf5mOV+iZFCc1FE7M7c9gqWSAcDrtCuTZZVahQB/zHyr y6QLecCM7LflIrvYNqpAXSebB1SWeu7/1QM0HfSrXjIPp4//97hCGRie+fdCd0pkbpjX BpE6U9Cak6ZAURX6ako6Dy8isRNhDSWSGHQUugF/qHKJN4Zmc/8v4Sb4wpvHPHu8OKc5 +z4fzQDYq36cEngjq1fhTtpX+ST5+GluFBBP8hAeYW9to3ZeUytRfzRt7+ucYsiW3Y52 K6hA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=mR83B5voDb5d+02ZNHP5nZeXRuP4J2lPClTfUNn3ry8=; fh=A++EWijz7HwyPMhSLzkG6nSb+2THGukw7d6maNYpADI=; b=uIdVo5GoZperUuZ2YDNjxP6rVyLyMNO84G1KvhUrkGATsxkBGv2jkwhPgn3g1Kf0Dg Z0I/ZAS5aLtFr9XEE1TMXkOWzio9xjlIiOpfCFWzNrej7yg0oA+N0/Rkd4BRt7LfOD56 ZK8Eq/vcHvD+pkY7BeBQxvS8InWh13mhmKauojUffX3lJAft4uBK47KxZrag1bVuiHKd pdiKgGmssDjI0NG/6X4Kz1ltvCAIqt5Nj29/rkhBdBnjfjSRvebiRsxVZinUYmLHZlRl sw+dmWOfxZHx5GlAMlVa66aLpXkSusizEY26Hx/E0OHoS8wORZ55G2g/GVff9hdaLzqH zcag==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=JhsS2UaR; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-55780-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-55780-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCWJ9uZ8dhV+CH7NrvNNGATQaxv4Yh7PzoueAQ2rOvUdMuWvPIVRAgpk27o5R5NBTlo9C6WSFaIWmIUhQVJujapZsFDcpA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMu122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 6/7] mmc: sdhci_am654: Add ITAPDLYSEL in sdhci_j721e_4bit_set_clock Date: Tue, 6 Feb 2024 19:15:19 -0600 Message-ID: <20240207011520.3128382-7-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200849455427688 X-GMAIL-MSGID: 1790200849455427688 Add ITAPDLYSEL to sdhci_j721e_4bit_set_clock function. This allows to set the correct ITAPDLY for timings that do not carry out tuning. Fixes: 1accbced1c32 ("mmc: sdhci_am654: Add Support for 4 bit IP on J721E") Signed-off-by: Judith Mendez --- drivers/mmc/host/sdhci_am654.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 3755a015f328..f98cce69a286 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -320,6 +320,7 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, unsigned char timing = host->mmc->ios.timing; u32 otap_del_sel; u32 itap_del_ena; + u32 itap_del_sel; u32 mask, val; /* Setup Output TAP delay */ @@ -329,12 +330,18 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, val = (0x1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT); + /* Setup Input TAP delay */ itap_del_ena = sdhci_am654->itap_del_ena[timing]; + itap_del_sel = sdhci_am654->itap_del_sel[timing]; - mask |= ITAPDLYENA_MASK; - val |= (itap_del_ena << ITAPDLYENA_SHIFT); + mask |= ITAPDLYENA_MASK | ITAPDLYSEL_MASK; + val |= (itap_del_ena << ITAPDLYENA_SHIFT) | + (itap_del_sel << ITAPDLYSEL_SHIFT); + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, + 1 << ITAPCHGWIN_SHIFT); regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0); regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, sdhci_am654->clkbuf_sel); From patchwork Wed Feb 7 01:15:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 197690 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1930058dyb; Tue, 6 Feb 2024 17:18:15 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCX0YCBIXyJTNMUbhtwJ+FR5MD3JUIuvy9WJvAurnM1mpDumrXJmcxQpqgWNhj2KHW/S/OSdvB0WvAOLt87/HuZ+vs61Ow== X-Google-Smtp-Source: AGHT+IGzDEqE6ZsPWzaBm9+FG5y4s71wlI8A3a3mxVgQTidzLXVhPyINWvQqJ9eyxbgx1Gc7MluM X-Received: by 2002:a05:6a20:d385:b0:19e:3a94:6272 with SMTP id iq5-20020a056a20d38500b0019e3a946272mr3437342pzb.44.1707268695437; Tue, 06 Feb 2024 17:18:15 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707268695; cv=pass; d=google.com; s=arc-20160816; b=jiB1aclyaULUM1sTq2rhE+KU2KGfa7yB2bAtlld3t8BTCqOTUxdw9ewpuNuRbPfmtN Mt5mKKz1Ywq9bsbDoe/ecC8KRXz263hcRy/O85A0N8LCkysvTX1n7eI/i4PUP/gmt2r/ e5TXaox73c+DtUuirTXj3iDVoOumPdOq+wFxRQcQSeVc9mMjpPfgDeFc4FVcfVdjQ4cx PqlnDFaGdShj+bMVakEEMAR4I/7Zmo2q9p8LES68u8WtlckthTaopOvrHA2CatB7qJ3I O9cz/Sag238KZiC36Nx6MGzhfUxRRtrk5j3t6qMcrvYkkYt0eX1o9QedfguzhIlWyelN irhA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=/H3cqtffogPEOWqNzSU+l7+Onz5xPiqUXn0e1qs9DK0=; fh=4Kp+X0jQe48/j8wsWV700AKqMrDs+17k76uvTqdBQIk=; b=DRbePCTQSCWiHJmTJ3Pm/ebTFBR95kvvlu7iyT3M8KAJsGHYyb6y+2HD2Rx+Nq2Tpc jX2j8ukFHM+bG81kRLhA4NmclmmKot3CDZz2qBxK9u3dCpt3n5l8gjBtiu7OfPMErOSr FGaZiqLBZXAiaNDvKjKxdV0vsPlSuSoDUK/Jn3IvTMK/ssPf1yB7aAcRLVDLO8N67iNG IcD2xGbq+ki3yA0bm5d5NW+yRKYwMAPRG8PEP3hSww2EAS6yp6yoErdClfvIpiM4deHg fMUKMW8+zrEXtsO3tsiFS9px5R98Gx7r5KcX5w2DZiTitMFU5KEqqp8NCaTQzqbw5ArR 6F+Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZwLqNosD; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-55785-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-55785-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com X-Forwarded-Encrypted: i=2; AJvYcCXWqsM44HzT44vStsnCLEReoOUq3wMMBxu1vxigerD12iAG8sCu7GzY35mA5/ZxJGnOvvWeyZC5tCuL2thER/CEmd8jvg== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Tue, 6 Feb 2024 19:15:20 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4171FKMv122103; Tue, 6 Feb 2024 19:15:20 -0600 From: Judith Mendez To: Ulf Hansson CC: Adrian Hunter , , Subject: [PATCH v2 7/7] mmc: sdhci_am654: Fix ITAPDLY for HS400 timing Date: Tue, 6 Feb 2024 19:15:20 -0600 Message-ID: <20240207011520.3128382-8-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207011520.3128382-1-jm@ti.com> References: <20240207011520.3128382-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790200979566593744 X-GMAIL-MSGID: 1790200979566593744 While STRB is currently used for DATA and CRC responses, the CMD responses from the device to the host still require ITAPDLY for HS400 timing. Currently what is stored for HS400 is the ITAPDLY from High Speed mode which is incorrect. The ITAPDLY for HS400 speed mode should be the same as ITAPDLY as HS200 timing after tuning is executed. Add the functionality to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY. Fixes: a161c45f2979 ("mmc: sdhci_am654: Enable DLL only for some speed modes") Signed-off-by: Judith Mendez --- drivers/mmc/host/sdhci_am654.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index f98cce69a286..280fd4c86c95 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -151,6 +151,7 @@ struct sdhci_am654_data { u32 flags; u32 quirks; bool dll_enable; + bool hs200_tunning; #define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0) }; @@ -175,6 +176,7 @@ static void sdhci_am654_setup_dll(struct sdhci_host *host, unsigned int clock) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); + unsigned char timing = host->mmc->ios.timing; int sel50, sel100, freqsel; u32 mask, val; int ret; @@ -237,6 +239,10 @@ static void sdhci_am654_setup_dll(struct sdhci_host *host, unsigned int clock) dev_err(mmc_dev(host->mmc), "DLL failed to relock\n"); return; } + + /* HS400 ITAPDLY should be the same as HS200 ITAPDLY*/ + if (timing == MMC_TIMING_MMC_HS400) + sdhci_am654->itap_del_sel[timing] = sdhci_am654->itap_del_sel[timing - 1]; } static void sdhci_am654_write_itapdly(struct sdhci_am654_data *sdhci_am654, @@ -310,6 +316,9 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, sdhci_am654->clkbuf_sel); + + if (timing == MMC_TIMING_MMC_HS200 && sdhci_am654->dll_enable) + sdhci_am654->hs200_tunning = true; } static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, @@ -527,6 +536,10 @@ static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, sdhci_am654_write_itapdly(sdhci_am654, itap, 1); + /* Save ITAPDLY for HS200 */ + if (sdhci_am654->hs200_tunning) + sdhci_am654->itap_del_sel[MMC_TIMING_MMC_HS200] = itap; + return 0; }