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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id z10-20020a05600c078a00b0040fe078fb03sm1221591wmo.32.2024.02.06.00.52.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 00:52:44 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, robh+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, Tudor Ambarus Subject: [PATCH 1/4] spi: s3c64xx: explicitly include Date: Tue, 6 Feb 2024 08:52:35 +0000 Message-ID: <20240206085238.1208256-2-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.594.gd9cf4e227d-goog In-Reply-To: <20240206085238.1208256-1-tudor.ambarus@linaro.org> References: <20240206085238.1208256-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790139026312709961 X-GMAIL-MSGID: 1790139026312709961 The driver uses u32 and relies on an implicit inclusion of . It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Fixes: 230d42d422e7 ("spi: Add s3c64xx SPI Controller driver") Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin --- drivers/spi/spi-s3c64xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 72c35dbe53b2..c15ca6a910dc 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -17,6 +17,7 @@ #include #include #include +#include #define MAX_SPI_PORTS 12 #define S3C64XX_SPI_QUIRK_CS_AUTO (1 << 1) From patchwork Tue Feb 6 08:52:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 197256 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1406078dyb; Tue, 6 Feb 2024 00:53:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IFSD5HangME7rUBAwS4DmWscNLWfnGrlRjGaz9obcMiztroYV3ORN0356iTyo7j4t4lpMjJ X-Received: by 2002:a05:622a:20f:b0:42c:2793:e7f6 with SMTP id b15-20020a05622a020f00b0042c2793e7f6mr2222130qtx.64.1707209624261; Tue, 06 Feb 2024 00:53:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707209624; cv=pass; d=google.com; s=arc-20160816; b=xyPIhO45Z4MAGuFNF0+HvsPPfow2/jwbJDJnwuQyL+FBsjWiP/HH/QWNVFPJXkKl3t 8zL8pAkPe5E/ZYCKncz4effLnJSTW1DclQe8tcnCBK4Lfxxg/iUwlVoCYNqKqakdBRqC e5BY5frEo4jbrbykB5vXRL3Wt9i6O0tUBV1XzonTWQypXQRVBizO3/0gEG9t8FSsky/L qyZeXF3m5Q3j2TlOAP9pnz0GT/46jbUOb07PAt+dkLMLbKMtCAbXhq5wwU7hmcmBc04R wPBB4mK6aKvpxH1PnQLAJBTzPm2sm/KurlA21fNqM/kRkVBdh13cFwKzyudXFzfZ1i8x BJPg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=d0QF+4HlffGHefJgdKDHp8fWrwCAllLNXyqxziFTkTw=; fh=ds6/Jn7Y/hbAvW9AhGZ4A1D+Nz0o61ihLGawuqjp3FY=; b=erbvQcj/MX0OfL9oXD/sV+vQ1sfWC7ofZR+a2UtCxulsYR42OgP6TW/MfMLgqo8OlE nkHc8/Ab1OcHDb2Q88QCvCelwyChvII++0Z3zFPaxo2Dks0D5Bl7gOWm+vmN+pdgaz87 yCAseJDPsxY6C14MgdkzxMBvesM1aTZHzIyOh4imGO3O1JLtCAGpfyH2zxJNuPU8DSIe R3JBjvBhK0U/PDU1BV0ry5O8LbAqPRs65buAKHKsYhAkZBIB8Ses9UaQqHMb1GfLwR9l y2vaRDpC5/vGpk8QkSAPkBrPqeDukqAEwmrtKKhw9YizR3ekeWrR7B1UEIAsJRaoNEyB msKA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=je3aQsiG; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-54530-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-54530-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org X-Forwarded-Encrypted: i=1; AJvYcCX27ylrvrIGVxajU2sdHZM4X7hHVtTNDFn6lCg5L2jDDqnBsEGZnghUWj5znDZaFo2b4Za+ZI67TKvlh71KaMz7VgxtYQ== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id z10-20020a05600c078a00b0040fe078fb03sm1221591wmo.32.2024.02.06.00.52.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 00:52:45 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, robh+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, Tudor Ambarus Subject: [PATCH 2/4] spi: dt-bindings: samsung: add google,gs101-spi compatible Date: Tue, 6 Feb 2024 08:52:36 +0000 Message-ID: <20240206085238.1208256-3-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.594.gd9cf4e227d-goog In-Reply-To: <20240206085238.1208256-1-tudor.ambarus@linaro.org> References: <20240206085238.1208256-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790139039220450233 X-GMAIL-MSGID: 1790139039220450233 Add "google,gs101-spi" dedicated compatible for representing SPI of Google GS101 SoC. Reviewed-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski Acked-by: Andi Shyti Signed-off-by: Tudor Ambarus Reviewed-by: Peter Griffin --- Documentation/devicetree/bindings/spi/samsung,spi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Documentation/devicetree/bindings/spi/samsung,spi.yaml index f71099852653..2f0a0835ecfb 100644 --- a/Documentation/devicetree/bindings/spi/samsung,spi.yaml +++ b/Documentation/devicetree/bindings/spi/samsung,spi.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - google,gs101-spi - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 - samsung,s3c6410-spi - samsung,s5pv210-spi # for S5PV210 and S5PC110 From patchwork Tue Feb 6 08:52:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 197257 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1406174dyb; Tue, 6 Feb 2024 00:54:03 -0800 (PST) X-Google-Smtp-Source: AGHT+IHvWqqrzF7PZnex5SdUZjQprlORh8/9njdXz84c4GViA2yW7JgErl6i+0d4aYYi1cboJWsc X-Received: by 2002:a17:906:1c89:b0:a30:8d46:4cac with SMTP id g9-20020a1709061c8900b00a308d464cacmr1059810ejh.67.1707209643658; Tue, 06 Feb 2024 00:54:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707209643; cv=pass; d=google.com; s=arc-20160816; b=uLg+CAtgID/Ix171CLw0OaLoHUWF0cumKvTAsEjf9cCBN1LWWHusolY8YV7VTDS+Nv 8NKL10Wrv+r54YH1bBrseak29gEVPx7UiKDq7E2jIct+vR6OeEoAQZScS5QkP8UnjnvU MxVkHSh9dxkxSl6EKJ5AZRzlq+GorhTOZCW8jQ+UNrhi4eHAV7HFF7K3VnLz3kYGPOK+ NAvTkNvZaUxbyl7707MYnSXPWMHzVIrVq0vEC/gkQy9doPLvrWWeCjIzTAr53RFXu17P wObLyiaOfHdi58xjq3PBsm0Fge1s31LCp/mYRVVY58ubDuOu1mZrFcfo7R3tFx1mvbGb aKgg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=pplEDheF5LYrTZCBre+JeM++nHr5MatV98+DyJwfv+Y=; fh=soB4GF38ILs3MZ7PaZ0LcYfUET1XhvYmmjdpWvV6AUg=; b=OEL11Z7q5rf18TYcaSuIS0LWiyPfJl0fhfspkRznVUnbfZy15l28+7HoUj8JtCMVN5 PCVgLqFc9+gepjmwXByb2DXgU/X5vJz9WFbgQs87AN/qUzfLJIvRylU1iMpTrCYVr9a5 bP+ilSRJnzdtxupmpABAKqG5eGv37p6oA5HADUzMLwYPgTww8zqPn49PTBDqTXO7DLxU Z2Q0UrIvK/TRpyJXFzDM+tih2C8jqFShoUwmwyNHSeo5//K8/N1BfpR5KmQqciTCG+fx 1nOSsg/5WhbDQ7BnDuLF5vvJ4HpSA9h4f8dop9z2OR5l0rm+xpOMLx0W1Yr2mZWVvyl/ Tg0w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LmTkSa0k; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-54531-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-54531-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org X-Forwarded-Encrypted: i=1; AJvYcCXTlbrvXZ0YlsEcR9r7/B1CcguPqhMOerdyAU0zqoz4L1N1W/AGLD74PEnUE9o0FlaY+KhJAuqqO74eqsNpA82A0ddyQw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id z10-20020a05600c078a00b0040fe078fb03sm1221591wmo.32.2024.02.06.00.52.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 00:52:47 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, robh+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, Tudor Ambarus Subject: [PATCH 3/4] spi: s3c64xx: add s3c64xx_iowrite{8,16}_32_rep accessors Date: Tue, 6 Feb 2024 08:52:37 +0000 Message-ID: <20240206085238.1208256-4-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.594.gd9cf4e227d-goog In-Reply-To: <20240206085238.1208256-1-tudor.ambarus@linaro.org> References: <20240206085238.1208256-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790139059537842329 X-GMAIL-MSGID: 1790139059537842329 Allow SoCs that require 32 bits register accesses to write data in chunks of 8 or 16 bits. One SoC that requires 32 bit register accesses is the google gs101. The operation is rare, thus open code it in the driver rather than making it generic (through asm-generic/io.h) Signed-off-by: Tudor Ambarus --- drivers/spi/spi-s3c64xx.c | 70 +++++++++++++++++++++++++++++++-------- 1 file changed, 56 insertions(+), 14 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index c15ca6a910dc..cb45ad615f3d 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -142,6 +142,7 @@ struct s3c64xx_spi_dma_data { * prescaler unit. * @clk_ioclk: True if clock is present on this device * @has_loopback: True if loopback mode can be supported + * @use_32bit_io: True if the SoC allows just 32-bit register accesses. * * The Samsung s3c64xx SPI controller are used on various Samsung SoC's but * differ in some aspects such as the size of the fifo and spi bus clock @@ -158,6 +159,7 @@ struct s3c64xx_spi_port_config { bool clk_from_cmu; bool clk_ioclk; bool has_loopback; + bool use_32bit_io; }; /** @@ -412,6 +414,59 @@ static bool s3c64xx_spi_can_dma(struct spi_controller *host, return false; } +static void s3c64xx_iowrite8_32_rep(volatile void __iomem *addr, + const void *buffer, unsigned int count) +{ + if (count) { + const u8 *buf = buffer; + + do { + __raw_writel(*buf++, addr); + } while (--count); + } +} + +static void s3c64xx_iowrite16_32_rep(volatile void __iomem *addr, + const void *buffer, unsigned int count) +{ + if (count) { + const u16 *buf = buffer; + + do { + __raw_writel(*buf++, addr); + } while (--count); + } +} + +static void s3c64xx_iowrite_rep(const struct s3c64xx_spi_driver_data *sdd, + struct spi_transfer *xfer) +{ + void __iomem *regs = sdd->regs; + + switch (sdd->cur_bpw) { + case 32: + iowrite32_rep(regs + S3C64XX_SPI_TX_DATA, + xfer->tx_buf, xfer->len / 4); + break; + case 16: + if (sdd->port_conf->use_32bit_io) + s3c64xx_iowrite16_32_rep(regs + S3C64XX_SPI_TX_DATA, + xfer->tx_buf, xfer->len / 2); + else + iowrite16_rep(regs + S3C64XX_SPI_TX_DATA, + xfer->tx_buf, xfer->len / 2); + break; + default: + if (sdd->port_conf->use_32bit_io) + s3c64xx_iowrite8_32_rep(regs + S3C64XX_SPI_TX_DATA, + xfer->tx_buf, xfer->len); + else + iowrite8_rep(regs + S3C64XX_SPI_TX_DATA, + xfer->tx_buf, xfer->len); + break; + } +} + static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd, struct spi_transfer *xfer, int dma_mode) { @@ -445,20 +500,7 @@ static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd, modecfg |= S3C64XX_SPI_MODE_TXDMA_ON; ret = s3c64xx_prepare_dma(&sdd->tx_dma, &xfer->tx_sg); } else { - switch (sdd->cur_bpw) { - case 32: - iowrite32_rep(regs + S3C64XX_SPI_TX_DATA, - xfer->tx_buf, xfer->len / 4); - break; - case 16: - iowrite16_rep(regs + S3C64XX_SPI_TX_DATA, - xfer->tx_buf, xfer->len / 2); - break; - default: - iowrite8_rep(regs + S3C64XX_SPI_TX_DATA, - xfer->tx_buf, xfer->len); - break; - } + s3c64xx_iowrite_rep(sdd, xfer); } } From patchwork Tue Feb 6 08:52:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 197258 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp1406496dyb; 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[35.195.168.105]) by smtp.gmail.com with ESMTPSA id z10-20020a05600c078a00b0040fe078fb03sm1221591wmo.32.2024.02.06.00.52.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 00:52:49 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, robh+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, Tudor Ambarus Subject: [PATCH 4/4] spi: s3c64xx: add support for google,gs101-spi Date: Tue, 6 Feb 2024 08:52:38 +0000 Message-ID: <20240206085238.1208256-5-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.594.gd9cf4e227d-goog In-Reply-To: <20240206085238.1208256-1-tudor.ambarus@linaro.org> References: <20240206085238.1208256-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790139025572308570 X-GMAIL-MSGID: 1790139115251864668 Add support for GS101 SPI. GS101 integrates 16 SPI nodes, all with 64 bytes FIFOs. GS101 allows just 32 bit register accesses, otherwise a Serror Interrupt is raised. Do the write reg accesses in 32 bits. Signed-off-by: Tudor Ambarus Reviewed-by: Sam Protsenko --- drivers/spi/spi-s3c64xx.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index cb45ad615f3d..9ad0d513fb30 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -19,7 +19,7 @@ #include #include -#define MAX_SPI_PORTS 12 +#define MAX_SPI_PORTS 16 #define S3C64XX_SPI_QUIRK_CS_AUTO (1 << 1) #define AUTOSUSPEND_TIMEOUT 2000 @@ -1538,6 +1538,19 @@ static const struct s3c64xx_spi_port_config fsd_spi_port_config = { .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, }; +static const struct s3c64xx_spi_port_config gs101_spi_port_config = { + .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, + .rx_lvl_offset = 15, + .tx_st_done = 25, + .clk_div = 4, + .high_speed = true, + .clk_from_cmu = true, + .has_loopback = true, + .use_32bit_io = true, + .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, +}; + static const struct platform_device_id s3c64xx_spi_driver_ids[] = { { .name = "s3c2443-spi", @@ -1550,6 +1563,9 @@ static const struct platform_device_id s3c64xx_spi_driver_ids[] = { }; static const struct of_device_id s3c64xx_spi_dt_match[] = { + { .compatible = "google,gs101-spi", + .data = &gs101_spi_port_config, + }, { .compatible = "samsung,s3c2443-spi", .data = &s3c2443_spi_port_config, },