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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dd8-20020a1709069b8800b007ae1052555dsi13387464ejc.436.2022.11.15.08.52.14; Tue, 15 Nov 2022 08:52:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=Les+63OU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232041AbiKOQvj (ORCPT + 99 others); Tue, 15 Nov 2022 11:51:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229663AbiKOQvi (ORCPT ); Tue, 15 Nov 2022 11:51:38 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 61EA460C1; Tue, 15 Nov 2022 08:51:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1668531097; x=1700067097; h=from:to:subject:date:message-id:mime-version; bh=M037HZoZIJZwjrgxuGpwa/KRgNyMbZlaFJUwnENLVUo=; b=Les+63OUjl4x2Xk2lmk5hyHHWuJ2BUe+TpLqsJt+BJrWKILL7bv8AhnN oeL+IU9ZwFXfG0ZebwzO5Fo+nagzdWpv2/7GNHdRZcX9n7jxrvNllJAc9 dYPDLHL5Wrckh75rWlE87jMnoRga9eYV2pN32KaMjg05+S8l2Fiqip4SC R6HwHfel+oIEMXb9G7lm9sPIIZhCDwaYTXxsmooY7LTZT6O4x6ySpuhcL nT0L+hlaiaXU1/Jfte9zkZ4rPr/MHFfZMBnizgg5kYN5xyUMhR4M9HKhZ pwDOHzdOU5aelYGcLjs1Pqg1fcGt6O/qSfKF1xMW3HjlBfaWCINVnTb5y w==; X-IronPort-AV: E=Sophos;i="5.96,166,1665471600"; d="scan'208";a="189129273" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Nov 2022 09:51:37 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 15 Nov 2022 09:51:36 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 15 Nov 2022 09:51:33 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , Jerry Ray Subject: [net-next][PATCH v2 1/2] dsa: lan9303: Change stat name Date: Tue, 15 Nov 2022 10:51:30 -0600 Message-ID: <20221115165131.11467-1-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749581729415784310?= X-GMAIL-MSGID: =?utf-8?q?1749581729415784310?= This patch changes the reported ethtool statistics for the lan9303 family of parts covered by this driver. The TxUnderRun statistic label is renamed to RxShort to accurately reflect what stat the device is reporting. I did not reorder the statistics as that might cause problems with existing user code that are expecting the stats at a certain offset. Signed-off-by: Jerry Ray Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- v1->v2: Split patch into 2 pieces. --- drivers/net/dsa/lan9303-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 438e46af03e9..80f07bd20593 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -961,7 +961,7 @@ static const struct lan9303_mib_desc lan9303_mib[] = { { .offset = LAN9303_MAC_TX_BRDCST_CNT_0, .name = "TxBroad", }, { .offset = LAN9303_MAC_TX_PAUSE_CNT_0, .name = "TxPause", }, { .offset = LAN9303_MAC_TX_MULCST_CNT_0, .name = "TxMulti", }, - { .offset = LAN9303_MAC_RX_UNDSZE_CNT_0, .name = "TxUnderRun", }, + { .offset = LAN9303_MAC_RX_UNDSZE_CNT_0, .name = "RxShort", }, { .offset = LAN9303_MAC_TX_64_CNT_0, .name = "Tx64Byte", }, { .offset = LAN9303_MAC_TX_127_CNT_0, .name = "Tx128Byte", }, { .offset = LAN9303_MAC_TX_255_CNT_0, .name = "Tx256Byte", }, From patchwork Tue Nov 15 16:51:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerry Ray X-Patchwork-Id: 20473 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2835377wru; Tue, 15 Nov 2022 08:54:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf5W+/cw13UQOlEyhlrUH6LCIxbq5RhEaklvH3CpcYGt6jWKvufeaLuUCjzYSyRcmKmx7qSi X-Received: by 2002:a17:906:1c03:b0:78d:3ff8:6ec8 with SMTP id k3-20020a1709061c0300b0078d3ff86ec8mr14295368ejg.568.1668531289832; Tue, 15 Nov 2022 08:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668531289; cv=none; d=google.com; s=arc-20160816; b=idWtW7BbXXTIowBpuWFvNRFrkqEGFGhOo2eZ9FAC8wKEDgamyUoHmXpgIhbuyi8U3d UtG39LQPonqZsKfZYwttj61hW7fh4+sxJhh/Bd+duRkxAwd5w75FxBNFGGNz3Yhy1GL8 AGyzvWVEHfRdeDEbSD2Epw2N9ZmQmlGhSgJa/TyqMMqIu7RrA4Av87gP4/Xt6E9CJ/ZK nu5R0hJKEGHKhuTR7tIxnuXe1TDm2ZCZ+cwUEImxYmNxxfDplJwHsCitvSBQGUi5Q/oG Pbn/ordY6l0PTcwY3jKOepeakEiZICDd53ck2T6F+SYxNpe3vQgEy9Zt4s7DeSAvRmlB jkCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=83Z+U5i6h9OC7Z/jlW4OeRcqt7szZXqzv+k5e/4nmIM=; b=l4hSUwPKYRAOUwejsP7NEUGf5IoD02ZCMtdbnncUYrsMIDlrn4y3V9EMSb6Qlj28q4 Qwyijt5oyCAXcJZDEWhMWgJDbZ4tQ8CnOyeYsqT1zBRObiAT54QRShMFuOZltNEWeySQ hji7QMivVzMzTLflqsEHltosWbtt7tJL42LNVM6R4/VRKI+5jFk9H44YzL7EKahh4efz 7C1PmlX3PYfJBMbxwEbFgpBmoluoihJt6n70bWPwyYoZ5A0NTrK5LKRr27gXM5au3GMq svw+ZdF3IqLlczc27Pl09oBAgyZ1haQRjvduDlaaVGQO9A+hWyBR3JKojorUZZfZ0KP/ ldWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=l9yL7WY5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , , , Jerry Ray Subject: [net-next][PATCH v2 2/2] dsa: lan9303: Add 2 ethtool stats Date: Tue, 15 Nov 2022 10:51:31 -0600 Message-ID: <20221115165131.11467-2-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221115165131.11467-1-jerry.ray@microchip.com> References: <20221115165131.11467-1-jerry.ray@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749581865601972949?= X-GMAIL-MSGID: =?utf-8?q?1749581865601972949?= Adding RxDropped and TxDropped counters to the reported statistics. As these stats are kept by the switch rather than the port instance, they are indexed differently. Signed-off-by: Jerry Ray Reviewed-by: Andrew Lunn --- v1->v2: Split patch into 2 pieces. Removed the adding of a module number to the driver. --- drivers/net/dsa/lan9303-core.c | 38 ++++++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index 80f07bd20593..714a21d7aa0a 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -177,10 +177,12 @@ #define LAN9303_SWE_INGRESS_PORT_TYPE 0x1847 #define LAN9303_SWE_INGRESS_PORT_TYPE_VLAN 3 #define LAN9303_BM_CFG 0x1c00 +#define LAN9303_BM_DRP_CNT_SRC_0 0x1c05 #define LAN9303_BM_EGRSS_PORT_TYPE 0x1c0c # define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT2 (BIT(17) | BIT(16)) # define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT1 (BIT(9) | BIT(8)) # define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT0 (BIT(1) | BIT(0)) +#define LAN9303_BM_RATE_DRP_CNT_SRC_0 0x1c16 #define LAN9303_SWITCH_PORT_REG(port, reg0) (0x400 * (port) + (reg0)) @@ -978,10 +980,16 @@ static const struct lan9303_mib_desc lan9303_mib[] = { { .offset = LAN9303_MAC_TX_LATECOL_0, .name = "TxLateCol", }, }; +/* Buffer Management Statistics (indexed by port) */ +static const struct lan9303_mib_desc lan9303_switch_mib[] = { + { .offset = LAN9303_BM_RATE_DRP_CNT_SRC_0, .name = "RxDropped", }, + { .offset = LAN9303_BM_DRP_CNT_SRC_0, .name = "TxDropped", }, +}; + static void lan9303_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) { - unsigned int u; + unsigned int i, u; if (stringset != ETH_SS_STATS) return; @@ -990,26 +998,44 @@ static void lan9303_get_strings(struct dsa_switch *ds, int port, strncpy(data + u * ETH_GSTRING_LEN, lan9303_mib[u].name, ETH_GSTRING_LEN); } + for (i = 0; i < ARRAY_SIZE(lan9303_switch_mib); i++) { + strncpy(data + (u + i) * ETH_GSTRING_LEN, + lan9303_switch_mib[i].name, ETH_GSTRING_LEN); + } } static void lan9303_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data) { struct lan9303 *chip = ds->priv; - unsigned int u; + unsigned int i, u; for (u = 0; u < ARRAY_SIZE(lan9303_mib); u++) { u32 reg; int ret; - ret = lan9303_read_switch_port( - chip, port, lan9303_mib[u].offset, ®); - + /* Read Port-based MIB stats. */ + ret = lan9303_read_switch_port(chip, port, + lan9303_mib[u].offset, + ®); if (ret) dev_warn(chip->dev, "Reading status port %d reg %u failed\n", port, lan9303_mib[u].offset); data[u] = reg; } + for (i = 0; i < ARRAY_SIZE(lan9303_switch_mib); i++) { + u32 reg; + int ret; + + /* Read Switch stats indexed by port. */ + ret = lan9303_read_switch_reg(chip, + (lan9303_switch_mib[i].offset + + port), ®); + if (ret) + dev_warn(chip->dev, "Reading status port %d reg %u failed\n", + port, lan9303_switch_mib[i].offset); + data[i + u] = reg; + } } static int lan9303_get_sset_count(struct dsa_switch *ds, int port, int sset) @@ -1017,7 +1043,7 @@ static int lan9303_get_sset_count(struct dsa_switch *ds, int port, int sset) if (sset != ETH_SS_STATS) return 0; - return ARRAY_SIZE(lan9303_mib); + return ARRAY_SIZE(lan9303_mib) + ARRAY_SIZE(lan9303_switch_mib); } static int lan9303_phy_read(struct dsa_switch *ds, int phy, int regnum)