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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 7758E740164; Mon, 5 Feb 2024 03:53:00 -0800 (PST) To: gcc-patches@gcc.gnu.org Cc: hongyu.wang@intel.com, lingling.kong@intel.com Subject: [PATCH] x86-64: Update gcc.target/i386/apx-ndd.c Date: Mon, 5 Feb 2024 03:53:00 -0800 Message-ID: <20240205115300.19866-1-user@gnu-cfl-3> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-3024.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, FROM_NO_USER, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790059767406420929 X-GMAIL-MSGID: 1790059767406420929 Fix the following issues: 1. Replace long with int64_t to support x32. 2. Replace \\(%rdi\\) with \\(%(?:r|e)di\\) for memory operand since x32 uses (%edi). 3. Replace %(?:|r|e)al with %al in negb scan. * gcc.target/i386/apx-ndd.c: Updated. --- gcc/testsuite/gcc.target/i386/apx-ndd.c | 68 ++++++++++++------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/gcc/testsuite/gcc.target/i386/apx-ndd.c b/gcc/testsuite/gcc.target/i386/apx-ndd.c index b215f66d3e2..0eb751ad225 100644 --- a/gcc/testsuite/gcc.target/i386/apx-ndd.c +++ b/gcc/testsuite/gcc.target/i386/apx-ndd.c @@ -75,9 +75,9 @@ FOO2 (short, add, +) FOO (int, add, +) FOO1 (int, add, +) FOO2 (int, add, +) -FOO (long, add, +) -FOO1 (long, add, +) -FOO2 (long, add, +) +FOO (int64_t, add, +) +FOO1 (int64_t, add, +) +FOO2 (int64_t, add, +) FOO (char, sub, -) FOO1 (char, sub, -) @@ -85,8 +85,8 @@ FOO (short, sub, -) FOO1 (short, sub, -) FOO (int, sub, -) FOO1 (int, sub, -) -FOO (long, sub, -) -FOO1 (long, sub, -) +FOO (int64_t, sub, -) +FOO1 (int64_t, sub, -) F (char, neg, -) F1 (char, neg, -) @@ -94,8 +94,8 @@ F (short, neg, -) F1 (short, neg, -) F (int, neg, -) F1 (int, neg, -) -F (long, neg, -) -F1 (long, neg, -) +F (int64_t, neg, -) +F1 (int64_t, neg, -) F (char, not, ~) F1 (char, not, ~) @@ -103,8 +103,8 @@ F (short, not, ~) F1 (short, not, ~) F (int, not, ~) F1 (int, not, ~) -F (long, not, ~) -F1 (long, not, ~) +F (int64_t, not, ~) +F1 (int64_t, not, ~) FOO (char, and, &) FOO1 (char, and, &) @@ -112,8 +112,8 @@ FOO (short, and, &) FOO1 (short, and, &) FOO (int, and, &) FOO1 (int, and, &) -FOO (long, and, &) -FOO1 (long, and, &) +FOO (int64_t, and, &) +FOO1 (int64_t, and, &) FOO (char, or, |) FOO1 (char, or, |) @@ -121,8 +121,8 @@ FOO (short, or, |) FOO1 (short, or, |) FOO (int, or, |) FOO1 (int, or, |) -FOO (long, or, |) -FOO1 (long, or, |) +FOO (int64_t, or, |) +FOO1 (int64_t, or, |) FOO (char, xor, ^) FOO1 (char, xor, ^) @@ -130,8 +130,8 @@ FOO (short, xor, ^) FOO1 (short, xor, ^) FOO (int, xor, ^) FOO1 (int, xor, ^) -FOO (long, xor, ^) -FOO1 (long, xor, ^) +FOO (int64_t, xor, ^) +FOO1 (int64_t, xor, ^) FOO (char, shl, <<) FOO3 (char, shl, <<, 7) @@ -139,8 +139,8 @@ FOO (short, shl, <<) FOO3 (short, shl, <<, 7) FOO (int, shl, <<) FOO3 (int, shl, <<, 7) -FOO (long, shl, <<) -FOO3 (long, shl, <<, 7) +FOO (int64_t, shl, <<) +FOO3 (int64_t, shl, <<, 7) FOO (char, sar, >>) FOO3 (char, sar, >>, 7) @@ -148,8 +148,8 @@ FOO (short, sar, >>) FOO3 (short, sar, >>, 7) FOO (int, sar, >>) FOO3 (int, sar, >>, 7) -FOO (long, sar, >>) -FOO3 (long, sar, >>, 7) +FOO (int64_t, sar, >>) +FOO3 (int64_t, sar, >>, 7) FOO (uint8_t, shr, >>) FOO3 (uint8_t, shr, >>, 7) @@ -170,33 +170,33 @@ FOO4 (uint16_t, rol, <<, >>, 1) FOO4 (uint32_t, rol, <<, >>, 1) FOO4 (uint64_t, rol, <<, >>, 1) -/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "lea(?:l|q)\[^\n\r]\\(%r(?:d|s)i,%r(?:d|s)i\\), %(?:|r|e)ax" 4 } } */ -/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ -/* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), %(?:|r|e)di, %(?:|r|e)a(?:x|l)" 4 } } */ -/* { dg-final { scan-assembler-times "negb\[^\n\r]\\(%rdi\\), %(?:|r|e)al" 1 } } */ -/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)ax" 3 } } */ +/* { dg-final { scan-assembler-times "negb\[^\n\r]\\(%(?:r|e)di\\), %al" 1 } } */ +/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]\\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */ /* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */ -/* { dg-final { scan-assembler-times "not(?:b|l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "not(?:b|l|w|q)\[^\n\r]\\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "not(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */ -/* { dg-final { scan-assembler-times "andb\[^\n\r]*1, \\(%rdi\\), %al" 1 } } */ -/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 3 } } */ +/* { dg-final { scan-assembler-times "andb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 1 } } */ +/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */ /* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 2 } } */ /* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 2 } } */ -/* { dg-final { scan-assembler-times "orb\[^\n\r]*1, \\(%rdi\\), %al" 2} } */ -/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 6 } } */ +/* { dg-final { scan-assembler-times "orb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 2} } */ +/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 6 } } */ /* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 4 } } */ /* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 4 } } */ -/* { dg-final { scan-assembler-times "xorb\[^\n\r]*1, \\(%rdi\\), %al" 1 } } */ -/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 3 } } */ +/* { dg-final { scan-assembler-times "xorb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 1 } } */ +/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */ /* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 2 } } */ /* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 2 } } */ -/* { dg-final { scan-assembler-times "sal(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "sal(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "sal(?:l|w|q)\[^\n\r]*7, %(?:|r|e)di, %(?:|r|e)ax" 4 } } */ -/* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*7, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */ -/* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */ +/* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*7, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "ror(?:b|l|w|q)\[^\n\r]*1, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */ /* { dg-final { scan-assembler-times "rol(?:b|l|w|q)\[^\n\r]*1, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */