From patchwork Mon Feb 5 11:06:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 196744 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp802112dyb; Mon, 5 Feb 2024 03:09:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IF7CMw1DdbyXcb18s2eUDCOhvdAE2BldftIonVqex++P8GtEXUOGWa93soZfDp4IkdfedU8 X-Received: by 2002:a17:906:1999:b0:a36:95cd:5e5f with SMTP id g25-20020a170906199900b00a3695cd5e5fmr6048383ejd.62.1707131394184; Mon, 05 Feb 2024 03:09:54 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707131394; cv=pass; d=google.com; s=arc-20160816; b=lLykkQZlq3OCf0sbzLR9bPmPIpy9RRCL+q+xAeZheRshUVRKZwVEpOshpugBtUsHcP K44maVgkDqGrmhmLgMKhPXoHVgwXaNGfFhvJcZlp3qjU/S6uq7jRQAdHTrBGonD+H5QH fsQ+ho1M9AtE5B4ugb3oXjg+236d4YWCKQh/uWqubbtvOjVYtW4wMbn4OgbZfPcVINPp ewYNw5ZhCJjNbEQlcdP7A+40OKGqUBtQs4W4c+AgPo/Z71HOLjU1wwV/NYYysWAB9IyV hzrOmKg4a1Jvw8R8k7CbydmCQcwqazqbQkaZ6LflwZZxGwfvIuOZ3u3LrPoGVzQsTOUo SArg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=8evmcANvLo6jh3xstHm898bZGrgcAECcDQy69Rj/ud4=; fh=iLLRPLGNmHMa8FWdXVC07OGx2kT9NC1DRYAUQ0RAnYE=; b=YlB76QUjtJ0SjZUZt5Hz7FfhyzCXIRm73tpDKeDXOeNUWS6ZDXmjyRQz4BsjAuhvBU r8gYslVi5Ctd8T25SCq6X45Psv3fer0kQ0kglXIW9Z8q0ZrUH+110RtdbqgKNyMYRY8b oV1h4sbVJ0//zR4p+ZIbXSb+PhTm2EkGlCLn4lrsp2tUTkRAbHTny48Z49raN6+xX6ud KFFrrn8OL51plSB2Bm3KKQ0aQ4mjbj0UZdcBwlwYEEwpXavp1IGcueouDfDdNE0ORyWL VUjx0OvRhsXM+cMAxMlRkKhhv3xbcAaGElTSjEfHPIGwzMB91zBtsoqKD9lT6nsBgnBL fiuQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=iCkTrKDG; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52461-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52461-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=1; AJvYcCUCTFfeYgmkCIWYUXjisKGmlQFqZfX8DLmJtT8R7+xcrhc7SaI1g9y5iynxJK645RxscUFJ00QFsVMRXDHLvf/onwYcHg== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id r4-20020a1709067fc400b00a372a2371dasi3099612ejs.257.2024.02.05.03.09.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 03:09:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-52461-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=iCkTrKDG; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52461-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52461-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 9D5011F225B8 for ; Mon, 5 Feb 2024 11:09:53 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5701D1B81F; Mon, 5 Feb 2024 11:08:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="iCkTrKDG" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EF9B1B7F9; Mon, 5 Feb 2024 11:08:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131286; cv=none; b=eW5CbzrrEHGcZbIBuFPoyiH+YmasDTQwwkSSzmA+Gt0/nlI7A5stqCxA5dMGgI8qIK7sg6Fu48GtrLxdH5WFBMZOks+X0vU5AjCa12JaGHWT0esP8QqEOiNdkIYYBpAAJ4z/Gnj6ttMHKpxWf+NIARcAxOCvoF5jXFPsUZu8aHY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131286; c=relaxed/simple; bh=7mWEWnxAauLCFNk47f49pAB6QNSuMAx+Qk1dfenkHL8=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=J4clzdN2VcGA9xfKXD4jc+O7YsXkQHpmp6Ef9flD+UZijuF/d/FWqVa6UYqlbS2Iw3RSRdKHTTgyhqr2mPCQaiiZafdPyoHW7Hx7lp6NBGsMImu7dHfgQdsRq1OYYFJ0IccUb2d4nxIAl+4UKFYAOzFE3H/hY6gBZ03NnnNtnlg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=iCkTrKDG; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707131284; x=1738667284; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=7mWEWnxAauLCFNk47f49pAB6QNSuMAx+Qk1dfenkHL8=; b=iCkTrKDGJ29LmHya9ZXTMcVdTE0mM0H4Ske/qWym2FgsSDR/M/xj8pKx 8IjNbKGZmi+UrNvKHluwjR54kfSid+CmDTpHDGFGFVzsf6mVh4IT5Mmge bTZ6EwHwCF+9WfUdhPjmR8VdQTp5GfkfnfuPk19bDAforO/j6gyc+bAxv HVvjG3mx2ST2LtZ5ZynfjkP38JUk1C2DzdIcMYI+MZnvZ2R02t6oIK4vd b6kskxTkqXW9PyOtRpiOcIZwClFDjucqKulgHBmlR3LLxoHuuFLwpJsyp iWBtUrUJG/x7UvveoYHBWrRie16aJz2FEDSwxq2LIT3/kqkLS8kZD1kFJ A==; X-CSE-ConnectionGUID: tvnljXD9ScO2Biw+t+1Jqg== X-CSE-MsgGUID: uOaGY4zKTEaXsI2/T8fQgg== X-IronPort-AV: E=Sophos;i="6.05,245,1701154800"; d="scan'208";a="17124179" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 04:07:44 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 04:06:35 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 04:06:24 -0700 From: Dharma Balasubiramani To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [linux][PATCH v2 1/4] dt-bindings: display: bridge: add sam9x75-lvds compatible Date: Mon, 5 Feb 2024 16:36:06 +0530 Message-ID: <20240205110609.217022-2-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240205110609.217022-1-dharma.b@microchip.com> References: <20240205110609.217022-1-dharma.b@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790057008955459814 X-GMAIL-MSGID: 1790057008955459814 Add the 'sam9x75-lvds' compatible binding, which describes the Low Voltage Differential Signaling (LVDS) Controller found on some Microchip's sam9x7 series System-on-Chip (SoC) devices. This binding will be used to define the properties and configuration for the LVDS Controller in DT. Signed-off-by: Dharma Balasubiramani Reviewed-by: Rob Herring --- Changelog v1 -> v2 - Remove '|' in description, as there is no formatting to preserve. - Remove 'gclk' from clock-names as there is only one clock(pclk). - Remove the unused headers and include only used ones. - Change the compatible name specific to SoC (sam9x75) instead of entire series. - Change file name to match the compatible name. --- .../bridge/microchip,sam9x75-lvds.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml b/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml new file mode 100644 index 000000000000..862ef441ac9f --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-lvds.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip SAM9X75 LVDS Controller + +maintainers: + - Dharma Balasubiramani + +description: + The Low Voltage Differential Signaling Controller (LVDSC) manages data + format conversion from the LCD Controller internal DPI bus to OpenLDI + LVDS output signals. LVDSC functions include bit mapping, balanced mode + management, and serializer. + +properties: + compatible: + const: microchip,sam9x75-lvds + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Peripheral Bus Clock + + clock-names: + items: + - const: pclk + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + lvds-controller@f8060000 { + compatible = "microchip,sam9x75-lvds"; + reg = <0xf8060000 0x100>; + interrupts = <56 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 56>; + clock-names = "pclk"; + }; From patchwork Mon Feb 5 11:06:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 196742 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp801669dyb; Mon, 5 Feb 2024 03:08:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IEtjJOEr92VU79SAd9aHTiKONxAe3yM+Jjm71rM4aNrwrPsp/T/6XNUxE16KuMVDaiLlc6M X-Received: by 2002:a50:931d:0:b0:55f:d7f8:1072 with SMTP id m29-20020a50931d000000b0055fd7f81072mr6580484eda.3.1707131334238; Mon, 05 Feb 2024 03:08:54 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707131334; cv=pass; d=google.com; s=arc-20160816; b=tY1wb3OpAAALnFVQ2/i+1orvWstuE26e4Q+QnyL1cJf1GMeac04ivRUCH+NToUU3A2 l+E32II4s0lHpEci8Tw/t1wF4gSjWb+tSgQvLh3tHBxBtzoTGZrXi4pwtWc8NBFCP7XL 59Q8D7tQebLWnmHHm8tV+cyxx0Vz8htDWwMfXhQ6tWtX/2PA621t/M/AkUyVhPzGanP1 NR2CgvyHui/aVNj/wZYEUi53ZBdKfbcu5Lq7H2CctkIT7SgNRI0nL3zwhfqTASCEQi9T 8BBOSXKJzesCMmfEvpO2wfqqsEVPjyj5t6NJUFkMM5b8CbIGEnNXQXOXdhbFl23t/Ujf HEKA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=vaHNRKnA375db3zZi5K9CxdKJBSuvfE2wbjBTzzKlHc=; fh=jV+VqZAM9jgp8B3BDncge+axI43hhtG5EMz1yVKj0Is=; b=0xDUM2UuSJlZdm+FfSHVJIEvhgSF9XTketuVmEVGhYzbP16uw+Rd+Kyzx8DO7PcMdX 1ON6g2XI02DT6ShJwojAG4XfhDxl5N1Bovn6l/fw8pel6oWtp5U5i1uwE2MWiG04ORlI /hTURdmbQmPz39wGa3hyMbZv0hK9mvG1lKdDzDM9aPPlDkmBrVavZGK++rSObBXVyTza KVLz0499VVQ9jIec4qD+kVY/+mbqoXQj58rTiTL4iC2rhwYuMpG94INnyY4FMQEz7qJJ iBRdOf4MmyCaHscpgUfIfVkAJ1wudDt5498U68/l6fAaMhC5tx6iuxwZmM6ktS6RMDfl llGg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=2aM9watJ; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52457-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52457-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=1; AJvYcCVmRTP9tyF7id+EzLJIwwu1MREE6U88k1UR6t0Ep5De12F9tNk1NYeGkmgm0NitS0iogSXqdTO1sBtMhuM0q8txCztsEw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id f8-20020a056402354800b0055ef0580007si3987828edd.527.2024.02.05.03.08.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 03:08:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-52457-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=2aM9watJ; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52457-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52457-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 98D051F21050 for ; Mon, 5 Feb 2024 11:08:53 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E44EE199A1; Mon, 5 Feb 2024 11:07:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="2aM9watJ" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0723D18E06; Mon, 5 Feb 2024 11:07:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131225; cv=none; b=aI19SsWPKR4XguHWPTGlQdvD7xfF9h3JLJhLiEfLeyLJkd8jNQo8h4kc/BLwqxcpIpF2J4hgoj+ikAaZ6tlqdDqGal0Dkgb1R/RhCSAQS2Esyq/XtEydSytnyTSEGeBjflkPw+18fSR7SuGGdE821VOF39sPZInlCF95TRz8tJI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131225; c=relaxed/simple; bh=93sWw0tsZ0/s/AYtwW+wil0XQ/js1pn5cKN1hlqrgYY=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ByCa/J2apTVtyx3coz3gC1d55G+UIAbA3V2RsP7MBPxswAsfTXg85+qMNfCEWh2FMt0DkaHuwD5t6qeQ09RMYwXEM15AgF4Nlk0eoIJw71FmBkHlr/d4zM5UmNNWw4Po2qLrWH2sAlgm3XJ0DgqFbH15hDxcEMoizPDlEiico2c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=2aM9watJ; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707131224; x=1738667224; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=93sWw0tsZ0/s/AYtwW+wil0XQ/js1pn5cKN1hlqrgYY=; b=2aM9watJHDQlERQZa/jMz+BRCHqGaGHSZvowHUIkmiZ4HV8LqvzfUcA6 IjPjzI3hNrRYRjjISlxNf7mM01NsAAHRPPYvpq5HHNFcvD1z3E/6GWa3E jdXoJxUbrsSRyHjrFZmTiGOUX8dERb8XrMJ4Hmo97dznRRw5LhzyxEkTa 4xt1vV3U/tXSullIjTVPFDd1/cSlF4MMyszhrx9AbordGBQJFwqGyqQi0 e5fuU4Pr/FlKIqDAO0Qq9G5BRjtUDjt2pdubrqMa1VgrqeL7DEIXIiu5y KbKMdKTZuQAsuyTnmEtyaBmHTHdUt6CfTYbN514dAZlCClc823/ps5jyt Q==; X-CSE-ConnectionGUID: d0Ju6iadS6i+zgwU4BqudA== X-CSE-MsgGUID: jtmTi14yTHC127kX+fAZHA== X-IronPort-AV: E=Sophos;i="6.05,245,1701154800"; d="scan'208";a="246500312" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 04:07:02 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 04:06:46 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 04:06:36 -0700 From: Dharma Balasubiramani To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [linux][PATCH v2 2/4] drm/bridge: add lvds controller support for sam9x7 Date: Mon, 5 Feb 2024 16:36:07 +0530 Message-ID: <20240205110609.217022-3-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240205110609.217022-1-dharma.b@microchip.com> References: <20240205110609.217022-1-dharma.b@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790056946257256974 X-GMAIL-MSGID: 1790056946257256974 Add a new LVDS controller driver for sam9x7 which does the following: - Prepares and enables the LVDS Peripheral clock - Defines its connector type as DRM_MODE_CONNECTOR_LVDS and adds itself to the global bridge list. - Identifies its output endpoint as panel and adds it to the encoder display pipeline - Enables the LVDS serializer Signed-off-by: Manikandan Muralidharan Signed-off-by: Dharma Balasubiramani --- Changelog v1 -> v2 - Drop 'res' variable and combine two lines into one. - Handle deferred probe properly, use dev_err_probe(). - Don't print anything on deferred probe. Dropped print. - Remove the MODULE_ALIAS and add MODULE_DEVICE_TABLE(). - symbol 'mchp_lvds_driver' was not declared. It should be static. --- drivers/gpu/drm/bridge/Kconfig | 7 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/microchip-lvds.c | 246 ++++++++++++++++++++++++ 3 files changed, 254 insertions(+) create mode 100644 drivers/gpu/drm/bridge/microchip-lvds.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 3e6a4e2044c0..200afb36e421 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -173,6 +173,13 @@ config DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW to DP++. This is used with the i.MX6 imx-ldb driver. You are likely to say N here. +config DRM_MICROCHIP_LVDS_SERIALIZER + tristate "Microchip LVDS serailzer support" + depends on OF + depends on DRM_ATMEL_HLCDC + help + Support for Microchip's LVDS serializer. + config DRM_NWL_MIPI_DSI tristate "Northwest Logic MIPI DSI Host controller" depends on DRM diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 2b892b7ed59e..e3804e93d324 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o +obj-$(CONFIG_DRM_MICROCHIP_LVDS_SERIALIZER) += microchip-lvds.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/bridge/microchip-lvds.c new file mode 100644 index 000000000000..508321ad0f66 --- /dev/null +++ b/drivers/gpu/drm/bridge/microchip-lvds.c @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries + * + * Author: Manikandan Muralidharan + * Author: Dharma Balasubiramani + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define LVDS_POLL_TIMEOUT_MS 1000 + +/* LVDSC register offsets */ +#define LVDSC_CR 0x00 +#define LVDSC_CFGR 0x04 +#define LVDSC_SR 0x0C +#define LVDSC_WPMR 0xE4 + +/* Bitfields in LVDSC_CR (Control Register) */ +#define LVDSC_CR_SER_EN BIT(0) + +/* Bitfields in LVDSC_CFGR (Configuration Register) */ +#define LVDSC_CFGR_PIXSIZE_24BITS 0 +#define LVDSC_CFGR_DEN_POL_HIGH 0 +#define LVDSC_CFGR_DC_UNBALANCED 0 +#define LVDSC_CFGR_MAPPING_JEIDA BIT(6) + +/*Bitfields in LVDSC_SR */ +#define LVDSC_SR_CS BIT(0) + +/* Bitfields in LVDSC_WPMR (Write Protection Mode Register) */ +#define LVDSC_WPMR_WPKEY_MASK GENMASK(31, 8) +#define LVDSC_WPMR_WPKEY_PSSWD 0x4C5644 + +struct mchp_lvds { + struct device *dev; + void __iomem *regs; + struct clk *pclk; + int format; /* vesa or jeida format */ + struct drm_panel *panel; + struct drm_bridge bridge; + struct drm_bridge *panel_bridge; +}; + +static inline struct mchp_lvds *bridge_to_lvds(struct drm_bridge *bridge) +{ + return container_of(bridge, struct mchp_lvds, bridge); +} + +static inline u32 lvds_readl(struct mchp_lvds *lvds, u32 offset) +{ + return readl_relaxed(lvds->regs + offset); +} + +static inline void lvds_writel(struct mchp_lvds *lvds, u32 offset, u32 val) +{ + writel_relaxed(val, lvds->regs + offset); +} + +static void lvds_serialiser_on(struct mchp_lvds *lvds) +{ + unsigned long timeout = jiffies + msecs_to_jiffies(LVDS_POLL_TIMEOUT_MS); + + /* The LVDSC registers can only be written if WPEN is cleared */ + lvds_writel(lvds, LVDSC_WPMR, (LVDSC_WPMR_WPKEY_PSSWD & + LVDSC_WPMR_WPKEY_MASK)); + + /* Wait for the status of configuration registers to be changed */ + while (lvds_readl(lvds, LVDSC_SR) & LVDSC_SR_CS) { + if (time_after(jiffies, timeout)) { + dev_err(lvds->dev, "%s: timeout error\n", __func__); + return; + } + usleep_range(1000, 2000); + } + + /* Configure the LVDSC */ + lvds_writel(lvds, LVDSC_CFGR, (LVDSC_CFGR_MAPPING_JEIDA | + LVDSC_CFGR_DC_UNBALANCED | + LVDSC_CFGR_DEN_POL_HIGH | + LVDSC_CFGR_PIXSIZE_24BITS)); + + /* Enable the LVDS serializer */ + lvds_writel(lvds, LVDSC_CR, LVDSC_CR_SER_EN); +} + +static int mchp_lvds_attach(struct drm_bridge *bridge, + enum drm_bridge_attach_flags flags) +{ + struct mchp_lvds *lvds = bridge_to_lvds(bridge); + + bridge->encoder->encoder_type = DRM_MODE_ENCODER_LVDS; + + return drm_bridge_attach(bridge->encoder, lvds->panel_bridge, + bridge, flags); +} + +static void mchp_lvds_enable(struct drm_bridge *bridge) +{ + struct mchp_lvds *lvds = bridge_to_lvds(bridge); + int ret; + + ret = clk_enable(lvds->pclk); + if (ret < 0) { + DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret); + return; + } + + ret = pm_runtime_get_sync(lvds->dev); + if (ret < 0) { + DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret); + clk_disable(lvds->pclk); + return; + } + + lvds_serialiser_on(lvds); +} + +static void mchp_lvds_disable(struct drm_bridge *bridge) +{ + struct mchp_lvds *lvds = bridge_to_lvds(bridge); + + pm_runtime_put(lvds->dev); + clk_disable(lvds->pclk); +} + +static const struct drm_bridge_funcs mchp_lvds_bridge_funcs = { + .attach = mchp_lvds_attach, + .enable = mchp_lvds_enable, + .disable = mchp_lvds_disable, +}; + +static int mchp_lvds_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mchp_lvds *lvds; + struct device_node *port; + int ret; + + if (!dev->of_node) + return -ENODEV; + + lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL); + if (!lvds) + return -ENOMEM; + + lvds->dev = dev; + + lvds->regs = devm_ioremap_resource(lvds->dev, + platform_get_resource(pdev, IORESOURCE_MEM, 0)); + if (IS_ERR(lvds->regs)) + return PTR_ERR(lvds->regs); + + lvds->pclk = devm_clk_get(lvds->dev, "pclk"); + if (IS_ERR(lvds->pclk)) + return dev_err_probe(lvds->dev, PTR_ERR(lvds->pclk), + "could not get pclk_lvds\n"); + + ret = clk_prepare(lvds->pclk); + if (ret < 0) { + DRM_DEV_ERROR(lvds->dev, "failed to prepare pclk_lvds\n"); + return ret; + } + + port = of_graph_get_remote_node(dev->of_node, 1, 0); + if (!port) { + DRM_DEV_ERROR(dev, + "can't find port point, please init lvds panel port!\n"); + return -EINVAL; + } + + lvds->panel = of_drm_find_panel(port); + of_node_put(port); + + if (IS_ERR(lvds->panel)) + return -EPROBE_DEFER; + + lvds->panel_bridge = devm_drm_panel_bridge_add(dev, lvds->panel); + + if (IS_ERR(lvds->panel_bridge)) + return PTR_ERR(lvds->panel_bridge); + + lvds->bridge.of_node = dev->of_node; + lvds->bridge.type = DRM_MODE_CONNECTOR_LVDS; + lvds->bridge.funcs = &mchp_lvds_bridge_funcs; + + dev_set_drvdata(dev, lvds); + pm_runtime_enable(dev); + + drm_bridge_add(&lvds->bridge); + + return 0; +} + +static int mchp_lvds_remove(struct platform_device *pdev) +{ + struct mchp_lvds *lvds = platform_get_drvdata(pdev); + + pm_runtime_disable(&pdev->dev); + clk_unprepare(lvds->pclk); + + return 0; +} + +static const struct of_device_id mchp_lvds_dt_ids[] = { + { + .compatible = "microchip,sam9x75-lvds", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, mchp_lvds_dt_ids); + +static struct platform_driver mchp_lvds_driver = { + .probe = mchp_lvds_probe, + .remove = mchp_lvds_remove, + .driver = { + .name = "microchip-lvds", + .of_match_table = mchp_lvds_dt_ids, + }, +}; +module_platform_driver(mchp_lvds_driver); + +MODULE_AUTHOR("Manikandan Muralidharan "); +MODULE_AUTHOR("Dharma Balasubiramani "); +MODULE_DESCRIPTION("Low Voltage Differential Signaling Controller Driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Feb 5 11:06:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 196743 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp801795dyb; Mon, 5 Feb 2024 03:09:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IE2fCs5PyW9ORghI7Eabd/0kWYX04m+8SQsekhWbaqZNLaBv++Y6rJmLpUrozo6qwO7EOhK X-Received: by 2002:ac8:4447:0:b0:42a:7169:4359 with SMTP id m7-20020ac84447000000b0042a71694359mr6316347qtn.66.1707131349333; Mon, 05 Feb 2024 03:09:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707131348; cv=pass; d=google.com; s=arc-20160816; b=J7Yj6RhaxnPkmUAV5Wjs+D4fStU5R8jT88ujMEpNLiYdDaN/vkctrhL7t1Vh05oDcS DlvoBmUk27Inh7VzZiRKGOh2bEhaB1q8Fmnh3KmncOSuLmlv6mzBrlQKKB3fCy8Raz8Z 1+3QA90VOAN10Uv335dp7+BgNE6Fr2AVqxoQXD58AeHU1MUZg3+2JE6tJ86fG0yqGYQv QmHzuRhc+Ypi9Yu+UdMyJaV/5OVU1EpcAN4/+ZvEAtggNsO4NsqiSofx+6kFCulfdamk 0lLCdJ6+fWabjIjEbHHSVtBnK/SfaiMA2Oleg98jc/AuT6J83EYl5Ci0QZBaPsZZZdBP Ymzg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=QK/bePtc0jHALSjw5owddNTmgKNA6NVGiPIHSfU7xII=; fh=jFcWOV3v9e0E6kirLDTOXq7gDWgo6fa2d3OCoUfPltM=; b=sxM4SP3LTE+ZISPTVAtWPOKjgZhGp56OTHYe/E+CanMpK5mq0EfT68+9PiivYsfQ7S DRM4CYPsSgtrZ9h+VlidbF/qhbKArph+sKHB+GyOY+dVR+zRzBML4QfntED9uajbP2Gw bpXPWWBT3wVLWUnyZzY6Rplg3xx+LZMaNlL9hbXRyfcc4Yd2cbBRdjos4/PEHVK7rH2J ASimSlaJCVXD8RNTDJBEFbVtzPuUDX7Z+69xOT4GWUszZ8VOpZpyglJ6qRxm6zLRfvxz SvnYjySOrF6geOhKGve7cIML/qLD/k4Iai/MjI8rS0VRXJeUou4ywnktH6QKnAAzViHv R/lQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=lF9Tpyva; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52458-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52458-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=1; AJvYcCWHK0+mUxWVvyGSicXCgFtbpInITzeU0NkmH9A8ZebmSjnw9wl4tpfJFBJyweDbAW7lfveeQGGzPS6XkZPwo9PFDPCg9A== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [147.75.199.223]) by mx.google.com with ESMTPS id w3-20020ac857c3000000b0042ab1abe300si8196601qta.69.2024.02.05.03.09.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 03:09:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-52458-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=lF9Tpyva; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52458-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52458-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 8F7201C21D15 for ; Mon, 5 Feb 2024 11:09:08 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 931DA1A5BA; Mon, 5 Feb 2024 11:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="lF9Tpyva" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DE0418EB2; Mon, 5 Feb 2024 11:07:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131252; cv=none; b=CSDo2Ss3BNQFhPe7cpk4ZXW3lUv7AFQHKxO9GAkDGE+q8xWXfa3VECi+G1gF1pGiDxbz5TF1SnFZ84e3pnvZGEoxaGIclJo6BJWe17ybrvMNqM3BWmhqHNhZBGgXUxMZisEiYK3RDkmuRSRYbLL10p9TbIxYIU4CHo+lKsAvef4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131252; c=relaxed/simple; bh=xpa5OEHrZhzJFKNUpZbNZM8rzmZMnZWnSvw1+lSjgOU=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mpzMeYqXNcR6DqvVXqnhME4Zhg9nDU3i/Ea4LMWrmTZr2OH4Bv0U1i8svIfgSvqcLAPT5OpxeDVPVbk8+c5n6d9+0qajoZmhatE5f1GP2AlzwJ2wCa+FYfPmwKm9fGd/+e8OvJ5RLjo7x/t+jkxzoIcmdUpfRrTTxGj3WtUoCzc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=lF9Tpyva; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707131251; x=1738667251; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=xpa5OEHrZhzJFKNUpZbNZM8rzmZMnZWnSvw1+lSjgOU=; b=lF9TpyvalllZY+5I13TlZTy96hf6AvEIO1N1/ecOI9kKqql0cMVcLbyn z/tlIKxbFw9m6j5E6AQlbK469t8fE8Ao1VbY1h2D5qgnhKqzWT6U4NPiy MscxFnK8D4YSUOx/DOuH7Re8iLug/eDN2i04sfD/HPIEjKDyzsSb1vJGg 29VkX6F8A5eRY5pOt0r/ZBgloR4dZudyqzFVPx+hL9MNSUXNxYVb2nZ8B qNnT84kBQFyg4dmtSQyBU3BHKGqMF3xIxdigKLy3tZ5RgQMqAHjv27fu+ qV9IUG7okztVKbiLsxGKlDf1x1BziNiigwtqxN5xGv33LBVMGsOlparO9 w==; X-CSE-ConnectionGUID: 3y4Nx3goS+WM5v3ulNT5AA== X-CSE-MsgGUID: y2eWaWXhRMKpJxkvRZCu7Q== X-IronPort-AV: E=Sophos;i="6.05,245,1701154800"; d="scan'208";a="183034596" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 04:07:29 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 04:06:57 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 04:06:47 -0700 From: Dharma Balasubiramani To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [linux][PATCH v2 3/4] MAINTAINERS: add SAM9X7 SoC's LVDS controller Date: Mon, 5 Feb 2024 16:36:08 +0530 Message-ID: <20240205110609.217022-4-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240205110609.217022-1-dharma.b@microchip.com> References: <20240205110609.217022-1-dharma.b@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790056960870783031 X-GMAIL-MSGID: 1790056960870783031 Add the newly added LVDS controller for the SAM9X7 SoC to the existing MAINTAINERS entry. Signed-off-by: Dharma Balasubiramani Reviewed-by: Neil Armstrong Acked-by: Nicolas Ferre --- Changelog v1 -> v2 - No Changes. --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a7c4cf8201e0..24a266d20df6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14230,6 +14230,14 @@ S: Supported F: Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml F: drivers/power/reset/at91-sama5d2_shdwc.c +MICROCHIP SAM9x7-COMPATIBLE LVDS CONTROLLER +M: Manikandan Muralidharan +M: Dharma Balasubiramani +L: dri-devel@lists.freedesktop.org +S: Supported +F: Documentation/devicetree/bindings/display/bridge/microchip,sam9x7-lvds.yaml +F: drivers/gpu/drm/bridge/microchip-lvds.c + MICROCHIP SOC DRIVERS M: Conor Dooley S: Supported From patchwork Mon Feb 5 11:06:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 196754 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp814404dyb; Mon, 5 Feb 2024 03:38:28 -0800 (PST) X-Google-Smtp-Source: AGHT+IHDUTocx+6TPc32k8rQLAHJeW0PGTFFA84zY9bS9i1CZK+B737Am7XXp1yOmBq6Q9QYat5s X-Received: by 2002:a05:6e02:d50:b0:363:b2d5:4bcd with SMTP id h16-20020a056e020d5000b00363b2d54bcdmr9977695ilj.23.1707133108535; Mon, 05 Feb 2024 03:38:28 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707133108; cv=pass; d=google.com; s=arc-20160816; b=qnDP2uPkLgSwzZbe3BWXyuNZZi1yqOrOadj913l8VUcI5YHa88Ghf4ue/ZWsGs0Du0 Z+wFnj54R3+HC4Gx8eYDwFt5F1e+SBSibTsrT6X7cilB+C9yPTf0wTihaXQvAt9e8VKP Jilx0wKaQAOXyFu0g7luB2J18a9vKWin15I24OOKsQAf8tUg6CGEiiUSJrUAZgH0cv5B 1guRdAxPLzHIrEd7KknNkNFcA7mAtb3g7K3CTIXtgxsxrPlY0xo4wi5DZesYD2FpgPCS ry8iMcnaNhM/OFln970OWn7Z6+9xLav+7gaCwgucBAaupiCUurxRlouXgwGJjM33FyTb NjmA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:to:from:dkim-signature; bh=MTZ7W5TKAFa9WiBCMvdLeq8+IU0vcL7igF+cC6SPIx8=; fh=kAkTEKz2HZipusedGeSnFazHbPSm7YlA1Cqlm/SxprU=; b=AW1yYpxiENDs3djSowgabjLfjnOK+ah0OUTpYudqffcVRcbUOCKRurr3yWczovF3cb QuxjivMqwjSpHTtjxak84NtB5x145bFM0LwRaOSXeHpDgl/ppzVp+0bHe2K/71I2CI/t jwC5+aw2nhurMamZUsK/E6XthIPO7D7Uyq9Eq4mqyDDK/G5PST32qz3u8LVkNhfpLnBz xBMpdoSS83mPwIASryZfugQaJDQgugXtZ+048Acv3CI6/XWG4fkbFuaOzDRKAsxM29jM 1TtQLrxql8QjR1q1IT/qDX7vcGsHYTRRpE2T0DBN0cZAtedoHieVDw0tOgfJYZxOd2Wz ZNwQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=RhDRsEOE; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52459-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52459-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com X-Forwarded-Encrypted: i=1; AJvYcCWwfx0GvDQ2EkExopcxnPtHiUII6e6hrwm8Bu0wfTjTvHzy+sQDXT6TM6L2fel/kP6Ot0gR2fF7+O2rAwMNHtRhVXwaXA== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id i194-20020a639dcb000000b005d79b83e587si5921752pgd.2.2024.02.05.03.38.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 03:38:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-52459-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=RhDRsEOE; arc=pass (i=1 spf=pass spfdomain=microchip.com dkim=pass dkdomain=microchip.com dmarc=pass fromdomain=microchip.com); spf=pass (google.com: domain of linux-kernel+bounces-52459-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52459-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=microchip.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id A48D5B28E42 for ; Mon, 5 Feb 2024 11:09:24 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1B4821B270; Mon, 5 Feb 2024 11:07:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="RhDRsEOE" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3E9C1864D; Mon, 5 Feb 2024 11:07:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131262; cv=none; b=COL+F48aMod4OL3CxSQ3Hn+Bld0ZgZwNJ0jYdfiub9vIdisS04AQ8FD5Yy5GXY9PR/HcR7b/ehFBdlNUXBnqQaCtmhYEDy2s+XEhN9TrbkkgEZVnPZ2ASGGkY0qBGJdI/Ltt4gvRQqi25Df7XLs+SmEZ1xmHXAj6fP+Qv/HhYzs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707131262; c=relaxed/simple; bh=h1WG3UMHH5D0iOHOLKyKvreY2dXMkB2LB/fSkxyjgcM=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Jr5jewXq2yzH1MGcdXHCkaytgVkak0rJPC1qQN6nT9KxEWhjf/LfiE8jCjyL72J8JdeQBRc3lPa/JxrGbSjMpIpuAZakVixVwXBN4Mg/r7hxM6FV7J3AiaKfh3RFt9qMDzEnrzT9y8Rtm2W3gInUm/m0yDLqDTvHwJM5gp79GyM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=RhDRsEOE; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707131260; x=1738667260; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=h1WG3UMHH5D0iOHOLKyKvreY2dXMkB2LB/fSkxyjgcM=; b=RhDRsEOE7tB0BCC/dE4/R/Me91gJOZvZ1uLQCegkDOS+s3zKvyegQQOh FnZhjsr0eORTMXh/sx/DnjHlTRpKtV1L+syQzbuqa5knnMA900DxmEsYd qHjAEzMGD0ecHFIcpMHoKKV/8k1Y5+RGvyY5e0t4grFFVXVv0kY+Ejtg4 VoNwMY1pnDUVGLyd0BYhkwuTvFhD7zDbfVD9lwgRCLi+B/QDW3DpsYlsG 4uJ3iAmMJLsURO3KCZPTsHO4SrDR+X2h1+udAb7RFfJnXaPNNgkzbhS7t /stQNrsJdn9ejcBN1pSleGPRMYcyDtg7G74iNEDLoHGqtSJQv9damUHpY A==; X-CSE-ConnectionGUID: 2GfonfF1TQOVFAeAw91dnA== X-CSE-MsgGUID: PG0Ncdl8SaK5OtSI4wbZmg== X-IronPort-AV: E=Sophos;i="6.05,245,1701154800"; d="scan'208";a="16285316" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 04:07:39 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 04:07:09 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 04:06:58 -0700 From: Dharma Balasubiramani To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [linux][PATCH v2 4/4] ARM: configs: at91: Enable LVDS serializer support Date: Mon, 5 Feb 2024 16:36:09 +0530 Message-ID: <20240205110609.217022-5-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240205110609.217022-1-dharma.b@microchip.com> References: <20240205110609.217022-1-dharma.b@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790058806361302518 X-GMAIL-MSGID: 1790058806361302518 Enable LVDS serializer support for display pipeline. Signed-off-by: Dharma Balasubiramani Acked-by: Hari Prasath Gujulan Elango Acked-by: Nicolas Ferre --- arch/arm/configs/at91_dt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index 71b5acc78187..6a7714beb099 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -143,6 +143,7 @@ CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV7740=m CONFIG_DRM=y CONFIG_DRM_ATMEL_HLCDC=y +CONFIG_DRM_MICROCHIP_LVDS_SERIALIZER=y CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_EDP=y CONFIG_FB_ATMEL=y