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Mon, 5 Feb 2024 10:06:53 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AB8CB29E60A; Mon, 5 Feb 2024 10:06:53 +0100 (CET) Received: from localhost (10.252.18.216) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 5 Feb 2024 10:06:53 +0100 From: Raphael Gallais-Pou Date: Mon, 5 Feb 2024 10:06:51 +0100 Subject: [PATCH 1/5] ARM: dts: stm32: add LTDC support for STM32MP13x SoC family Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240205-ltdc_mp13-v1-1-072d24bf1b36@foss.st.com> References: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> In-Reply-To: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou , Yannick Fertre X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-05_04,2024-01-31_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790049580922892800 X-GMAIL-MSGID: 1790049580922892800 STM32MP13x SoC family embeds a new version of LTDC (Liquid crystal display - Thin film transistor) Display Controller. It provides a parallel digital RGB (red, green, blue) and signals for horizontal, vertical synchronization, pixel clock and data enable as output to interface directly to a variety of LCD-TFT panels. Main features * 2 input layers blended together to compose the display * Cropping of layers from any input size and location * Multiple input pixel formats: – Predefined ARGB, with 7 formats: ARGB8888, ABGR8888, RGBA8888, BGRA8888, RGB565, BGR565, RGB888packed. – Flexible ARGB, allowing any width and location for A,R,G,B components. – Predefined YUV, with 3 formats: YUV422-1L (FourCC: YUYV, Interleaved), YUV420-2L (FourCC: NV12, semi planar), YUV420-3L (FourCC: Yxx, full planar) with some flexibility on the sequence of the component. * Color look-up table (CLUT) up to 256 colors (256x24 bits) per layer * Color transparency keying * Composition with flexible window position and size versus output display * Blending with flexible layer order and alpha value (per pixel or constant) * Background underlying color * Gamma with non-linear configurable table * Dithering for output with less bits per component (pseudo-random on 2 bits) * Polarity inversion for HSync, VSync, and DataEnable outputs * Output as RGB888 24 bpp or YUV422 16 bpp * Secure layer (using Layer2) capability, with grouped regs and additional interrupt set * Interrupts based on 7 different events * AXI master interface with long efficient bursts (64 or 128 bytes) Signed-off-by: Raphael Gallais-Pou Signed-off-by: Yannick Fertre --- arch/arm/boot/dts/st/stm32mp135.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi index 68d32f9f5314..834a4d545fe4 100644 --- a/arch/arm/boot/dts/st/stm32mp135.dtsi +++ b/arch/arm/boot/dts/st/stm32mp135.dtsi @@ -19,5 +19,16 @@ dcmipp: dcmipp@5a000000 { port { }; }; + + ltdc: display-controller@5a001000 { + compatible = "st,stm32-ltdc"; + reg = <0x5a001000 0x400>; + interrupts = , + ; + clocks = <&rcc LTDC_PX>; + clock-names = "lcd"; + resets = <&scmi_reset RST_SCMI_LTDC>; + status = "disabled"; + }; }; }; From patchwork Mon Feb 5 09:06:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 196689 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp754767dyb; Mon, 5 Feb 2024 01:11:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IFJRCCZGG/8SVrHIeWLAXSckoLBiD6MowfBlT/iitnoIfgoyt9fh3JhxVof8Ntq4zzlV3pK X-Received: by 2002:aa7:d407:0:b0:55f:8d03:411c with SMTP id z7-20020aa7d407000000b0055f8d03411cmr4160400edq.24.1707124269515; Mon, 05 Feb 2024 01:11:09 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707124269; cv=pass; d=google.com; s=arc-20160816; b=X7diuITgGPkCb2rVZAcQphBsywhYH8lUKBA9a5nAXQaQACGdOVD3i6dgSP5RPmyqU+ YhVQoR9Z7ZYIEKf/gYT4z+jT9pbR54FvuF+PrMJAu37P6/3/FaIx/Hl3fj9WuvTfBPpL TsCjWXX5M2BZqVdQ/XMEac0PYtpAijKMV1VvUR9N8aGXHg/TGbKiLkcbl9Ce1vCKNKO7 2BPKH9NXdjYhQHdEew5e+4JRiKAgQ3XPNhj2qnbpsYaKPBXiXyl+1vMtyLlRy4FMKSto T39+IPy/xRpWeX0tSoEbQ/2a48rqEm3UVXGf8psNadaMBRZP076CksANf3HiYUaeVyE/ q7gA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=B/DdT1Hekue/y2cbdJTf13MdZkRgi2lmLP5jnu8Gv/8=; fh=kMTKTDj+a2zQ3sU4jFzyPeylkZ/JdDxO3JPfBZndIzA=; b=TgWFMQqEPwVOs2pJfI5+x+CwmlahBHQdij8Yu580DJKIZIEfRGYctT5uvbJnbckYMW jnWct9daJ+gyy1z6gOL9KLUA+rnRQRsOsEGn+EQ2aw5J1QnHNUgmm9/zfwUyeEHNsDtK gzI05QGd29k5L2Rhimol9T7UX1hJhzzFUmLBFSLgAQUhoQNKx8zL1BujRtEBtaBd4zBk 2wSwGUENO3NsYD4qOTvOAeu8wnyiyFpGRRVsIogM1dGgSS+GRg7tv4ZASrAqafNAprAR +4SDgpT2snWJhOVtilU0Z8T3l8CrE4FtdGLrT7IvPhZAAa+2i2iL6VYgF86QUc+cNC3G nJkw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b="C/BBR+Tb"; arc=pass (i=1 spf=pass spfdomain=foss.st.com dkim=pass dkdomain=foss.st.com dmarc=pass fromdomain=foss.st.com); spf=pass (google.com: domain of linux-kernel+bounces-52262-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52262-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com X-Forwarded-Encrypted: i=1; AJvYcCX0pmuvlDILfQ4YB4I12frVD3bBfLi1tPNK+AIJ9ZU3AIafcrpyJ8+Nln3CSoNgfYjuVKOX6L48vAoWsnfKB7Jwef0vQw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Mon, 5 Feb 2024 10:06:54 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C966929E60E; Mon, 5 Feb 2024 10:06:54 +0100 (CET) Received: from localhost (10.252.18.216) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 5 Feb 2024 10:06:53 +0100 From: Raphael Gallais-Pou Date: Mon, 5 Feb 2024 10:06:52 +0100 Subject: [PATCH 2/5] ARM: dts: stm32: add LTDC pinctrl on STM32MP13x SoC family Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240205-ltdc_mp13-v1-2-072d24bf1b36@foss.st.com> References: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> In-Reply-To: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-05_04,2024-01-31_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790049537719274031 X-GMAIL-MSGID: 1790049537719274031 Adds LTDC pinctrl support and assigns dedicated GPIO pins. Signed-off-by: Raphael Gallais-Pou --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 57 +++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 27e0c3826789..32c5d8a1e06a 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -47,6 +47,63 @@ pins { }; }; + ltdc_pins_a: ltdc-0 { + pins { + pinmux = , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + }; + + ltdc_sleep_pins_a: ltdc-sleep-0 { + pins { + pinmux = , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; /* LCD_B7 */ + }; + }; + mcp23017_pins_a: mcp23017-0 { pins { pinmux = ; From patchwork Mon Feb 5 09:06:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 196688 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp754728dyb; Mon, 5 Feb 2024 01:11:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IE29wNCbDEdWsiZTqDNXp4e7ekLkNzo6IXdGPyBbEoItEe+fBMa8isrMoijkF14icJERRAb X-Received: by 2002:ae9:f50d:0:b0:783:b434:df3 with SMTP id o13-20020ae9f50d000000b00783b4340df3mr13199884qkg.24.1707124264942; Mon, 05 Feb 2024 01:11:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707124264; cv=pass; d=google.com; s=arc-20160816; b=cqUgVPXtFbLMDRitnlXZjkps0lzbm3tA4xUoiGXvEHes9ewF4eo22U0xhbYaqxOOGb lqYQr5oa7WfNvp+dfVKe+WlJWxfCYDSLq2fnkvffhM13w6wZR920QEHmdut2AyS4vrSa mqlPzt2RWZnmg9qTqxBru/mkVAytT2uQoD0asRUmGfOsK8bNBCevkUtdpwgLjWyA7/bH AtTWKVUftNEXklBQj7V28fjUQ9OYKdNBhsv5rKXE1wyPCV2wBOCUxECvImGulqs3ReWP QexOP4U0zyKA5egZAPzcWjgMKdFh1GA2GeXJeZkMcHrA8WNV1DzrCHw3jlq6T42qRcAY ZZ8Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=44uxu8CEcvShH8eLpIXKggO7bIejdghXxS3SHpQ45mI=; fh=5ffemyI1yK8Tou96ORAvnon3N5OdTzy/2xtAButADYc=; b=OSrbQBhEjB9p7o0XXUJfQfIxcJfQW+rdf/yxr3pxS4WbPy36YgjOGiMRnECOTxuolj DIohCVIVp+P1JfvYISiMXqRG3DyQxtaIJo7kVMZWd0Uc5/T/ZtaTCfNejQebod/Qm66Z CfGPLzA6mXEF1d8VPn/t5rz4Vd24pnIvDRB/z8Frk7kWkL60yWN3YVLSjOHCSLxJTdo8 eqjskbpBKTGdRMFQDRCuqMh/Nr6F7/YWn24QeupN544Py+Vzi1A4mwZJDdM/yWUXsZxA PWmjNXrxgGTSbtpLswtEAKVlMSMwtAhuQK95EwvoUpjJ5E2p+OMyUsdmWGwOcccTXL7+ YJaA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=f9zdSFop; arc=pass (i=1 spf=pass spfdomain=foss.st.com dkim=pass dkdomain=foss.st.com dmarc=pass fromdomain=foss.st.com); spf=pass (google.com: domain of linux-kernel+bounces-52259-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52259-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com X-Forwarded-Encrypted: i=1; AJvYcCV29J1iRWOLVSe7YOrmrMqsI8DbBGvCOYmjuFFgbhDoDgjwI/Gu5JxayyCQeqUn23SsNxsvKGOiBIV/K9pm4o7IBxJSdQ== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Mon, 5 Feb 2024 10:06:54 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A6C8829E60D; Mon, 5 Feb 2024 10:06:54 +0100 (CET) Received: from localhost (10.252.18.216) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 5 Feb 2024 10:06:54 +0100 From: Raphael Gallais-Pou Date: Mon, 5 Feb 2024 10:06:53 +0100 Subject: [PATCH 3/5] ARM: dts: stm32: enable display support on stm32mp135f-dk board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240205-ltdc_mp13-v1-3-072d24bf1b36@foss.st.com> References: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> In-Reply-To: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-05_04,2024-01-31_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790049533120009082 X-GMAIL-MSGID: 1790049533120009082 Link panel and display controller. Enable panel, backlight and display controller. Signed-off-by: Raphael Gallais-Pou --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 55 +++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index eea740d097c7..4a52d314c46d 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -66,6 +66,48 @@ led-blue { default-state = "off"; }; }; + + panel_backlight: panel-backlight { + compatible = "gpio-backlight"; + gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>; + default-on; + default-brightness-level = <0>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h", "panel-dpi"; + enable-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; + backlight = <&panel_backlight>; + power-supply = <&scmi_v3v3_sw>; + data-mapping = "bgr666"; + status = "okay"; + + width-mm = <105>; + height-mm = <67>; + + panel-timing { + clock-frequency = <10000000>; + hactive = <480>; + hback-porch = <43>; + hfront-porch = <10>; + hsync-len = <1>; + hsync-active = <0>; + vactive = <272>; + vback-porch = <26>; + vfront-porch = <4>; + vsync-len = <10>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; }; &adc_1 { @@ -160,6 +202,19 @@ &iwdg2 { status = "okay"; }; +<dc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <<dc_pins_a>; + pinctrl-1 = <<dc_sleep_pins_a>; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &rtc { status = "okay"; }; From patchwork Mon Feb 5 09:06:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 196687 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp754704dyb; Mon, 5 Feb 2024 01:11:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IEGtMBqUcQjIS+ujv2vxUHGKayen8XlwSYDIsxQJ9ZD90sgc/NeNBf2+cPZgo95U9GpaGA5 X-Received: by 2002:a05:6e02:20ef:b0:363:a61b:52bb with SMTP id q15-20020a056e0220ef00b00363a61b52bbmr15100459ilv.14.1707124262200; Mon, 05 Feb 2024 01:11:02 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707124262; cv=pass; d=google.com; s=arc-20160816; b=y5avA3v8Is0RbsZEFu9g7NX+1236Ccu++i+l51PTPEQIvnPyi4kt8jcsclux22e8Um mMnNlGC8ASIPsbNbgc5hEMu9g5bqLZAyb+MBhvBHjTNKPKhwJ4ny/yAmBbcgzt1Dutdr 35zdUIytIv4zUUUS6pfQYqY8pXWZwL4iPJ+yg+GTc6Niv4EXTneBb+OV6ZGBDwJqt2JM vYG2Sp8s3ZeZ107hQL4P+T3AKhGubzBxEdrdmqqphpKh1/eCisMAbp79TDoKtmDejGT7 e9PT23pGho5ZZjpJU8Hexhy0SF2FrPkowInwx81MaUXN062cVEW5GejERYNUcfPEaY/w 5XTQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=s+csqZNeYkrIpb1E9IDQxL9nuwxhFuBXUexzaWPxbGg=; fh=o6cTGR2rVnsUB8la5HnveIjnRQgdOMialNqTa8AcTWo=; b=U8IgAPcYa8FHN/TbxJW3uxPUsCwb6CMu81MjPGSV3HJW5ryWeqKHK5nMy7PM1xv9kp UmabB7XGKZcVBo4oMUV2XyPjB7CHBRZRPCHiMSdNqcFfUoNjMPbHKdLm510OxMAT1aJT YLpBygxPFTVxpqbPIIb3/8s3HZXASLqTrCmujqYoWJwiYDL0ILoETziCSFHJ0AE3Pjc6 A/nONxScJtPsGDS1ybaL3AFrJv59AQ6+NBdp1jau9s2Z0mi8M9G7y3zJPYCK7MqFzur8 EmVOIl/mQRDl3uE7YbxknanFr8gnese9qAz2yj5BNDP+UfA8ywBoS+IOQ2B1lquUKqEz 4nAA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=Uw8jSUoF; arc=pass (i=1 spf=pass spfdomain=foss.st.com dkim=pass dkdomain=foss.st.com dmarc=pass fromdomain=foss.st.com); spf=pass (google.com: domain of linux-kernel+bounces-52258-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52258-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com X-Forwarded-Encrypted: i=1; AJvYcCUpv1981iQiHYecvjPLe1m3wo+4kwcwX2OhOA9+9yQJKhN2wLuFoA9RCJCYLdKxH5ynlrCDRs7yCLRyqnw7QroFHaiOCA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Mon, 5 Feb 2024 10:06:55 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 34A8C29E60F; Mon, 5 Feb 2024 10:06:55 +0100 (CET) Received: from localhost (10.252.18.216) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 5 Feb 2024 10:06:54 +0100 From: Raphael Gallais-Pou Date: Mon, 5 Feb 2024 10:06:54 +0100 Subject: [PATCH 4/5] drm/panel: simple: fix flags on RK043FN48H Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240205-ltdc_mp13-v1-4-072d24bf1b36@foss.st.com> References: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> In-Reply-To: <20240205-ltdc_mp13-v1-0-072d24bf1b36@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , , Raphael Gallais-Pou X-Mailer: b4 0.12.4 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-05_04,2024-01-31_01,2023-05-22_02 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790049530351928481 X-GMAIL-MSGID: 1790049530351928481 DISPLAY_FLAGS_SYNC_POSEDGE is missing in the flags on the default timings. When overriding the default mode with one described in the device tree, the mode does not get acked because of this missing flag. Moreover since the panel is driven by the positive edge it makes sense to add it here. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Neil Armstrong Reviewed-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-simple.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 2214cb09678c..7b286382ffb4 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3523,7 +3523,8 @@ static const struct display_timing rocktech_rk043fn48h_timing = { .vfront_porch = { 1, 4, 4 }, .vsync_len = { 1, 10, 10 }, .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW | - DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE, + DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE | + DISPLAY_FLAGS_SYNC_POSEDGE, }; static const struct panel_desc rocktech_rk043fn48h = { From patchwork Mon Feb 5 09:26:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 196707 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:168b:b0:106:860b:bbdd with SMTP id ma11csp772167dyb; Mon, 5 Feb 2024 01:58:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IGLKw6uIgrJlEnEA7aOPONsPD8V2Yp6fBtCN551iVL06nhWTArLSAtP2WpqRrlryO3lTFIO X-Received: by 2002:a17:90a:6d63:b0:296:edb:60b4 with SMTP id z90-20020a17090a6d6300b002960edb60b4mr10097832pjj.44.1707127124807; Mon, 05 Feb 2024 01:58:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707127124; cv=pass; d=google.com; s=arc-20160816; b=IyPkr3XRT5hMao8HFce4UPezQwA2d8HITQL5D4sbdGLXi8NzhgFh8IxS5Ojz2QrZ+w FPqhpnKmda+6I/9QKtqdUulC562WGmy/iykcRAy0YTDF+jM8j9Bcey2TSnbI8reoeeD9 6nJcDqU3cFUqgYzSC623AYo78NrBbGjgkhaoiNuB2/Dl0SFPeICOQip1pbzF5FgAqI08 Y+g70dQzuiLw12cElwDrB5vRRLdegVHJvM3AOaTXfOL5gcx2Vc/hy4zvIPtSeTSPpXWb nA83RaHjnBq1relVGo1o8JPttVJeYivPLb6EWPEZdXB744bWRnWuKr45ORQoJq0FM0fB c2aQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=yRD+45wPol9C5Oo/j6x0XsNhrnxr5qZGHo18uofpfm4=; fh=CJodLp7d3g4sppKpetdkWl8s37ANn7cTnknC17suraI=; b=l76N6dZhmLTXP1YWMUibxST7RFcX7M6y3s+ecURGXfbjw/dUPQE53eoPtpU8BT2XgM eG6iBwWQjoEvnDw+BhMh9BoetFChIqHW8G+rf1gO90iWwac3PvKOprnJf7HyPWX9aUCT MmxRcsuPGyjZd86c/6NNtpLza8aCxXnNPJLtmtfOMCWiWnJcQ5slMRdl0w22lSFwQZVT SDbgyxJySmhKnBuNuMCi7BYFlbg81/53QO5n+q8LCUYPzgSWWvAC6iZTYlRzDOjWdUkw lsGBTs3fldzuLfA2Fl+PexMSdqamixRNOepHg9t93QifnKYCP2TiY8/gxVkWEevmFdr3 YySg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=ELAybzml; arc=pass (i=1 spf=pass spfdomain=foss.st.com dkim=pass dkdomain=foss.st.com dmarc=pass fromdomain=foss.st.com); spf=pass (google.com: domain of linux-kernel+bounces-52318-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-52318-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com X-Forwarded-Encrypted: i=1; AJvYcCX9Q8xRRhF7v31UDcs95OWdoE38zKXmysjLqml92XLUoLKvEFBqXsSJ87v94MX2gilhk+6GhiODO6de23BGZFY1riISpQ== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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This allows to get a 60 fps sharp. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Neil Armstrong Reviewed-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-simple.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 7b286382ffb4..10b361d603be 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3516,10 +3516,10 @@ static const struct display_timing rocktech_rk043fn48h_timing = { .pixelclock = { 6000000, 9000000, 12000000 }, .hactive = { 480, 480, 480 }, .hback_porch = { 8, 43, 43 }, - .hfront_porch = { 2, 8, 8 }, + .hfront_porch = { 2, 8, 10 }, .hsync_len = { 1, 1, 1 }, .vactive = { 272, 272, 272 }, - .vback_porch = { 2, 12, 12 }, + .vback_porch = { 2, 12, 26 }, .vfront_porch = { 1, 4, 4 }, .vsync_len = { 1, 10, 10 }, .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW |