From patchwork Tue Nov 15 14:39:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20411 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767492wru; Tue, 15 Nov 2022 06:43:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf4uYwgyOkQ+61712GEakHn+Edxgm5iuwm3hlnAbI/+in3pelK4fGXPb0wL1+um8FnkuNon4 X-Received: by 2002:a17:906:2a9a:b0:7a4:98cc:7c8e with SMTP id l26-20020a1709062a9a00b007a498cc7c8emr14178714eje.48.1668523388594; Tue, 15 Nov 2022 06:43:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523388; cv=none; d=google.com; s=arc-20160816; b=apxaaCJTvpP5lXcFc6qx57MG3xUp+VNAYfTkawTlQrItnYt7+6CKo2hXa2wUb3U8Bj lHXIyTuc57h4weLliTKKZwNwWd1lmSrvR4gVWHZuGqBGjF9hpWsxf+pCZBWKaNTQTkYb jUVAAqFmdK67kDWWizJ4vOnMZ/hISTpR8y1sDh4A64/kysfr7E/iedpOqKx63Noz7mHD EW6+3nY0NG+7sPuY8J4OEZTNlbGP1Rr1CCDuRjV6olGAEJ1SvhbdooSJ8JJSEeXDpxSV HuXbMeOzzOSJfFw7rJBgOltwGHI4DbPjUs/V4NB5K6xW3WuAHjvQXrSOn3rj8Iz2o6yP 0z2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pEWFqkRuSkssJSR8lT/92SwTwrZhr2P5jSySA3kruHc=; b=eyTqAZ3cPNKto/tGLX5JeR4uyAwthiv2e5lhHtblRoJzHesuM9+x9sZKrYIgthCTae 5a2ERJPyT+LmwGi1M7B1cYA7jn6A/gDP1umdstYO6OYvgXjpEUIblYwBOfAsMREktfy7 D4G1gbN3e9xESF2UPsBXKTyuOm66qIlkFSTJeTvtAdzT9w9GdBCFGcyACjQP82WnbsTP soStGV9kzYwRHW8dLOqksC399OK2MEdqMcVZZzlu6St1ghls8/yKXEXJWz+lCcybG0uo If3+DIVAYShDxLRgLEM1CAOXf/srZ5wJYRswT1nMJVSysrQFbMe/CYPhpQUprZEjJv7p XSMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HDTh7eOI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lu6-20020a170906fac600b0077ef3eece57si8910351ejb.144.2022.11.15.06.42.41; Tue, 15 Nov 2022 06:43:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HDTh7eOI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237169AbiKOOlF (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230239AbiKOOky (ORCPT ); Tue, 15 Nov 2022 09:40:54 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66F1624BE9; Tue, 15 Nov 2022 06:40:53 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E0AC6617D0; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43F15C433D7; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=bL1Lmk1URusXyJ0VYumbL+Pqp5Rn8rtPK8iccOoWcEQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HDTh7eOIKmLyzPKukhlEIXQnqekVUiW4zNjFKpSMYcCdEFGljpXBbjPVq1NjKOcib Js1A7SRXUnQJqXGiew2bx9B94QiM/FfY/dReyK3zbxqQffdYOgwnb6mOSDHbjuk5cT +SKwl6U+Dkq+1B0gEzQDx3LEn8SDBciwI81rrnc3YvoHcM8YV76Aq087CTR2vZX5R1 1FEly5nszuw3kJuI96aiENDm2B0ijXJadUAyaS0Cla42gZBonwOHMOYNu5UKFXB1aA 5F7vGnnZOa82ZtZAWUZ4VDyBw9z0fZvZeLiduxjmS6e/hRqQYQBy7/UohD7rgdDJST YEXQI0jdS2AmA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fI-J8; Tue, 15 Nov 2022 15:40:22 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski Subject: [PATCH v2 01/15] dt-bindings: phy: qcom,qmp-usb3-dp: rename current bindings Date: Tue, 15 Nov 2022 15:39:51 +0100 Message-Id: <20221115144005.2478-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573580861469770?= X-GMAIL-MSGID: =?utf-8?q?1749573580861469770?= The current QMP USB3-DP PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. The QMP USB3-DP PHY block provides a single multi-protocol PHY and even if some resources are only used by either the USB or DP part of the device there is no real benefit in describing these resources in child nodes. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the PCS_LANE registers). In preparation for adding new bindings for SC8280XP which further bindings can be based on, rename the current schema file after SC7180, which was the first supported platform, and add a reference to the SC8280XP bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Johan Hovold --- ...dp-phy.yaml => qcom,sc7180-qmp-usb3-dp-phy.yaml} | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) rename Documentation/devicetree/bindings/phy/{qcom,qmp-usb3-dp-phy.yaml => qcom,sc7180-qmp-usb3-dp-phy.yaml} (91%) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml similarity index 91% rename from Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml rename to Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 97a7ecafbf85..8afc5e815ae8 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -2,10 +2,17 @@ %YAML 1.2 --- -$id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm QMP USB3 DP PHY controller +title: Qualcomm QMP USB3 DP PHY controller (SC7180) + +description: + The QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. + + Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see + qcom,sc8280xp-qmp-usb43dp-phy.yaml. maintainers: - Wesley Cheng From patchwork Tue Nov 15 14:39:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767482wru; Tue, 15 Nov 2022 06:43:05 -0800 (PST) X-Google-Smtp-Source: AA0mqf6/4wTihiFu4JkRFE1ZhLuXOJyn7GZ/Czh93CyjwPDCNhYZCbtYFvtEzhFrJJzXAIcb0dJH X-Received: by 2002:a05:6402:2483:b0:461:be33:ad25 with SMTP id q3-20020a056402248300b00461be33ad25mr15355330eda.138.1668523385662; Tue, 15 Nov 2022 06:43:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523385; cv=none; d=google.com; s=arc-20160816; b=Yez6pzgOSXXMf9V27xEofU+GhFvZZ6Um/cuI/Mr+bxl1fiIikyVsgVnJmBqaZ9bb+d hY+u0rJh3z1xhLDBcf5mGhcWAiFLVRws71RnMsTB3oy1hRmzrIMMKLM6AH8pyRRA5Mqt y0v11LnLus7yxYb8RHUUxABcDX0JzIBK5swfQb5McQLUUZFIyiGZdJkhevFIicpBIYbn ggiZcKzylKvmcX1iGh0BR5bo2JghS/Ih5i6vGfwbp9pVbVeAcaH7nkVpaypWUYMxPi2q tYiu/A4YuXrRvnNe46iN6G3DRYx3uoCd4lf+uFkEdnd1kZamtYzGS1B5z1A9iFZYwAxo hJhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=c3qEOX45ydQcb1EGKN1oJh52HqeQ0J3W9z0j1agTp+8=; b=FDWmFkXN0t5mG2NJvUW3GFYn3Tjak9A2a5Oreefx3Wy1ZC7QZ5ASYbR8lVuP+bbepR iz0GwDvr0+P/e0ZRjCZKNjumj9HuHNO9uLyVF4rpqTxH3C1bMT5VXetOfkBh+7Mmh80I wYrdhQk6JD5wczFLp4iimMipowykMsBmutuARzvB8hPthBopwZ79SXkCoKtviuxJxMlj 7XbZ953DLPEqSNeMVRRZjvo6WlqnE3y4vko/RNIgRRCY+jt4yffdGLRlrfBogWkf91vI a3NC/KNFDL8DsG32Psum3UbnYINeRKLqc2AjOVyDFvPQgjz0TGO+GbMRqgyukkbSeyoY EEtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=o9K6rijF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dp16-20020a170906c15000b007adbeb3798asi10657538ejc.482.2022.11.15.06.42.40; Tue, 15 Nov 2022 06:43:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=o9K6rijF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231308AbiKOOlj (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232569AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AFB32A417; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D38C3B8198C; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4E4C7C433B5; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=l+rbvfTwuURsqIKP3TVOXshzVy1qO5SfZTurzHLLdSg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o9K6rijFYaYGSfPIkdM95T9UZ1qfuizHTjx0Fsp6piO9NPptKusUEkT+D+569zvVd 5Y4ol6A2L/Y5HlXjl03k5hDEE4qq0aLbjt9taAP29b89IWYURL31Y5U7FNEbMQKtxy MS4+19tCn0kZ7mZr6qRijNn+W7YNO0u8y8q/aw95m9/j5spRS6ePyBgfZn88Bvn7xG qpezaZ1QVp4NYA+Px65ta6+5dv4y5xN3mWLpnA6iY73jAwotLFRb36XPyZalW64XIb NwFn53BxG+5Zb7fMzcyBpP4G/4NCRKsLmrRkSdpXSQFR7g2nEnO2OXrOuzO06YEDpO zk/W6Lr7h3NwA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fL-Ln; Tue, 15 Nov 2022 15:40:22 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 02/15] dt-bindings: phy: qcom,qmp-usb3-dp: fix sc8280xp binding Date: Tue, 15 Nov 2022 15:39:52 +0100 Message-Id: <20221115144005.2478-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573577401841051?= X-GMAIL-MSGID: =?utf-8?q?1749573577401841051?= The current QMP USB3-DP PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. The QMP USB3-DP PHY block provides a single multi-protocol PHY and even if some resources are only used by either the USB or DP part of the device there is no real benefit in describing these resources in child nodes. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the PCS LANE registers). This is specifically true for later USB4-USB3-DP QMP PHYs where the TX registers are used by both the USB3 and DP parts of the PHY (and where the USB4 part of the PHY was not covered by the binding at all). Notably there are also no DP "RX" (sic) registers as described by the current bindings and the DP "PCS" region is really a set of DP_PHY registers. Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which further bindings can be based on. Note that the binding uses a PHY index to access either the USB3 or DP part of the PHY and that this can later be used also for the USB4 part if needed. Similarly, the clock inputs and outputs can later be extended to support USB4. Also note that the current binding is simply removed instead of being deprecated as it was only recently merged and would not allow for supporting DP mode. Signed-off-by: Johan Hovold Reviewed-by: Rob Herring --- .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 12 --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 99 +++++++++++++++++++ include/dt-bindings/phy/phy-qcom-qmp.h | 20 ++++ 3 files changed, 119 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml create mode 100644 include/dt-bindings/phy/phy-qcom-qmp.h diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 8afc5e815ae8..d9d0ab90edb1 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -23,7 +23,6 @@ properties: - qcom,sc7180-qmp-usb3-dp-phy - qcom,sc7280-qmp-usb3-dp-phy - qcom,sc8180x-qmp-usb3-dp-phy - - qcom,sc8280xp-qmp-usb43dp-phy - qcom,sdm845-qmp-usb3-dp-phy - qcom,sm8250-qmp-usb3-dp-phy reg: @@ -169,17 +168,6 @@ required: additionalProperties: false -allOf: - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8280xp-qmp-usb43dp-phy - then: - required: - - power-domains - examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml new file mode 100644 index 000000000000..6f31693d9868 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP) + +maintainers: + - Vinod Koul + +description: + The QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. + +properties: + compatible: + enum: + - qcom,sc8280xp-qmp-usb43dp-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aux + - const: ref + - const: com_aux + - const: usb3_pipe + + power-domains: + maxItems: 1 + + resets: + maxItems: 2 + + reset-names: + items: + - const: phy + - const: common + + vdda-phy-supply: true + + vdda-pll-supply: true + + "#clock-cells": + const: 1 + description: + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h + + "#phy-cells": + const: 1 + description: + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h + +required: + - compatible + - reg + - clocks + - clock-names + - power-domains + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + - "#clock-cells" + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + + phy@88eb000 { + compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; + reg = <0x088eb000 0x4000>; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&gcc GCC_USB4_EUD_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, + <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + vdda-phy-supply = <&vreg_l9d>; + vdda-pll-supply = <&vreg_l4d>; + + #clock-cells = <1>; + #phy-cells = <1>; + }; diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h new file mode 100644 index 000000000000..24a92e5809a0 --- /dev/null +++ b/include/dt-bindings/phy/phy-qcom-qmp.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Qualcomm QMP PHY constants + * + * Copyright (C) 2022 Linaro Limited + */ + +#ifndef _DT_BINDINGS_PHY_QMP +#define _DT_BINDINGS_PHY_QMP + +/* QMP USB4-USB3-DP clocks */ +#define QMP_USB43DP_USB3_PIPE_CLK 0 +#define QMP_USB43DP_DP_LINK_CLK 1 +#define QMP_USB43DP_DP_VCO_DIV_CLK 2 + +/* QMP USB4-USB3-DP PHYs */ +#define QMP_USB43DP_USB3_PHY 0 +#define QMP_USB43DP_DP_PHY 1 + +#endif /* _DT_BINDINGS_PHY_QMP */ From patchwork Tue Nov 15 14:39:53 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dk9-20020a0564021d8900b00462dee0d6bfsi11143952edb.556.2022.11.15.06.42.53; Tue, 15 Nov 2022 06:43:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=CpNCMInN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229971AbiKOOmK (ORCPT + 99 others); Tue, 15 Nov 2022 09:42:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232249AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49E4527FC9; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id AC5B4B81989; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43D3CC433C1; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=ncm5BsLW3+lbd654UB/Mjbo5qmWwRlyF4LDPoLF7jaw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CpNCMInND/d1+dR+NK5Ga6waAFmP3H2rprzE8w7mRqH7MTc2g1/8iEOllgGdbg3gP 4S2PJ0LGOOrP+NRZsv7SqniqWWvt9rzSQvaJ4PFhW8MUNAbAVih/G2p1i7TvllTl5F adg+2RidvVof4oy07oDMZgTUSpHDF3knzZJvEclMQX5gO/Fm/zJIPx8EMB7bnXA3Dv BzT06CT9zouOlQw7FuN0pKFxeDcpzHESV/O55LTIjOGwpX+PCJy8DS3kq9c5Ij5xAJ uAmpY5dyDm/74md69T6A32YK/2t5J0EDZ1PuLwk76VLlB91Ljku8ezhU1Zh5J8nAhy NxOlAqgSU24pg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fN-OJ; Tue, 15 Nov 2022 15:40:22 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 03/15] phy: qcom-qmp-combo: drop v4 reference-clock source Date: Tue, 15 Nov 2022 15:39:53 +0100 Message-Id: <20221115144005.2478-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573592737580108?= X-GMAIL-MSGID: =?utf-8?q?1749573592737580108?= The source clock for the reference clock should not be described by the devicetree and instead this relationship should be modelled in the clock driver. Drop the management of the source clock from the driver for SC8180X and SC8280XP. Note that support for the former is not yet in mainline. Also note that the binding has never been updated to describe the v4 clocks for SC8180X. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index c5d8f8bfaaaa..5da42a4e5bf6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -945,7 +945,7 @@ static const char * const qmp_v3_phy_clk_l[] = { }; static const char * const qmp_v4_phy_clk_l[] = { - "aux", "ref_clk_src", "ref", "com_aux", + "aux", "ref", "com_aux", }; /* the primary usb3 phy on sm8250 doesn't have a ref clock */ From patchwork Tue Nov 15 14:39:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20405 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767227wru; Tue, 15 Nov 2022 06:42:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf4FO8d8cRK8c0CAKrHBwl79wSIBi3gM++MuFukgtsQIyPveMLjkRUPtaveSCC3Xv8P+BGsz X-Received: by 2002:a05:6402:5005:b0:462:a00e:1dab with SMTP id p5-20020a056402500500b00462a00e1dabmr15243830eda.135.1668523353130; Tue, 15 Nov 2022 06:42:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523353; cv=none; d=google.com; s=arc-20160816; b=Rwf9t9SXY/WQNUSpshGSGLK5cM4OwDObVdy4XKhcOLhdo+UwKhNiMCmFBs3g59qTwg rdElG0hrQPKwDzBtamNYBwoWDtWrfmuhGTfXK7sb1Y2B2BCUG5cVu1++kUFknc3FJx0i lZxuRxA+VZY+EH2z+26ioGlQc9LcjodneSMPIZ3tfOvxYdhGAHaKN8tYfGqWrxuCSLZZ /7kydDUzZHsajU4cCZcY1zUESQmswzmw9bDY/LcKUoL0OyRGUNh08S347gGsbNT9iY9/ IdkUWTFxx03WGSI/Cet0WJwG+naXGyiigJ8wxfJFPVxwQFyzCFuT0ZIkwEKQWtye91He Sang== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5s6RDUfrdBnNxbH0wcz+gaN5fiuN8D8hd77VZlu3lDI=; b=d+OyrCFt9NjY0ne2w2apcp4xUS+Rbh45HcF3ODRrvuX4KuLfjjw5shbCDAF4fz3KsH SlAD/dDwlHvM78Ebvy3w4H0/fKkclqCMzZt/qFG1VrgsUdFNkARUaUrLw293COLpfx4/ oHj5UZ2piKSnN8/Yn3sG2YCuHApOGLAyNEhQQkoXGTfkbp0L0MiKTuzI2xnJyRCuf38n LzuGz/cLptHKxWBqRitbskfzTWOjVVE4xP8f0TmOxN2FfqLlqES0PPbaczidZ0I4wx4U DtzWwkL4GRxIlB030U71x1/o4NEtPxwfrkSKuhHKYxkEgRbXuh2OFVUIB6Gzui+B0mTb 5iUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=lxuAihXf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nc33-20020a1709071c2100b0078d9db99f5esi13240886ejc.39.2022.11.15.06.42.06; Tue, 15 Nov 2022 06:42:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=lxuAihXf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237845AbiKOOlI (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230473AbiKOOky (ORCPT ); Tue, 15 Nov 2022 09:40:54 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E5E723173; Tue, 15 Nov 2022 06:40:53 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3AE38617D7; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 581AEC4347C; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=RD0ClmUmxYYlwRNJhu/83cib/wDXg9GnJNKnNdHDLho=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lxuAihXfmJu2U7YJE5MpdCiO9jwh6z/+Kbs0dzbOsxw8/WQesSDxHaQNADmHcIlVu 7jNJl/GTTgNSpziGkaT8kbIdtud6b18yClYpTJFIuUlTAH7ylOjTspYnk4nVitITz5 53+9QS7OfZaMIBH8KJXJ9DVl7RtWVaOE6JQ5S4n/6pDr2faoTXd3oCwiD6ygCDxF0r SCcDaq1FqopyZnJhB+tlDTFtPUsMi02EaGisFE1Km7ctzNkZ3kqdCfzPzCXL5Qel7K NWsDqbP2SB01ORvgkJzJb0x08Mk5DTFi/SHg3Kr0ojvlWkqJZYrHRx/lQD4iSzxou5 xRm7rYt5rjgug== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fR-Qn; Tue, 15 Nov 2022 15:40:22 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 04/15] phy: qcom-qmp-combo: restructure PHY creation Date: Tue, 15 Nov 2022 15:39:54 +0100 Message-Id: <20221115144005.2478-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573543653749420?= X-GMAIL-MSGID: =?utf-8?q?1749573543653749420?= In preparation for supporting devicetree bindings which do not use child nodes, move the PHY creation to probe() proper and parse the serdes, dp_com and dp_serdes resources in a dedicated legacy devicetree helper. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 89 ++++++++++++----------- 1 file changed, 48 insertions(+), 41 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5da42a4e5bf6..85def6560e43 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2471,11 +2471,9 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static int qmp_combo_create_dp(struct qmp_combo *qmp, struct device_node *np) +static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) { struct device *dev = qmp->dev; - struct phy *generic_phy; - int ret; /* * Get memory resources from the DP child node: @@ -2496,25 +2494,13 @@ static int qmp_combo_create_dp(struct qmp_combo *qmp, struct device_node *np) if (IS_ERR(qmp->dp_tx2)) return PTR_ERR(qmp->dp_tx2); - generic_phy = devm_phy_create(dev, np, &qmp_combo_dp_phy_ops); - if (IS_ERR(generic_phy)) { - ret = PTR_ERR(generic_phy); - dev_err(dev, "failed to create DP PHY: %d\n", ret); - return ret; - } - - qmp->dp_phy = generic_phy; - phy_set_drvdata(generic_phy, qmp); - return 0; } -static int qmp_combo_create_usb(struct qmp_combo *qmp, struct device_node *np) +static int qmp_combo_parse_dt_lecacy_usb(struct qmp_combo *qmp, struct device_node *np) { const struct qmp_phy_cfg *cfg = qmp->cfg; struct device *dev = qmp->dev; - struct phy *generic_phy; - int ret; /* * Get memory resources from the USB child node: @@ -2556,15 +2542,34 @@ static int qmp_combo_create_usb(struct qmp_combo *qmp, struct device_node *np) "failed to get pipe clock\n"); } - generic_phy = devm_phy_create(dev, np, &qmp_combo_usb_phy_ops); - if (IS_ERR(generic_phy)) { - ret = PTR_ERR(generic_phy); - dev_err(dev, "failed to create USB PHY: %d\n", ret); + return 0; +} + +static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node *usb_np, + struct device_node *dp_np) +{ + struct platform_device *pdev = to_platform_device(qmp->dev); + int ret; + + qmp->serdes = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(qmp->serdes)) + return PTR_ERR(qmp->serdes); + + qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(qmp->dp_com)) + return PTR_ERR(qmp->dp_com); + + qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(qmp->dp_serdes)) + return PTR_ERR(qmp->dp_serdes); + + ret = qmp_combo_parse_dt_lecacy_usb(qmp, usb_np); + if (ret) return ret; - } - qmp->usb_phy = generic_phy; - phy_set_drvdata(generic_phy, qmp); + ret = qmp_combo_parse_dt_lecacy_dp(qmp, dp_np); + if (ret) + return ret; return 0; } @@ -2587,18 +2592,6 @@ static int qmp_combo_probe(struct platform_device *pdev) if (!qmp->cfg) return -EINVAL; - qmp->serdes = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(qmp->serdes)) - return PTR_ERR(qmp->serdes); - - qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(qmp->dp_com)) - return PTR_ERR(qmp->dp_com); - - qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); - if (IS_ERR(qmp->dp_serdes)) - return PTR_ERR(qmp->dp_serdes); - mutex_init(&qmp->phy_mutex); ret = qmp_combo_clk_init(qmp); @@ -2623,6 +2616,10 @@ static int qmp_combo_probe(struct platform_device *pdev) return -EINVAL; } + ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + if (ret) + goto err_node_put; + pm_runtime_set_active(dev); ret = devm_pm_runtime_enable(dev); if (ret) @@ -2633,21 +2630,31 @@ static int qmp_combo_probe(struct platform_device *pdev) */ pm_runtime_forbid(dev); - ret = qmp_combo_create_usb(qmp, usb_np); + ret = phy_pipe_clk_register(qmp, usb_np); if (ret) goto err_node_put; - ret = phy_pipe_clk_register(qmp, usb_np); + ret = phy_dp_clks_register(qmp, dp_np); if (ret) goto err_node_put; - ret = qmp_combo_create_dp(qmp, dp_np); - if (ret) + qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); + if (IS_ERR(qmp->usb_phy)) { + ret = PTR_ERR(qmp->usb_phy); + dev_err(dev, "failed to create USB PHY: %d\n", ret); goto err_node_put; + } - ret = phy_dp_clks_register(qmp, dp_np); - if (ret) + phy_set_drvdata(qmp->usb_phy, qmp); + + qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); + if (IS_ERR(qmp->dp_phy)) { + ret = PTR_ERR(qmp->dp_phy); + dev_err(dev, "failed to create DP PHY: %d\n", ret); goto err_node_put; + } + + phy_set_drvdata(qmp->dp_phy, qmp); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); From patchwork Tue Nov 15 14:39:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767295wru; Tue, 15 Nov 2022 06:42:40 -0800 (PST) X-Google-Smtp-Source: AA0mqf6S8BK+VvSZVp+Nb8L6IpIRLSHEeTvFjL8JbDH0KZU0wblOm1QTDsu1StWjnJdHWXdRfEIF X-Received: by 2002:a17:906:3101:b0:78d:6429:a806 with SMTP id 1-20020a170906310100b0078d6429a806mr14039639ejx.553.1668523360138; Tue, 15 Nov 2022 06:42:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id wu10-20020a170906eeca00b007a9e6f0f82fsi10708245ejb.516.2022.11.15.06.42.13; Tue, 15 Nov 2022 06:42:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=FI163I6p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233025AbiKOOlP (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230481AbiKOOkz (ORCPT ); Tue, 15 Nov 2022 09:40:55 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF23D264A9; Tue, 15 Nov 2022 06:40:53 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7C569617D6; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5B0FEC43144; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=rhNguSejjtkHA6rQ2L6dE0ZSqitXPRK1vRjUNJUgpvM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FI163I6pAoAbxCyhZ10riblsY+ld8dh2mGqc0qp2/M0zRCkLVc+Kknglp7SN5zvwU XI6YYEmT0TaTaSkbmt6uE06Yqc/bLKPumQL3QA+5fUdM6mzLgQCzNC5FVdNP+MDOWg /hKuekscgL1qrPhLDBH4OFhUYx2ybnBiq/rO7Ln5y7jLh9AjVK0A9d+DrQm6gybUXP vqMBmE9Cc8AqBocsfVPBF30gql8vxCCHAic7JMfmTWo2edF4AbyB9pGrTl9ginc40I kuhcrH65tp/P4bb71KTh36Pp6vVo5ar2UcICF+WgrXtW+B/omgEO7PPEoMEVvRbII3 goUpN4J6Nbt6g== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fU-TI; Tue, 15 Nov 2022 15:40:22 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 05/15] phy: qcom-qmp-combo: generate pipe clock name Date: Tue, 15 Nov 2022 15:39:55 +0100 Message-Id: <20221115144005.2478-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573550616961235?= X-GMAIL-MSGID: =?utf-8?q?1749573550616961235?= In preparation for supporting devicetree bindings which do not use child nodes, generate also the USB3 pipe clock name based on the platform device name as is done for the DP clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 85def6560e43..7434955c8898 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2247,18 +2247,15 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_fixed_rate *fixed; struct clk_init_data init = { }; + char name[64]; int ret; - ret = of_property_read_string(np, "clock-output-names", &init.name); - if (ret) { - dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np); - return ret; - } - fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL); if (!fixed) return -ENOMEM; + snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); + init.name = name; init.ops = &clk_fixed_rate_ops; /* controllers using QMP phys use 125MHz pipe clock interface */ From patchwork Tue Nov 15 14:39:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20417 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767869wru; Tue, 15 Nov 2022 06:43:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf6x4eeTkt5M2S8px9G8Jmh00+rh68bzf5GKTF4SbRdb37DaXEzK7V0lGSuI8nN/B0SDX6z2 X-Received: by 2002:a17:907:8e8a:b0:7ad:83cb:85e6 with SMTP id tx10-20020a1709078e8a00b007ad83cb85e6mr14482597ejc.108.1668523430741; Tue, 15 Nov 2022 06:43:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523430; cv=none; d=google.com; s=arc-20160816; b=dlTNqYL/6P8N2V+vyN0Gcp/ouvlpkTzzeTjxW0sCEczLFMDmxNIsdqOXKPmL7cy3Zt OEJIF/wg9md/+lTKWcWW9ib+Azt2ICZAVFdwfA2B0F+cKD+6HqWD7WWgQgyDr+EZP/7v ucSkjTx/KaK0KALieaxjfGprUJ4yMAnhKLw3MSyzkEb/1hQPDJZWtOVHTtA784e1jdvx mAK8PyRdhcI73GrhXdnBPZj82zr9WVjktkBY8Ywa3rtWpc76+7Ggbrn9itY75si4epXw CDRn3lScK4OfQarI074sqmmhwVJCBmOYyGCG01RMab3+qO6o7cwF5S9pLRbC4qFuSesD CsKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YoR20pYJ6HjEGeqgiNe9YJF8dXTeDo+0263x5KFtpSM=; b=xnGYYtrhZl/fp5Iw/ps5p8s0j37sb7QAbmLWmL0oez10FdRF4+72qk4MZVPRgiZZ+I iOOYi3Itnw/4J7K7SEitiHg6StDR6o61446yOj7UpyoZw+hYMkOwPPgKsENRy6e0LIyL VD/IynqAYhSBmCAKimQJU7Ayq7d4VK1EMpG1BaQn83mZqFVWpEpEkckI2kyvGOKD28R8 QhjcZah0R5muNMnhTqx2bQtYC8AtabVEZLRlakL0iXpun5qCYTk0mf6H9eRMIB5urDA5 uku5MVoePHYw0XyWTzKjSCYDbLKqRk8riC4wPpmWMGcgRKAj3rQmp3kzff4efuaHWfKG ZPwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bQYyRLGK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id qf37-20020a1709077f2500b007ae0ea7fbb8si12047736ejc.825.2022.11.15.06.43.26; Tue, 15 Nov 2022 06:43:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bQYyRLGK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237567AbiKOOlS (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230499AbiKOOkz (ORCPT ); Tue, 15 Nov 2022 09:40:55 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0003A2792A; Tue, 15 Nov 2022 06:40:53 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 940A9617DA; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90408C4315F; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=xBE3xRLPSUJdKiquHXqse0uzhf1AkKR2IvO/OpTcHpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bQYyRLGKF4E9ZDPNbfw6IlQkqSHAKqIkFkQk5iyKU2Zg8jhN6j0g25swUq/Sr1ACa KtuCPo7FEcmj5OaOIJBTKuqpJg9B85F7zeGL/hjabaSf0OVgWPr5OYJ+9lu4Oa2NKS qZ5IO95XjfArLgmg5msdOzDO8KyGi0PNEnvbBW5rH4tHaoVYXEiaDZClJOQYsrcdbQ hZ3FE+2AfE4iL2NqxBYI9iz3GtRix2TpFBzfvr6XB/RUDcUE5apRLzEvN7iP+uRkA9 s6XOtPvMovBllLssbXZqWnxas1QxR95HGe0KougABK3ttlCZgU7uSuuki+96ZY8CqX 3+EtuUKTuhEZQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6s-0000fX-VX; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 06/15] phy: qcom-qmp-combo: drop redundant clock structure Date: Tue, 15 Nov 2022 15:39:56 +0100 Message-Id: <20221115144005.2478-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573625000366947?= X-GMAIL-MSGID: =?utf-8?q?1749573625000366947?= Drop the unnecessary DP clock structure and instead store the clocks directly in the driver data. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 52 ++++++++--------------- 1 file changed, 17 insertions(+), 35 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 7434955c8898..ebfefecffd86 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -859,12 +859,6 @@ struct qmp_phy_cfg { }; -struct qmp_phy_dp_clks { - struct qmp_combo *qmp; - struct clk_hw dp_link_hw; - struct clk_hw dp_pixel_hw; -}; - struct qmp_combo { struct device *dev; @@ -900,7 +894,9 @@ struct qmp_combo { struct phy *dp_phy; unsigned int dp_aux_cfg; struct phy_configure_opts_dp dp_opts; - struct qmp_phy_dp_clks *dp_clks; + + struct clk_hw dp_link_hw; + struct clk_hw dp_pixel_hw; }; static void qmp_v3_dp_aux_init(struct qmp_combo *qmp); @@ -1387,7 +1383,6 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; @@ -1420,8 +1415,8 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) } writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); - clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); - clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); + clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); + clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); @@ -1518,7 +1513,6 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp) static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; @@ -1556,8 +1550,8 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) } writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); - clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); - clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); + clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); + clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); @@ -2342,12 +2336,10 @@ static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, static unsigned long qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - const struct qmp_phy_dp_clks *dp_clks; const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; - dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_pixel_hw); - qmp = dp_clks->qmp; + qmp = container_of(hw, struct qmp_combo, dp_pixel_hw); dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { @@ -2386,12 +2378,10 @@ static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, static unsigned long qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - const struct qmp_phy_dp_clks *dp_clks; const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; - dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_link_hw); - qmp = dp_clks->qmp; + qmp = container_of(hw, struct qmp_combo, dp_link_hw); dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { @@ -2413,7 +2403,7 @@ static const struct clk_ops qcom_qmp_dp_link_clk_ops = { static struct clk_hw * qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) { - struct qmp_phy_dp_clks *dp_clks = data; + struct qmp_combo *qmp = data; unsigned int idx = clkspec->args[0]; if (idx >= 2) { @@ -2422,42 +2412,34 @@ qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) } if (idx == 0) - return &dp_clks->dp_link_hw; + return &qmp->dp_link_hw; - return &dp_clks->dp_pixel_hw; + return &qmp->dp_pixel_hw; } static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_init_data init = { }; - struct qmp_phy_dp_clks *dp_clks; char name[64]; int ret; - dp_clks = devm_kzalloc(qmp->dev, sizeof(*dp_clks), GFP_KERNEL); - if (!dp_clks) - return -ENOMEM; - - dp_clks->qmp = qmp; - qmp->dp_clks = dp_clks; - snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); init.ops = &qcom_qmp_dp_link_clk_ops; init.name = name; - dp_clks->dp_link_hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_link_hw); + qmp->dp_link_hw.init = &init; + ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); if (ret) return ret; snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); init.ops = &qcom_qmp_dp_pixel_clk_ops; init.name = name; - dp_clks->dp_pixel_hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_pixel_hw); + qmp->dp_pixel_hw.init = &init; + ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); if (ret) return ret; - ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, dp_clks); + ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, qmp); if (ret) return ret; From patchwork Tue Nov 15 14:39:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767424wru; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b68-20020a509f4a000000b00459f9c3d02bsi10398862edf.22.2022.11.15.06.42.31; Tue, 15 Nov 2022 06:42:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=hauROZjV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238095AbiKOOlf (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232301AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FF5B1FCDC; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 48DF6B8198D; Tue, 15 Nov 2022 14:40:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7393AC43157; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=WfOHBJjixJuQ4FLUSSwYNB6T5TOaxLa26wr1JxeAHYo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hauROZjV+aqnSa14og8RbAK/+bbgEzh1yaVnYpQ3ARkPzatWPOYoj1RKt9HUUKIlR /J9GfCuBg9Ku3L/wzNGeI/E2aEY8y5MnGU7v4sQUaIvafmH8OoF3XAjoGkonnuRdjf ckxbaN8pMAQXw1J0D4pXqhs/hZ/mecZ5L0jKaR1qWEV+dm2M6CSC5I9iwVzVYa/t7y aeqSNLcbrgbwI3lV++6H6R/BhqoBA6O6RnueaniMLcv6gtKGRoB1oU2tHICbmPClkA QHeeTRcuIZaHF4W8Xv41jaTqp3hBeiJIsySMb7luKjeZUSGajXl5XqD0gpD0co2IYa 0LR3g0BhXl71w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fa-1o; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 07/15] phy: qcom-qmp-combo: drop redundant clock allocation Date: Tue, 15 Nov 2022 15:39:57 +0100 Message-Id: <20221115144005.2478-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573569511982578?= X-GMAIL-MSGID: =?utf-8?q?1749573569511982578?= Since the QMP driver split, there is no reason to allocate the fixed-rate pipe clock structure separately from the driver data. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index ebfefecffd86..9b945a72ae9b 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -895,6 +895,7 @@ struct qmp_combo { unsigned int dp_aux_cfg; struct phy_configure_opts_dp dp_opts; + struct clk_fixed_rate pipe_clk_fixed; struct clk_hw dp_link_hw; struct clk_hw dp_pixel_hw; }; @@ -2239,15 +2240,11 @@ static void phy_clk_release_provider(void *res) */ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) { - struct clk_fixed_rate *fixed; + struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; struct clk_init_data init = { }; char name[64]; int ret; - fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL); - if (!fixed) - return -ENOMEM; - snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); init.name = name; init.ops = &clk_fixed_rate_ops; From patchwork Tue Nov 15 14:39:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20418 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2768100wru; Tue, 15 Nov 2022 06:44:22 -0800 (PST) X-Google-Smtp-Source: AA0mqf5WRNKJi1aBps2H6hq76Jpyy8m25LSIeHNJb/x4qCjqpO5GCpxn8b3RTEBCC4716kyZIKGR X-Received: by 2002:a50:f68c:0:b0:463:c067:8277 with SMTP id d12-20020a50f68c000000b00463c0678277mr15674053edn.185.1668523462278; Tue, 15 Nov 2022 06:44:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523462; cv=none; d=google.com; s=arc-20160816; b=EtppqZr3gNZP1wW3AzoA2sue5DZUhGZgop8s7yViTGfbRHdUo+0uxUZ/EJcqn8O276 748tDG1bpvhO94mAAhJgAwl5hul/ufd5mG0HnpxJ39v0jKWxNaG7wjcFXEQursfLHvPb PMGfB0nMdefFbfn25WrcPmCKVAonKVi25/iTZ5arB0y8QQwuHpKT7Z0Y1R6bJTduq0KW JrBxRNGmyI4eujXaTdbVtC6z22d/3HcZlHX27M/mPXO0wpd5JA8etwiOTdnfop9gMe3Q VWgUx5NWnMK/9PEVk7Pcwca4b+AUsfhC1oK6EfdpqOxx8IHxaw+tyNoC281nuZCDF2Pp GFxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+c9liiv1dEk6ICReXreJ32scSckDlZbEQ2khJ1mHGkY=; b=jFZKHzLdXEghEncZ3ngAhV/CDsfsDoeDqNANTlNaHLAeILsLzrvGMh88klioWd/5Lj VHa+dM28CqL1FkfTdoitVniEWp7XscC8hPJNiizDNfTgIpouhMeY5PSf25I49DW5K8qp fsBT6n7UiIRwZSjme8a3wrXZSCEePKwJctUnyO5xzInqZ/+tj1IzdLbGy/4Nde1pdteP 0G0ZrWXYEnwHXJQf56Ygys+4nbba0JhtaNb1kYjUmFnY5ZDn1CP+bIs7u+VLWWtFbPE5 79qofygq4F0GS0+MKywIJKYV+NGMFDxBAW1wnDsVZTxx+/F0d+LWtkmZoysOnbXpLOw5 bRPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=c4sUW9ho; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g3-20020a170906868300b0073c14b6560bsi10080433ejx.177.2022.11.15.06.43.57; Tue, 15 Nov 2022 06:44:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=c4sUW9ho; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238340AbiKOOlu (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232592AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADD782A73A; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6500DB81992; Tue, 15 Nov 2022 14:40:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A0107C43163; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=S5xseugGMZk5s5FcsKTKBF2KLbZ80lWoZS12gqBQ1d4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c4sUW9hogyCa31J6Qv+mNMfxHSZnXctk6F1/KzR4T23CozYKpCBu8eW/K82jeOUr9 Pqzqhhiz/kUHDOAjaWfp8+oe6DDT3iGrpdpcFhRt5IHvu0ysr6VGpQXwmPlFqT+Y/C kCqmUZHYT9UUghQxhnJkBD7eRyeSjpG2i030G8W8dH3k1SPdfHZGCMIWK76Xoc5TXz gK6B188jBQbd/WkVu/GlKqKamU4lxlnJC6gy+65Y1w2flzsCDMYmrY5gSp67RdRVfB mn4l+tZOSzjdB/9OYereSDnNlZB2S5YnTqPvivus8Q5tmlV44WfYDVFCuZhRQ2YTW1 3aByUrcGxtgeQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000ff-4z; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 08/15] phy: qcom-qmp-combo: add clock registration helper Date: Tue, 15 Nov 2022 15:39:58 +0100 Message-Id: <20221115144005.2478-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573658287875144?= X-GMAIL-MSGID: =?utf-8?q?1749573658287875144?= In preparation for supporting devicetree bindings which do not use child nodes, add a clock registration helper to handle the registration of both the USB and DP clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 9b945a72ae9b..1079a16b45f6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2447,6 +2447,22 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } +static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, + struct device_node *dp_np) +{ + int ret; + + ret = phy_pipe_clk_register(qmp, usb_np); + if (ret) + return ret; + + ret = phy_dp_clks_register(qmp, dp_np); + if (ret) + return ret; + + return 0; +} + static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) { struct device *dev = qmp->dev; @@ -2606,11 +2622,7 @@ static int qmp_combo_probe(struct platform_device *pdev) */ pm_runtime_forbid(dev); - ret = phy_pipe_clk_register(qmp, usb_np); - if (ret) - goto err_node_put; - - ret = phy_dp_clks_register(qmp, dp_np); + ret = qmp_combo_register_clocks(qmp, usb_np, dp_np); if (ret) goto err_node_put; From patchwork Tue Nov 15 14:39:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20413 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767557wru; Tue, 15 Nov 2022 06:43:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf47ow3XLr1NzCFt3b0Erzp2mjKsB3pQySV9BalDjSk1P9xrBAo+z0qvquiDdVyfL5wpC/fW X-Received: by 2002:a17:907:8c81:b0:7ad:902c:d158 with SMTP id td1-20020a1709078c8100b007ad902cd158mr14732204ejc.121.1668523396530; Tue, 15 Nov 2022 06:43:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523396; cv=none; d=google.com; s=arc-20160816; b=WDkGxO7YDv+oLRnvEKj203QNr7UP12D0AsfTEAgU9a7OpPerm9ogo6Nw2TOiXGBQpz SxRKP54z4w7nq3+3TTiD1s8j+063IqpBJ3EJLCVah6gRFSRUzzNuTeBXS0SnxzdLw5Bz GUL8+69gxxXUwX3bQhVG0W8q+FGuXIadQJaglTMCWndBnaTRt3/jXB5pW18YU7bmhIEr v76+CM9tmHPFglmcyxxNep+8Q0quSmJkmSpb2tKlfCPk1N77U0sy+K+GsmeerziqsATP Gp4nbstdK29nzyRo0enAlPQVwSechevkYn9Nnq7VsjQFZ9IngVGlcGCPJJcKvv8sNXnX B5mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=3cXBFt507qJc3k/Xl6QdQZi6Cjyi2FhEw2yjshecLAE=; b=QhKj0dT+cJNTXdFITkxqZImMlZzHYEbKQ3HyD7AE0En/VYK9XYUXnb8vbVe73rBry/ qRTgu4U1zDSj0eg5hewMKWkWHrHcOWWSLjvErVrnN5SvJsHg0jnoRFSdGLxgQCtxeL2E bq7AZ9LOJPY1FHZtfnwsazCxt/uzNwIp8APn4GXdRAB5oG2Y1g9UKyFq07oW9/r+pKLo ueA7eaOtzkHoVK/vjFvArOGobo6gaO5T5ioKcBjUradEI+V+y1vkXqJTo7zyPZbaA+IA PQfyv+/B8/rCc0fDgFVz1tOIo7zOmTaJ+UtGSb/S5lP8HusGJsmJpnD10e4lnbdFdn/x HXaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=h3rmnPyF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ev27-20020a056402541b00b00460d06fa777si11455253edb.87.2022.11.15.06.42.50; Tue, 15 Nov 2022 06:43:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=h3rmnPyF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229674AbiKOOmA (ORCPT + 99 others); Tue, 15 Nov 2022 09:42:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232475AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B58D2A70C; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C6863617E7; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A6D11C43166; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=bmsUPacS9Rzat24dJ5K0aImxD9SNax5aw2TjIGoYLjk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h3rmnPyFAcnaKKQDndZeXdcleW0Zk6D636grxpPshKNJhP1WEQtpWrTfIP5IfzIF6 b8qcO5MHW2/znHwA0A2ndWGt2Uom/W22NyvAIbdME0vJN5kjM7OfQi8zvWgwkr3c5/ hpvFasG052x6p6jbyTuLR6MSuO47LPheSA5yMAZA3RiT+HgY0M1VTBP1oY2Lq7N07s XWsQOQfMXJcT5xOAQFrCnF8BGpsqv7ZHAq7tM+U5Ch64UMxN0GlNpqmxwoVJzX4tvx cChDpoWPIXi+ncpi5DSgN0RBlk0m+CKf1cCXwk6h3g1NibV7dhACxU3To66KbF+taT kEtkp5PFfseqA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fj-7r; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 09/15] phy: qcom-qmp-combo: separate clock and provider registration Date: Tue, 15 Nov 2022 15:39:59 +0100 Message-Id: <20221115144005.2478-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573588588211588?= X-GMAIL-MSGID: =?utf-8?q?1749573588588211588?= In preparation for supporting devicetree bindings which do not use child nodes, separate clock registration from clock-provider registration. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 44 +++++++++++------------ 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 1079a16b45f6..89a5b51c770d 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2243,7 +2243,6 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; struct clk_init_data init = { }; char name[64]; - int ret; snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); init.name = name; @@ -2253,19 +2252,7 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) fixed->fixed_rate = 125000000; fixed->hw.init = &init; - ret = devm_clk_hw_register(qmp->dev, &fixed->hw); - if (ret) - return ret; - - ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &fixed->hw); - if (ret) - return ret; - - /* - * Roll a devm action because the clock provider is the child node, but - * the child node is not actually a device. - */ - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); + return devm_clk_hw_register(qmp->dev, &fixed->hw); } /* @@ -2436,15 +2423,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) if (ret) return ret; - ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, qmp); - if (ret) - return ret; - - /* - * Roll a devm action because the clock provider is the child node, but - * the child node is not actually a device. - */ - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); + return 0; } static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, @@ -2460,7 +2439,24 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; - return 0; + ret = of_clk_add_hw_provider(usb_np, of_clk_hw_simple_get, + &qmp->pipe_clk_fixed.hw); + if (ret) + return ret; + + /* + * Roll a devm action because the clock provider is the child node, but + * the child node is not actually a device. + */ + ret = devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, usb_np); + if (ret) + return ret; + + ret = of_clk_add_hw_provider(dp_np, qcom_qmp_dp_clks_hw_get, qmp); + if (ret) + return ret; + + return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, dp_np); } static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_node *np) From patchwork Tue Nov 15 14:40:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20415 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767680wru; Tue, 15 Nov 2022 06:43:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf4EWYErTGDjVkdgH99nVN/iYApN2D9YstMXc5HakVxWsclmHnlYYdbL1D5DSl9/IEeqIeFg X-Received: by 2002:a17:906:960e:b0:781:aff3:c68d with SMTP id s14-20020a170906960e00b00781aff3c68dmr14334376ejx.36.1668523408303; Tue, 15 Nov 2022 06:43:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523408; cv=none; d=google.com; s=arc-20160816; b=0RfoktVnFwxA0etsePVD9/vTg5LZWXX/kCYNzXQa14J20X1f4hiJGnCI7Hi1ivxFvq koyJ0tZmaSenAlVL6NBy2GFClS0oHLDJH+vprj54qtnXtcP42mU0SsACGEkwhVM5kJbv yMOpq1oRwXz2Vz1Mim+JTn7g84fYLtPYsdf1L9wJhDsAiB+bZTtZaAQ4Kh0efdH5otHh t3Wk6x696sOGxQ18WwsamPoh1VAPnEJ/6MeNtwLwAA08/BH4UmS6MhaDmrwz3x20NnTg XNhUzy8cavWHT9NfS5BnIPS28lXDw4d+5X+l0HSdf3zB55Ss2VN1wr1k1NjquS5OAgac RVHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gj4hZSYrtHzEmyIFp2Nya/saveiND0mcM8alV1ouO+Q=; b=UzjOrufT+4UMoF/cN96j3wICtu4+lJwCvq4UaMg6LbHsVbAeUKf4gDc3V+ITm48GxN yO6waux39aQsb/SSwqmZg6WTFijRWAQyNpRiCN3S35Gqoi0MPJ9SCkjxPgtGkq/W11W6 fI/gqH7scNksHTnxpiVIzZJb4w1blUXZb6CCqDFd0Euu7vT1LBxsKXs/W+PxefBOa3D3 JG1yh4vyJpCCJX6lu/WYffatt3b1FDbYrOheAtkd95v0IXrSZsWyAkaz/vduRns/5vB9 aShLF2uQ8khMXS5NmyRt2tLiBw05/NjisMyiF2PLR5c0RE65rMAp4whEPUjhO5gBUUfO RuqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fh+599Rk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dr18-20020a170907721200b0078db3ce1e59si6582358ejc.38.2022.11.15.06.42.59; Tue, 15 Nov 2022 06:43:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fh+599Rk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230226AbiKOOmN (ORCPT + 99 others); Tue, 15 Nov 2022 09:42:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232253AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AEE22A251; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CE570617D4; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C8411C4FEB9; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523252; bh=RSCCNHg0pVmtS0IdanzEJRU1fo8izWYA/WxRqAymmF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fh+599RkVQIsa61dOExV36bAKWMov99+M+0dWiUJdkvYQBTYggK3jhCDsaqcqWcT5 z6aeDoTRNqIHz+KmGfOoyttR43zZ4c14yHZ6yFE7jxqapTcM8Bq4gTtf/PDiAdWSNc lQ7jxUtVaOFIcDbLqWsSXwWmMDztqI/tphbGr6O0/u4KxO1e0N0XFdn1IhLGhC2oQz ZlXaHNBTOLuDygBHcWPRs3ttM8db7mLMDY9sERZ0kw69eZEvbeyk60NtgdlDwPL4Zj jhpqBDKtwwpJj099lpyGtcqOg0PjNF+p1jLgfDkpYDFHwOx9TUOILAGij5TckAx7/9 3Rkemu4MW1F+w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fn-Ak; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 10/15] phy: qcom-qmp-combo: clean up DP clock callbacks Date: Tue, 15 Nov 2022 15:40:00 +0100 Message-Id: <20221115144005.2478-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573601134240317?= X-GMAIL-MSGID: =?utf-8?q?1749573601134240317?= Clean up the DP clock callbacks somewhat by dropping the redundant "qcom" prefix and removing line breaks after type specifiers. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 33 ++++++++++------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 89a5b51c770d..fb3705b00823 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2304,8 +2304,7 @@ static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) * for DP pixel clock * */ -static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) +static int qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { switch (req->rate) { case 1620000000UL / 2: @@ -2317,8 +2316,7 @@ static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, } } -static unsigned long -qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +static unsigned long qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; @@ -2340,13 +2338,12 @@ qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) } } -static const struct clk_ops qcom_qmp_dp_pixel_clk_ops = { - .determine_rate = qcom_qmp_dp_pixel_clk_determine_rate, - .recalc_rate = qcom_qmp_dp_pixel_clk_recalc_rate, +static const struct clk_ops qmp_dp_pixel_clk_ops = { + .determine_rate = qmp_dp_pixel_clk_determine_rate, + .recalc_rate = qmp_dp_pixel_clk_recalc_rate, }; -static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) +static int qmp_dp_link_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { switch (req->rate) { case 162000000: @@ -2359,8 +2356,7 @@ static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw, } } -static unsigned long -qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +static unsigned long qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; @@ -2379,13 +2375,12 @@ qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) } } -static const struct clk_ops qcom_qmp_dp_link_clk_ops = { - .determine_rate = qcom_qmp_dp_link_clk_determine_rate, - .recalc_rate = qcom_qmp_dp_link_clk_recalc_rate, +static const struct clk_ops qmp_dp_link_clk_ops = { + .determine_rate = qmp_dp_link_clk_determine_rate, + .recalc_rate = qmp_dp_link_clk_recalc_rate, }; -static struct clk_hw * -qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) +static struct clk_hw *qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) { struct qmp_combo *qmp = data; unsigned int idx = clkspec->args[0]; @@ -2408,7 +2403,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) int ret; snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); - init.ops = &qcom_qmp_dp_link_clk_ops; + init.ops = &qmp_dp_link_clk_ops; init.name = name; qmp->dp_link_hw.init = &init; ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); @@ -2416,7 +2411,7 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return ret; snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); - init.ops = &qcom_qmp_dp_pixel_clk_ops; + init.ops = &qmp_dp_pixel_clk_ops; init.name = name; qmp->dp_pixel_hw.init = &init; ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); @@ -2452,7 +2447,7 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; - ret = of_clk_add_hw_provider(dp_np, qcom_qmp_dp_clks_hw_get, qmp); + ret = of_clk_add_hw_provider(dp_np, qmp_dp_clks_hw_get, qmp); if (ret) return ret; From patchwork Tue Nov 15 14:40:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20407 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767317wru; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dz10-20020a0564021d4a00b00458b71488bdsi13679990edb.388.2022.11.15.06.42.15; Tue, 15 Nov 2022 06:42:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=k+lN6wSh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238142AbiKOOlX (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231331AbiKOOkz (ORCPT ); Tue, 15 Nov 2022 09:40:55 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A03A71FF83; Tue, 15 Nov 2022 06:40:54 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A9682617DB; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E27CEC4FF0E; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523253; bh=UoN5wh15U6OwcuNRI1oxfnYffMWGCblGCdMNWedim9o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k+lN6wSh/JA5Okl3A0JRdYN+XV9qY3GlJCAIxTCyOzm3AjPyjWL+qc8xYhOLh5vCG fQEb+i0WoBtRYWubxZ2bH9b0BMw/Frd+ou58GsxPb0uTs0Il+Tm5yBO5dM1Gtrh90q c2cjkCLDaWwKp1t5gUBWwuI+G0NpL4XGVm/O/mK5LawRgM1VyxDbK2pEpuXp+l8S2D bEjYruKmNAdfmQV2ku/kJkhnBW3kLa9w6vShM9gLpTx//Yaj4kk3x5G5GJNFRv9/f0 A0xXssAACP515PHXUggf6yAm2cFOFos3BF7VLl3+8eGsZx/8A36hIObg9VKSDagn1t WYwdHPaFGjxyg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fs-DJ; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 11/15] phy: qcom-qmp-combo: rename common-register pointers Date: Tue, 15 Nov 2022 15:40:01 +0100 Message-Id: <20221115144005.2478-12-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573554102084069?= X-GMAIL-MSGID: =?utf-8?q?1749573554102084069?= The common registers are shared by the USB and DP parts of the PHY so drop the misleading "dp" prefix from the corresponding pointers. Note that the "DP" prefix could also be dropped from the corresponding defines, but leave that in place for now. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 24 +++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index fb3705b00823..5777bd1f76b3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -864,7 +864,7 @@ struct qmp_combo { const struct qmp_phy_cfg *cfg; - void __iomem *dp_com; + void __iomem *com; void __iomem *serdes; void __iomem *tx; @@ -1767,7 +1767,7 @@ static int qmp_combo_dp_calibrate(struct phy *phy) static int qmp_combo_com_init(struct qmp_combo *qmp) { const struct qmp_phy_cfg *cfg = qmp->cfg; - void __iomem *dp_com = qmp->dp_com; + void __iomem *com = qmp->com; int ret; mutex_lock(&qmp->phy_mutex); @@ -1798,25 +1798,25 @@ static int qmp_combo_com_init(struct qmp_combo *qmp) if (ret) goto err_assert_reset; - qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, SW_PWRDN); + qphy_setbits(com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, SW_PWRDN); /* override hardware control for reset of qmp phy */ - qphy_setbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + qphy_setbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); /* Default type-c orientation, i.e CC1 */ - qphy_setbits(dp_com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02); + qphy_setbits(com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02); - qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL, USB3_MODE | DP_MODE); + qphy_setbits(com, QPHY_V3_DP_COM_PHY_MODE_CTRL, USB3_MODE | DP_MODE); /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ - qphy_clrbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); - qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); - qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); + qphy_clrbits(com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); + qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); @@ -2538,9 +2538,9 @@ static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node * if (IS_ERR(qmp->serdes)) return PTR_ERR(qmp->serdes); - qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(qmp->dp_com)) - return PTR_ERR(qmp->dp_com); + qmp->com = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(qmp->com)) + return PTR_ERR(qmp->com); qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); if (IS_ERR(qmp->dp_serdes)) From patchwork Tue Nov 15 14:40:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20419 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2768790wru; Tue, 15 Nov 2022 06:45:37 -0800 (PST) X-Google-Smtp-Source: AA0mqf5ks/gjSR7mja5EwVLiLXDsRExYZhdM+eSjqEsFTeq325d1aEH25xSqV/+RdG/2s+Gmmb6a X-Received: by 2002:a17:906:a986:b0:78c:c893:1965 with SMTP id jr6-20020a170906a98600b0078cc8931965mr13816556ejb.247.1668523537377; Tue, 15 Nov 2022 06:45:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523537; cv=none; d=google.com; s=arc-20160816; b=A+GuHvyxG36lT9Z5vpuXpJpdZmoTkfMmN9SWfRTIqzqZntMZs0xX2OL5oMAo+fg2xb IBEB6+ksMsw3PAFHG4Yc2/zX/nuN27Mq50d5td6nhM++jyWuzLj4K35NeeGrGa7e6Gdj anIX8HS2HRKGY5oBzL9XP+N+mCqU4Qi/JBmQHFNkt/dySUhEj7s1ZrDylqLg4yI0K9VZ SuH33RR2q+p1zqHIAFu76TPFzlNQm1FDw1AwjO4ufFMvtPG97i2jcdGznm5DlvhBIrP2 XvO8Pfyib9jHr5Y7XrmZFuKZNF0cWYTk4GgCJ3OD9/aNBY/J8gfkeKb6OSaKoPft3gYT uNgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JC3UrTmX2wa4wmxhSHYZRGtsJepgVpp7Qo6cQEMkCNs=; b=vuOQE4Nrgf/iwQfGNJwelittZbhmZEwwkxJu+1oHuq4eTejFASxFty1nC7Tv8q9XZE g+tUTrxfFTB6rudxUqH/q008ZokyPR2wBmRPNh2okm7sXP48J4zfrZdNPDhln8qf0At3 EA3Dj+3KsjMqKY7jzBg7xX9dnbfl35H/wLJEwT3MwmCm/mkgh0Du0pT8i0WmS1lmXocj RhHyIo1XP/xgjnn7UyotJjt4Ku18huQ5Xzl+Wn8f9ebfXieh6Nl+2ffX2UiY8Xk+qjAg XbhBgfvEGRcAUsnRAEtZCnrKTs768jrmdnTE5HukQiH8x2GiQMOKihoQUVJa5clco1Uo 2xJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PFQvGYv5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a5-20020a170906368500b0078d8cc2006csi10663492ejc.697.2022.11.15.06.45.13; Tue, 15 Nov 2022 06:45:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PFQvGYv5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238444AbiKOOmR (ORCPT + 99 others); Tue, 15 Nov 2022 09:42:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231210AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A03F327CFA; Tue, 15 Nov 2022 06:40:54 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C3A57617DC; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2681C4FF0D; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523253; bh=ewU3Baa1QStipHyL7o/oq4pVac9NfkbMr787am7ssUM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PFQvGYv5A4xCoZCsKPfezBt6LVRN/DER3DBQfx4RP69SaS2/mpHLONm9hV4LZ8C0B W3nxmLnUf4G2Cd0p3sHHyjUrxd+yQY/z23vyjbF0lO18xW4qLOSLE79BqENbmAkH9S MnwolQcSSbOKCYQiebw0UZ/0DpQkKZ4IIQeqJWgu0/pj/vthh5x6pouMz2EsSku58L n/pSnKcS7roh4HFtKfJCZBdiPsliOZqQ3/zc0Blinun9hiitXqgnjHk44zdJ2HWMTe MlSBdgxQ2iUbNyhs3KJFEFMKv7oQ186ydXrnHW52+5KSxIjJcI1n8t+NgU4x9CB+3S 40jgY/+7HlEkw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fv-Fq; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 12/15] phy: qcom-qmp-combo: rename DP_PHY register pointer Date: Tue, 15 Nov 2022 15:40:02 +0100 Message-Id: <20221115144005.2478-13-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573736226463467?= X-GMAIL-MSGID: =?utf-8?q?1749573736226463467?= The DP_PHY registers have erroneously been referred to as "PCS" registers since DisplayPort support was added to the QMP drivers (including in the devicetree binding). Rename the corresponding pointer to match the register names. Note that the repeated "dp" in the field name is intentional and this DP register block is called "DP_PHY" (not just "PHY"). Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 139 +++++++++++----------- 1 file changed, 70 insertions(+), 69 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5777bd1f76b3..b82bd0a221d6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -878,7 +878,7 @@ struct qmp_combo { void __iomem *dp_serdes; void __iomem *dp_tx; void __iomem *dp_tx2; - void __iomem *dp_pcs; + void __iomem *dp_dp_phy; struct clk *pipe_clk; struct clk_bulk_data *clks; @@ -1252,20 +1252,20 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL, qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN | @@ -1273,22 +1273,22 @@ static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) QSERDES_V3_COM_CLKBUF_RX_DRIVE_L, qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0x24, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xbb, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0x24, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); + writel(0xbb, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qmp->dp_pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_dp_phy + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); } static int qmp_combo_configure_dp_swing(struct qmp_combo *qmp, @@ -1372,12 +1372,12 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) * if (lane_cnt == 4 || orientation == ORIENTATION_CC1) * val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; * if (orientation == ORIENTATION_CC2) - * writel(0x4c, qmp->dp_pcs + QSERDES_V3_DP_PHY_MODE); + * writel(0x4c, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_MODE); */ val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); - writel(0x5c, qmp->dp_pcs + QSERDES_DP_PHY_MODE); + writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE); return reverse; } @@ -1390,8 +1390,8 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) qmp_combo_configure_dp_mode(qmp); - writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1414,16 +1414,16 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_VCO_DIV); clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); - writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x04, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); writel(0x20, qmp->dp_serdes + QSERDES_V3_COM_RESETSM_CNTRL); @@ -1434,20 +1434,20 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) 10000)) return -ETIMEDOUT; - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - return readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + return readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1467,7 +1467,7 @@ static int qmp_v3_calibrate_dp_phy(struct qmp_combo *qmp) qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1476,27 +1476,27 @@ static void qmp_v4_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(0x17, qmp->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xb7, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); + writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qmp->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); } static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp) @@ -1518,15 +1518,15 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) u32 phy_vco_div, status; unsigned long pixel_freq; - writel(0x0f, qmp->dp_pcs + QSERDES_V4_DP_PHY_CFG_1); + writel(0x0f, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_CFG_1); qmp_combo_configure_dp_mode(qmp); - writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); - writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1549,15 +1549,15 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_VCO_DIV); clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); writel(0x20, qmp->dp_serdes + QSERDES_V4_COM_RESETSM_CNTRL); @@ -1582,16 +1582,16 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) 10000)) return -ETIMEDOUT; - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1640,11 +1640,11 @@ static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp) writel(drvr1_en, qmp->dp_tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); writel(bias1_en, qmp->dp_tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1697,11 +1697,11 @@ static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp) writel(drvr1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); writel(bias1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_dp_phy + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1733,7 +1733,7 @@ static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp) qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1906,7 +1906,7 @@ static int qmp_combo_dp_power_off(struct phy *phy) struct qmp_combo *qmp = phy_get_drvdata(phy); /* Assert DP PHY power down */ - writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); return 0; } @@ -2463,15 +2463,16 @@ static int qmp_combo_parse_dt_lecacy_dp(struct qmp_combo *qmp, struct device_nod * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; * tx2 -> 3; rx2 -> 4 * - * Note that only tx/tx2 and pcs are used by the DP implementation. + * Note that only tx/tx2 and pcs (dp_phy) are used by the DP + * implementation. */ qmp->dp_tx = devm_of_iomap(dev, np, 0, NULL); if (IS_ERR(qmp->dp_tx)) return PTR_ERR(qmp->dp_tx); - qmp->dp_pcs = devm_of_iomap(dev, np, 2, NULL); - if (IS_ERR(qmp->dp_pcs)) - return PTR_ERR(qmp->dp_pcs); + qmp->dp_dp_phy = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qmp->dp_dp_phy)) + return PTR_ERR(qmp->dp_dp_phy); qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); if (IS_ERR(qmp->dp_tx2)) From patchwork Tue Nov 15 14:40:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20412 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767497wru; Tue, 15 Nov 2022 06:43:09 -0800 (PST) X-Google-Smtp-Source: AA0mqf4FniDSPd6RjbsGhOFjjBAZUBGTJqL+kJibCS4fGdHQ5WmVcOP2qhAn/cUyIPLwZQS2muM/ X-Received: by 2002:a05:6402:60a:b0:461:92bd:21cf with SMTP id n10-20020a056402060a00b0046192bd21cfmr14642131edv.405.1668523389585; Tue, 15 Nov 2022 06:43:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523389; cv=none; d=google.com; s=arc-20160816; b=ZYpy/b+53J1CaGDbA+zockx38Qt8LgfjAyYgp8YXdL1twP4KlHPmIhPFdrOy4psBrV 8EwpDr+ROkPoQTpGNvz90kr2gZMZQ+3PJhl97TpQPs3HsxWbZAXW2uqvIhLyU9kVrBxh WyPCZXkW9z+vZSEhEy59Ifv1fVJXbQ48UuFraAPMzBYRm+AOB9jJhjqJwtO67EDeX4px DxI6pnxGVu/fLOseSzTEo6vPfJ1g0DTLdsZkifeEqOoHFHFcu0Y3+xMBRyOkxzY9+jOV aTGmTanG2jrOlLsCihMXDzXUGALw/gWh30i41lPLiRCd7kb/a01u3QpVwhgCZFnhOBtH n7Ew== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n26-20020aa7c45a000000b004640d83d03esi10905160edr.506.2022.11.15.06.42.43; Tue, 15 Nov 2022 06:43:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="EW6Bh/l0"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238381AbiKOOl4 (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbiKOOk5 (ORCPT ); Tue, 15 Nov 2022 09:40:57 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 405B72C130; Tue, 15 Nov 2022 06:40:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C49C0B8198E; Tue, 15 Nov 2022 14:40:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F14A8C4FF0F; Tue, 15 Nov 2022 14:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523253; bh=516HTvXYHrQrblCudPuQCntVAN2LBYKUbYmS/g+agHg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EW6Bh/l0gE1jxNHcgkJIUyFAPOHrEs6adX9M1v86WNeYVO04wtFE7fHWepD7LRW/5 nD2sV8M7V4FX6FYItsJt8vnBtcmvDabtzbNLSBlxUO89i7+2f96UfwRiA2xzmhEKqD GbWJjY/1zPOVHO0wUhvCWRXYRZShYZt74xDvTf5aToJ1HinzpJnC7YfA5MFvVmD+1U b/HLdaDPHjO1VAXsk3Pq55NNUw9hryUNgjp1OTnlOO6kCBeByYoV4wTUbuzNbW4plg ZTdeARgJRnvbfPrVawbonNLl1YfzggCkKejH23+8nrFSVUzvw5/CvYgGyzEQlsG5KX UDJBAjDZDAaqw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000fy-IT; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 13/15] phy: qcom-qmp-combo: add support for updated sc8280xp binding Date: Tue, 15 Nov 2022 15:40:03 +0100 Message-Id: <20221115144005.2478-14-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573581753347164?= X-GMAIL-MSGID: =?utf-8?q?1749573581753347164?= Add support for the new SC8280XP binding. Note that the binding does not try to describe every register subregion and instead the driver holds the corresponding offsets. Also note that (possibly) unlike on earlier platforms, the TX registers are used by both the USB and DP implementation. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 145 ++++++++++++++++++++-- 1 file changed, 134 insertions(+), 11 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index b82bd0a221d6..77052c66cf70 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include "phy-qcom-qmp.h" @@ -798,7 +798,23 @@ static const u8 qmp_dp_v5_voltage_swing_hbr_rbr[4][4] = { struct qmp_combo; +struct qmp_combo_offsets { + u16 com; + u16 txa; + u16 rxa; + u16 txb; + u16 rxb; + u16 usb3_serdes; + u16 usb3_pcs_misc; + u16 usb3_pcs; + u16 usb3_pcs_usb; + u16 dp_serdes; + u16 dp_dp_phy; +}; + struct qmp_phy_cfg { + const struct qmp_combo_offsets *offsets; + /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ const struct qmp_phy_init_tbl *serdes_tbl; int serdes_tbl_num; @@ -959,6 +975,20 @@ static const char * const sc7180_usb3phy_reset_l[] = { "phy", }; +static const struct qmp_combo_offsets qmp_combo_offsets_v5 = { + .com = 0x0000, + .txa = 0x0400, + .rxa = 0x0600, + .txb = 0x0a00, + .rxb = 0x0c00, + .usb3_serdes = 0x1000, + .usb3_pcs_misc = 0x1200, + .usb3_pcs = 0x1400, + .usb3_pcs_usb = 0x1700, + .dp_serdes = 0x2000, + .dp_dp_phy = 0x2200, +}; + static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = { .serdes_tbl = qmp_v3_usb3_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl), @@ -1098,6 +1128,8 @@ static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = { }; static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { + .offsets = &qmp_combo_offsets_v5, + .serdes_tbl = sc8280xp_usb43dp_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(sc8280xp_usb43dp_serdes_tbl), .tx_tbl = sc8280xp_usb43dp_tx_tbl, @@ -1138,7 +1170,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { .vreg_list = qmp_phy_vreg_l, .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), .regs = qmp_v4_usb3phy_regs_layout, - .pcs_usb_offset = 0x300, }; static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = { @@ -2421,6 +2452,22 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return 0; } +static struct clk_hw *qmp_combo_clk_hw_get(struct of_phandle_args *clkspec, void *data) +{ + struct qmp_combo *qmp = data; + + switch (clkspec->args[0]) { + case QMP_USB43DP_USB3_PIPE_CLK: + return &qmp->pipe_clk_fixed.hw; + case QMP_USB43DP_DP_LINK_CLK: + return &qmp->dp_link_hw; + case QMP_USB43DP_DP_VCO_DIV_CLK: + return &qmp->dp_pixel_hw; + } + + return ERR_PTR(-EINVAL); +} + static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node *usb_np, struct device_node *dp_np) { @@ -2434,6 +2481,15 @@ static int qmp_combo_register_clocks(struct qmp_combo *qmp, struct device_node * if (ret) return ret; + /* + * Register a single provider for bindings without child nodes. + */ + if (usb_np == qmp->dev->of_node) + return devm_of_clk_add_hw_provider(qmp->dev, qmp_combo_clk_hw_get, qmp); + + /* + * Register multiple providers for legacy bindings with child nodes. + */ ret = of_clk_add_hw_provider(usb_np, of_clk_hw_simple_get, &qmp->pipe_clk_fixed.hw); if (ret) @@ -2558,6 +2614,63 @@ static int qmp_combo_parse_dt_legacy(struct qmp_combo *qmp, struct device_node * return 0; } +static int qmp_combo_parse_dt(struct qmp_combo *qmp) +{ + struct platform_device *pdev = to_platform_device(qmp->dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + const struct qmp_combo_offsets *offs = cfg->offsets; + struct device *dev = qmp->dev; + void __iomem *base; + + if (!offs) + return -EINVAL; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + qmp->com = base + offs->com; + qmp->tx = base + offs->txa; + qmp->rx = base + offs->rxa; + qmp->tx2 = base + offs->txb; + qmp->rx2 = base + offs->rxb; + + qmp->serdes = base + offs->usb3_serdes; + qmp->pcs_misc = base + offs->usb3_pcs_misc; + qmp->pcs = base + offs->usb3_pcs; + qmp->pcs_usb = base + offs->usb3_pcs_usb; + + qmp->dp_serdes = base + offs->dp_serdes; + qmp->dp_tx = base + offs->txa; + qmp->dp_tx2 = base + offs->txb; + qmp->dp_dp_phy = base + offs->dp_dp_phy; + + qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe"); + if (IS_ERR(qmp->pipe_clk)) { + return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), + "failed to get usb3_pipe clock\n"); + } + + return 0; +} + +static struct phy *qmp_combo_phy_xlate(struct device *dev, struct of_phandle_args *args) +{ + struct qmp_combo *qmp = dev_get_drvdata(dev); + + if (args->args_count == 0) + return ERR_PTR(-EINVAL); + + switch (args->args[0]) { + case QMP_USB43DP_USB3_PHY: + return qmp->usb_phy; + case QMP_USB43DP_DP_PHY: + return qmp->dp_phy; + } + + return ERR_PTR(-EINVAL); +} + static int qmp_combo_probe(struct platform_device *pdev) { struct qmp_combo *qmp; @@ -2590,17 +2703,22 @@ static int qmp_combo_probe(struct platform_device *pdev) if (ret) return ret; + /* Check for legacy binding with child nodes. */ usb_np = of_get_child_by_name(dev->of_node, "usb3-phy"); - if (!usb_np) - return -EINVAL; + if (usb_np) { + dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); + if (!dp_np) { + of_node_put(usb_np); + return -EINVAL; + } - dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); - if (!dp_np) { - of_node_put(usb_np); - return -EINVAL; - } + ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + } else { + usb_np = of_node_get(dev->of_node); + dp_np = of_node_get(dev->of_node); - ret = qmp_combo_parse_dt_legacy(qmp, usb_np, dp_np); + ret = qmp_combo_parse_dt(qmp); + } if (ret) goto err_node_put; @@ -2636,7 +2754,12 @@ static int qmp_combo_probe(struct platform_device *pdev) phy_set_drvdata(qmp->dp_phy, qmp); - phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + dev_set_drvdata(dev, qmp); + + if (usb_np == dev->of_node) + phy_provider = devm_of_phy_provider_register(dev, qmp_combo_phy_xlate); + else + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); of_node_put(usb_np); of_node_put(dp_np); From patchwork Tue Nov 15 14:40:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20416 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767708wru; Tue, 15 Nov 2022 06:43:32 -0800 (PST) X-Google-Smtp-Source: AA0mqf735SRSAyEOBeNKgXjuMG9KfKPBl06DgajMU4QEdMMawFwUAQk9m9UbMY+C0t61hDQaSCoX X-Received: by 2002:a17:906:3101:b0:78d:6429:a806 with SMTP id 1-20020a170906310100b0078d6429a806mr14042461ejx.553.1668523412127; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y12-20020a056402440c00b00463a83ce065si13391867eda.420.2022.11.15.06.43.04; Tue, 15 Nov 2022 06:43:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=p+p3NHhg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238462AbiKOOmV (ORCPT + 99 others); Tue, 15 Nov 2022 09:42:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232248AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B55B2A703; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2FAEB617E2; Tue, 15 Nov 2022 14:40:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 28207C433D7; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523253; bh=DPEC4Ilp5QnQgwZzP4PbKBn+Zx699/V1FQSwG3qGmeU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=p+p3NHhgf88bOUZcdCaJIm2VBQhroaQeVSQI0q94bPm9NDqgsix9PJFXES+8ceIMw Af1cggMaaj8rO8nH2lDklqQazzurYkphy1XypW5goJ3eDdH6WR5UNRFG1a13slY31F lHgztVLe23QOxmSLnpSCfbFknd7RnVSjuj1EMAchM/U7koalr2VPvKwn2VPtW1cOBt HzmbnenW8N7I++Frc0Jk9+E4dr4GwI71KwAksx2b/m8aQBhRmheTVEuKG57z64QSaB 2lvm8jSj/VHmIkMDOSCsmnpfAbMTRDM+9ppQCzISz6zuSEcIUknLaakouH1G7cyKzj yUJpyYcoCIkUA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000g1-Kz; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 14/15] arm64: dts: qcom: sc8280xp: fix primary USB-DP PHY reset Date: Tue, 15 Nov 2022 15:40:04 +0100 Message-Id: <20221115144005.2478-15-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573605327006751?= X-GMAIL-MSGID: =?utf-8?q?1749573605327006751?= The vendor kernel is using the GCC_USB4_DP_PHY_PRIM_BCR and GCC_USB4_1_DP_PHY_PRIM_BCR resets for the USB4-USB3-DP QMP PHYs. Update the primary USB-DP PHY node to match. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index e769b7b0004b..85c674e7e1a5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1682,7 +1682,7 @@ usb_0_qmpphy: phy-wrapper@88ec000 { clock-names = "aux", "ref_clk_src", "ref", "com_aux"; resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, - <&gcc GCC_USB3_DP_PHY_PRIM_BCR>; + <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; power-domains = <&gcc USB30_PRIM_GDSC>; From patchwork Tue Nov 15 14:40:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 20408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2767399wru; Tue, 15 Nov 2022 06:42:52 -0800 (PST) X-Google-Smtp-Source: AA0mqf47Sktqh3Di0cN+7RNn5TZwCquX6GKVuYnpjfijnP8L3WRkMkOzmdkJZXPcIUuAxmC3QmnP X-Received: by 2002:a17:906:46c4:b0:7ac:db40:7e1 with SMTP id k4-20020a17090646c400b007acdb4007e1mr14471340ejs.204.1668523372664; Tue, 15 Nov 2022 06:42:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668523372; cv=none; d=google.com; s=arc-20160816; b=pZCyrrTMYubigxrMYMSNxIRPO9UXlKYUQgRi8sRG8FRdbE171ngfKt5lOTMBzwwLUw ZuZJoyqCWcfp4hZ41azCushsDsd7eYzuL3pehQTgFnMz6+Ufi0SFm8a2n/N57+LagDqb YVL/imScSEqXiiesYP6oMQC2+6FElFoUCHNaDW3I7P5U1E5DPx4Z+3G5hoPkM30Dj2if HzJl50fjRqyEmlQPsNwgLl4+1wgVGMyNiqKZmDrwIU2+oP4+GZq3RLU0P6wNgjXIVDXj NpBm/m/GhBt7zuVasWgboC1ETruV8j4BOKOFd/1Xk5L/A1q4FQpRp9s9itFDMvvScHR6 PLUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/6Vv/w6K9zCywBrFk9RRx+pxCDVSaRfGScSd0vKKCiY=; b=yFcQzAkBYIzQpM+tNFkVBact+nuNOwzcJnWYlhWKe4FVTcoeoCc9iAJ0VzRN62oJPM UZpGP+h62YLjwhy/s8l+viqdFA5NDoCACV4Bl0fh2TEXDYLkct0XsTdWHwJ3fl5K4Adm nk2A33jn5NA8RRj0S8X4AE4RTExh5ooG4YOdqob4/Apjn4G5ij3MSP4b8cpLuqFBx6Zy 73Vp5Wszn7VcsUxsK7siMpyFccvFT412I8M1+MI8Qq1kMy43cvlUJxV7v9AEbLS5Ttgg IUQa8c79y+2Eugi8y96bk42JQZ6kzM2DY5hLgH3a0Zs6v/ZNmJlLRlWnBKcp6XH6ZTlB FDuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Mf5uFpFy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dk22-20020a170906f0d600b007aa8a5131a3si8545193ejb.181.2022.11.15.06.42.25; Tue, 15 Nov 2022 06:42:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Mf5uFpFy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238039AbiKOOla (ORCPT + 99 others); Tue, 15 Nov 2022 09:41:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232197AbiKOOk4 (ORCPT ); Tue, 15 Nov 2022 09:40:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AE932A24C; Tue, 15 Nov 2022 06:40:55 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D5FE4617E1; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 29BCFC4FF1F; Tue, 15 Nov 2022 14:40:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668523253; bh=S2uFsZNL8KCSy0MjdXARA3YnKzPzvstaWp9vcv8/aFY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mf5uFpFymnYFkN0eVTFtnJ0vZRjvBTeDjQ2QP4hABjB0tvWpC8z1quUHeUKUcdsQ5 F2pQ+zo3NRRYF6NhMddbjcwOfY5f1DypYXsstQH23oxwDpEUdVDmFDSgvZsirQDXhg lNonDDM0JDmWBFFh2+CKPY5jc9S3SvvapCxYF8BNkNJz0Ye8NbEwA5mUIFMqQqnxFq E6kHILwQ22xa4hekw2yKUiZq2iEH+3c0vPxchUatRtjLtEBItyIPwm71K8Mdw90VoL fE3TjW4cec/lAcM9sDjwBOwbdDyXkPPklvqHnWtXAAW1u+nvrb0ac7CZDbsIHsxpUd UmqtidQw+vk3A== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oux6t-0000g9-NW; Tue, 15 Nov 2022 15:40:23 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 15/15] arm64: dts: qcom: sc8280xp: fix USB-DP PHY nodes Date: Tue, 15 Nov 2022 15:40:05 +0100 Message-Id: <20221115144005.2478-16-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221115144005.2478-1-johan+linaro@kernel.org> References: <20221115144005.2478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749573564145386461?= X-GMAIL-MSGID: =?utf-8?q?1749573564145386461?= Update the USB4-USB3-DP QMP PHY nodes to match the new binding which specifically includes the missing register regions (e.g. DP_PHY) and allows for supporting DisplayPort Alternate Mode. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 77 ++++++++------------------ 1 file changed, 23 insertions(+), 54 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 85c674e7e1a5..3c5bc56e68fc 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -763,7 +764,7 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&usb_0_ssphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>, <0>, <0>, @@ -771,7 +772,7 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&usb_1_ssphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>, <0>, <0>, @@ -1666,42 +1667,26 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; - usb_0_qmpphy: phy-wrapper@88ec000 { + usb_0_qmpphy: phy@88eb000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; - reg = <0 0x088ec000 0 0x1e4>, - <0 0x088eb000 0 0x40>, - <0 0x088ed000 0 0x1c8>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x088eb000 0 0x4000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB4_EUD_CLKREF_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_PRIM_GDSC>; resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, <&gcc GCC_USB4_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; - power-domains = <&gcc USB30_PRIM_GDSC>; + #clock-cells = <1>; + #phy-cells = <1>; status = "disabled"; - - usb_0_ssphy: usb3-phy@88eb400 { - reg = <0 0x088eb400 0 0x100>, - <0 0x088eb600 0 0x3ec>, - <0 0x088ec400 0 0x364>, - <0 0x088eba00 0 0x100>, - <0 0x088ebc00 0 0x3ec>, - <0 0x088ec200 0 0x18>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb0_phy_pipe_clk_src"; - }; }; usb_1_hsphy: phy@8902000 { @@ -1718,42 +1703,26 @@ usb_1_hsphy: phy@8902000 { status = "disabled"; }; - usb_1_qmpphy: phy-wrapper@8904000 { + usb_1_qmpphy: phy@8903000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; - reg = <0 0x08904000 0 0x1e4>, - <0 0x08903000 0 0x40>, - <0 0x08905000 0 0x1c8>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x08903000 0 0x4000>; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB4_CLKREF_CLK>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; + + power-domains = <&gcc USB30_SEC_GDSC>; resets = <&gcc GCC_USB3_PHY_SEC_BCR>, <&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; - power-domains = <&gcc USB30_SEC_GDSC>; + #clock-cells = <1>; + #phy-cells = <1>; status = "disabled"; - - usb_1_ssphy: usb3-phy@8903400 { - reg = <0 0x08903400 0 0x100>, - <0 0x08903600 0 0x3ec>, - <0 0x08904400 0 0x364>, - <0 0x08903a00 0 0x100>, - <0 0x08903c00 0 0x3ec>, - <0 0x08904200 0 0x18>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb1_phy_pipe_clk_src"; - }; }; mdss1_dp0_phy: phy@8909a00 { @@ -1941,7 +1910,7 @@ usb_0_dwc3: usb@a600000 { reg = <0 0x0a600000 0 0xcd00>; interrupts = ; iommus = <&apps_smmu 0x820 0x0>; - phys = <&usb_0_hsphy>, <&usb_0_ssphy>; + phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -1995,7 +1964,7 @@ usb_1_dwc3: usb@a800000 { reg = <0 0x0a800000 0 0xcd00>; interrupts = ; iommus = <&apps_smmu 0x860 0x0>; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; };