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Fri, 2 Feb 2024 16:29:07 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com AFA6EC001668 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920147; bh=s6uMo50V83lQTFPmBSTZbJWskTqu4gIvfj3LFjK0xHk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SYsPErs/LBSgVl54vY+9OxENj5P2edKlodbbaIvSW/ld25bUWhQgOLIiuqhBX6GXc eFJ61p8suOaZsO22pVY7v9NiFgsZxmy6UkwwHKGDfVtJl2L8fQ7ZppXP9aWQ6Uw288 JFKXakzG4zkCGo/dmKPXuVmLNi37es760zhicSX0= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 48C9418041CAC4; Fri, 2 Feb 2024 16:29:06 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v4 01/12] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs Date: Fri, 2 Feb 2024 16:28:22 -0800 Message-Id: <20240203002834.171462-2-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789847126060800696 X-GMAIL-MSGID: 1789849170602632898 Update the descriptions to reflect different families of broadband SoC and use the general name bcmbca for ARM based SoC. Remove the requirement of interrupts property to reflect the driver code and only require interrupt-names when interrupts property present. Also add myself to the list of maintainers. Signed-off-by: William Zhang Reviewed-by: David Regan Reviewed-by: Rob Herring --- Changes in v4: - Split the yaml changes into three patches. This is the first one. Changes in v3: - Update brcm,nand-use-wp description - Revert the description change to BCM63168 SoC-specific NAND controller Changes in v2: - Revert the new compatible string nand-bcmbca - Drop the BCM63168 compatible fix to avoid any potential ABI incompatibility issue - Simplify the explanation for brcm,nand-use-wp - Keep the interrupt name requirement when interrupt number is specified .../devicetree/bindings/mtd/brcm,brcmnand.yaml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index f57e96374e67..e54ca08a798a 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller maintainers: - Brian Norris - Kamal Dasu + - William Zhang description: | The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND @@ -18,9 +19,10 @@ description: | supports basic PROGRAM and READ functions, among other features. This controller was originally designed for STB SoCs (BCM7xxx) but is now - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and - iProc/Cygnus. Its history includes several similar (but not fully register - compatible) versions. + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus. + Its history includes several similar (but not fully register compatible) + versions. -- Additional SoC-specific NAND controller properties -- @@ -53,7 +55,7 @@ properties: - brcm,brcmnand-v7.2 - brcm,brcmnand-v7.3 - const: brcm,brcmnand - - description: BCM63138 SoC-specific NAND controller + - description: BCMBCA SoC-specific NAND controller items: - const: brcm,nand-bcm63138 - enum: @@ -177,6 +179,8 @@ allOf: - const: iproc-idm - const: iproc-ext - if: + required: + - interrupts properties: interrupts: minItems: 2 @@ -189,7 +193,6 @@ unevaluatedProperties: false required: - reg - reg-names - - interrupts examples: - | From patchwork Sat Feb 3 00:28:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196127 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp800648dyc; Fri, 2 Feb 2024 17:42:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IFLm4srnVq/zgcEViIafl+V4l35mOJgWmqzH9avwPa4o2qHLKn2WI8n/hE6ondkMwICvmg8 X-Received: by 2002:a17:90b:388:b0:296:13d5:110 with SMTP id ga8-20020a17090b038800b0029613d50110mr410020pjb.17.1706924562523; Fri, 02 Feb 2024 17:42:42 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706924562; cv=pass; d=google.com; s=arc-20160816; b=M8SYvY2CgQGwbF9dWdYI0kibQXxTCdiB632DYhuIe9WrYz81fy3GcFtCwhb/GmHNlY 2/0C3MQzTuertzgRlXPfInhosuGDcClBgKEJgYaYaT7PWP4QzIBQLLAWHk7/2AUHTYDH pyB4JCcFLbJDaqNk4i8zv0Isb/iCM7CO0nJe2fpLj3tX2024ZPNTcgOfDInwnecn+bb7 LbaV1PgY++yNDaFfLySV+W3OUCtF0IE7E6pt2gQcA31dYR0ScOyN6T/rN8Za4zYp3oXo rPVh5ymMcTqjXFyIAWKcaewXqgxUnloK0TCCilFCN1jFHIFpv0CvSDWick3N8XIDzvcb ecww== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=1rSX3aMguKIozHEEqgaGeLhb4m5tR3HEId10VBVTd+4=; fh=7e+6RFeWZahcl6jdc8DhLMS8TCy6KeNNitHKo3xi210=; b=I4aZgXoRb3kCKjgUxXF8xGtWQ2DoQdJSQhohjPX5PYyBzsXyORXP/Hfn/E2fjPV077 S9EHFcqBfCCnrJwk2Q3hgmLzzbkv8HsUjYFDlbF1XZYMco3wX9e3Vw47dCSWVOI2g8Gz XsWa2A1EeKERO8Brrrl1ojxwAOdZ3vCFzUFkGSH5iUZmleT/bF/m8eiUCyzxeWOjtelv m2tyi2U0tSbrrTgAGUp00YcFiYkp9VmlkV/3gTY27pNlvB5w+/EJeAFn8tx67870Hewj AtYPxNnNf0sCmzknPSpy+8trKkvEzbQVr2UVTFMiuVrOSwXZpyyhzOYp3Ojpq5Dq9+Vm HK5A==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=vxD3GewR; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50778-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50778-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCXgR/5/9RGhTp3d4JJM7bHH8P/7gzql5F1VErXno1v3uCvrjZu6g0tDfz+EZgTFujpCHNeBH6QpuUSD0E0gCo6urZlJJg== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: William Zhang Reviewed-by: Conor Dooley --- Changes in v4: - Move the WP pin property to this separate patch and change it to boolean type. Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index e54ca08a798a..d0168d55c73e 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -113,6 +113,14 @@ properties: earlier versions of this core that include WP type: boolean + brcm,wp-not-connected: + description: + Use this property when board design does not connect controller's + NAND_WPb pin to NAND chip's WP_L pin and disable the write + protection feature. By default, controller assumes the pin is + connected and feature is used. + $ref: /schemas/types.yaml#/definitions/flag + patternProperties: "^nand@[a-f0-9]$": type: object From patchwork Sat Feb 3 00:28:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196182 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp821662dyc; Fri, 2 Feb 2024 19:00:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IHd1fzDi4/MnJtK5fwPYmJaj4YWdB7JiXUZmQ5Ysb6CxM02qVmT+UPQmnADMDP4vP15g7Qf X-Received: by 2002:a05:620a:8d9:b0:783:e2ed:cf1c with SMTP id z25-20020a05620a08d900b00783e2edcf1cmr7460683qkz.35.1706929205443; Fri, 02 Feb 2024 19:00:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706929205; cv=pass; d=google.com; s=arc-20160816; b=cYaJa1wkUYLzWJcW8Rqluh1CZJqdPaxaYA7z7IM+jLaHd3Z0paymEsITm+H/5ZTVU/ hAYoQTwv6KpKIP8uMFGpFwuZYT6Q0SIlVgHX4RE1C/YYXwwnwOpEADzNvafq3KsdyJ4o liVgVWTg0/zQrws2K1YkMJ1aJ5N8fWyExCEp+7Gi9pnhS2tVntTE6e9JXnyZc+sLw2+4 e0uxytNVYbi+n0olKjkuz/JS8lOfYsQusjrl0ESvgLuO4PlDz6VJTrBayoThhAjKmhaV eyPmIKP9UrW1DdNaJWuZwmjReCUNZ6LmNypHnXp1lSJgTq3dIvnX04M75y7VxHqPVONY nXdw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=gZDn/As6UULU3B80feN3/8QHRxtRkZHA9N1Yp3+myeg=; fh=2Z1tZOanrYf3gBdPYluAg5vEZ95Dx36RYlx59g0+ZBg=; b=r9tUwYy4lHtxzqMladD2mgCyU8bOIPJyddADvwh6ZP9No01s0pl13vy19aN3z1zL50 y8TARCU2P9cwUJZ0H/BQeShinb6xE+MopvZ3LT1Ksddd5n1mQdUdfN4eQ6hcG/Pb290P IeEdIerXLvR0Y/2rqaHjlCOoSxCsiafISYD4BQKIMRULERLsE7IbwW0ohMW1I4fopELD yPj2TE5SRvexV00tcmvS+jbCdL1reafvRxA8ebDH/y7QQLkgWfdF7fKE3c4xpK/ueoJc u7NgqPHIbEcoFYH8pRQRdiSDjOJ0r/JKxCzj7kk2sje71SyHWePWcN9c9oRhZDEjLrxR MnUg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=ty2gDHgv; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50777-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50777-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCUYSWNRO7+5nf3sXXJLG+okMtyq9xkDsZQ48R6bT570KaBHWn3vzm7s4/7fEWs64gIUNnTVkVkVhFQWEhwV/babgf338w== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: William Zhang --- Changes in v4: - Move ecc strap property to this separate patch and remove some non-binding related text from the description Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index d0168d55c73e..2599d902ec3a 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -147,6 +147,14 @@ patternProperties: layout. $ref: /schemas/types.yaml#/definitions/uint32 + brcm,nand-ecc-use-strap: + description: + This flag indicates the ecc strength and spare area size should + be retrieved from the SoC NAND boot strap setting instead of + nand-ecc-strength and brcm,nand-oob-sector-size or auto detection. + This is commonly used by the BCMBCA SoC board design. + $ref: /schemas/types.yaml#/definitions/flag + unevaluatedProperties: false allOf: From patchwork Sat Feb 3 00:28:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196126 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp799168dyc; Fri, 2 Feb 2024 17:37:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IFRkmsOl5ooAFA1C/G2oI4BH83UG2JNCKVE18fHeRPsLxz+ZcrOd2N1nb9jh97KkFP/oc8u X-Received: by 2002:a05:6358:2910:b0:176:d3d2:66a2 with SMTP id y16-20020a056358291000b00176d3d266a2mr3340283rwb.15.1706924252954; Fri, 02 Feb 2024 17:37:32 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706924252; cv=pass; d=google.com; s=arc-20160816; b=sq3PkNxBYwmXZqp6gAPpD+6lv3PGmcwSRgAIkOmnym3UGKQe7cipY2jMRCsTPlW3Ri Owwsjy3crjZe6HWC6o6WB4Qt4+fWLAJHnwToKEqfYJyE9eODKZbjSCuwkT5sjyMIOzz9 uLuBbCA8mrjzSsLbWMbfwkZb/xJq6adF1KnX5YqrZeMOZQy8SCdU4631G0V5g2eegonX 3MJQfhZ2zmU3ixitertq/7GAIWzl4DbY9q+8OWJO2Teb1sWj48tfllCkvVhUFFuZKSHj VzpQEPX8pp+KHu4Xb3yPD/VPHvo+1zLrKjndVSXi+tFHDVOgthvuigRWn0aw4GHlEEfS yvTA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=fdilHldJvoBPe7Fm0DNXrswCYS8Zk292iUTPR9R69/Q=; fh=FzPhlSH3Z5gPpmsDBAkgNLTTc2qUxoFl3Qi4xeA7BMk=; b=LJCpzDAeOMDg2qLXx/At5DXOSKoBrAse3jZywDbFXcSzIeHEsUdstxXrbV2V7wZ0NY KtmmwrpUDBRrsDavUWv5xSEpjUCIpndJL03x0ZNRyjZAMLJbywx4l74qippSGbysV7R5 3JHGm4mTCaXkyeiNwfSPHj0PE7n9WHR2aF1pYNMtFC68JfUsx+i1kvEN/Ol6G7vZGx7V mxwl4PgWnX9HpE5Fx6vojddFYM+wJZbrkjl2FcgUdfVSIEcCuKirPkoeIF2bjSkpLgp6 0SkygtR8GQCA5VlyZ/ah/98U+Q88dPS63PrhEi0UCCNHSypFo2gJ+TpaJnaEPWVRaOhJ eWMg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=c+3Bfgxf; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50779-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50779-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCUzEjWMDZybn1nlktiTsu53T/A8PxWgtE1Oas6evCks0b+eIpww/RTMEC1DgcyWThzL0zOzdBPGcp2r6WhyL8FbL1qx6g== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Fri, 2 Feb 2024 16:29:23 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com DF3DDC0029C3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920163; bh=KJqZP1iSgrlN4wC7toektFTN5utdpEAvhiz0Odr8fQY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c+3Bfgxf2/1sIZJt/JmdXwglWAQ8lIYQbDpSj8LqF14MjlLXqkSUtjYf16Bvnj9fr jL8fI90aeO8JiyXTtdhwzpDhVrklqY0zntKFYVr2d+mmPX+mPqezmkGe4oJLNfYLQF c4wXJYnpxNoPM1DwQyFPn0mwrDsvGLAm2hQs13dc= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 7E30B18041CAC4; Fri, 2 Feb 2024 16:29:22 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Conor Dooley , Andre Przywara , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli , Alexandre TORGUE , Shawn Guo Subject: [PATCH v4 04/12] ARM: dts: broadcom: bcmbca: Add NAND controller node Date: Fri, 2 Feb 2024 16:28:25 -0800 Message-Id: <20240203002834.171462-5-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789839805381577506 X-GMAIL-MSGID: 1789839805381577506 Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts files. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: None arch/arm/boot/dts/broadcom/bcm47622.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63138.dtsi | 7 ++++++- arch/arm/boot/dts/broadcom/bcm63148.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63178.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6756.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6846.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6855.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6878.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm947622.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 14 +++++++------- arch/arm/boot/dts/broadcom/bcm963148.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963178.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96756.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96846.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96855.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96878.dts | 10 ++++++++++ 17 files changed, 191 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi index 7cd38de118c3..485863f9c420 100644 --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi index 4ef02283612b..e74ba6bf370d 100644 --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi @@ -229,7 +229,12 @@ nand_controller: nand-controller@2000 { reg-names = "nand", "nand-int-base"; status = "disabled"; interrupts = ; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; }; serial@4400 { diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi index 24431de1810e..53703827ee3f 100644 --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x2000 0x600>, <0xf0 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm63178.dtsi b/arch/arm/boot/dts/broadcom/bcm63178.dtsi index 3f9aed96babf..6d8d33498983 100644 --- a/arch/arm/boot/dts/broadcom/bcm63178.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63178.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6756.dtsi b/arch/arm/boot/dts/broadcom/bcm6756.dtsi index 1d8d957d65dd..6433f8fa5eff 100644 --- a/arch/arm/boot/dts/broadcom/bcm6756.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6756.dtsi @@ -139,6 +139,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi index cf92cf8c4693..ee361cb00b7c 100644 --- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi index 52d6bc89f9f8..52915ec6f339 100644 --- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi index 2c5d706bac7e..70cf23a65fdb 100644 --- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi @@ -120,6 +120,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm947622.dts b/arch/arm/boot/dts/broadcom/bcm947622.dts index 93b8ce22678d..6241485408d3 100644 --- a/arch/arm/boot/dts/broadcom/bcm947622.dts +++ b/arch/arm/boot/dts/broadcom/bcm947622.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138.dts b/arch/arm/boot/dts/broadcom/bcm963138.dts index 1b405c249213..7fd87e05ec20 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138.dts @@ -29,3 +29,13 @@ &serial0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts index b5af61853a07..f60d09908ab9 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts @@ -32,15 +32,15 @@ &serial1 { }; &nand_controller { + brcm,wp-not-connected; status = "okay"; +}; - nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sectors-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + nand-on-flash-bbt; }; &ahci { diff --git a/arch/arm/boot/dts/broadcom/bcm963148.dts b/arch/arm/boot/dts/broadcom/bcm963148.dts index 1f5d6d783f09..44bca063a327 100644 --- a/arch/arm/boot/dts/broadcom/bcm963148.dts +++ b/arch/arm/boot/dts/broadcom/bcm963148.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963178.dts b/arch/arm/boot/dts/broadcom/bcm963178.dts index d036e99dd8d1..098a222cd71a 100644 --- a/arch/arm/boot/dts/broadcom/bcm963178.dts +++ b/arch/arm/boot/dts/broadcom/bcm963178.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96756.dts b/arch/arm/boot/dts/broadcom/bcm96756.dts index 8b104f3fb14a..402038d3cd0c 100644 --- a/arch/arm/boot/dts/broadcom/bcm96756.dts +++ b/arch/arm/boot/dts/broadcom/bcm96756.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96846.dts b/arch/arm/boot/dts/broadcom/bcm96846.dts index 55852c229608..943896afb7cc 100644 --- a/arch/arm/boot/dts/broadcom/bcm96846.dts +++ b/arch/arm/boot/dts/broadcom/bcm96846.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96855.dts b/arch/arm/boot/dts/broadcom/bcm96855.dts index 2ad880af2104..571663d9a1ea 100644 --- a/arch/arm/boot/dts/broadcom/bcm96855.dts +++ b/arch/arm/boot/dts/broadcom/bcm96855.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96878.dts b/arch/arm/boot/dts/broadcom/bcm96878.dts index b7af8ade7a9d..8d6eddd54c6e 100644 --- a/arch/arm/boot/dts/broadcom/bcm96878.dts +++ b/arch/arm/boot/dts/broadcom/bcm96878.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; From patchwork Sat Feb 3 00:28:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196121 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp778023dyc; Fri, 2 Feb 2024 16:35:35 -0800 (PST) X-Google-Smtp-Source: AGHT+IGhapPbW3oJSMZCavYRvf5LuPOh+DKWBjuuk5pjODczoy5Ujn1Xlj5Yz/QzbH9JuypBGGko X-Received: by 2002:a05:622a:13d3:b0:42a:2cbe:43fa with SMTP id p19-20020a05622a13d300b0042a2cbe43famr10431172qtk.50.1706920535168; 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Fri, 2 Feb 2024 16:29:26 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 981A2C0000E8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920166; bh=8VGrM99yM9EeYsSzd1lKRouGyu2IusmLymDzd5jAIOY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XjWooVKvUmZv/YVIzD4MtTq9R+4mHU0RsJnCD6wO6L4KRqQ11BUH9mg7XubuVFnjj 8vwYB0dWmoNJBmwNB/yh2bbdzv3VSLirYFgnhIr8vu6jhvrUPLkaAfYNVuLgICRLMW OdfjV2+JIMmYtxfAacNAVFdDXNhTzlWJpiI5UTC8= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id ECB9418041CAC4; Fri, 2 Feb 2024 16:29:24 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Conor Dooley , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v4 05/12] arm64: dts: broadcom: bcmbca: Add NAND controller node Date: Fri, 2 Feb 2024 16:28:26 -0800 Message-Id: <20240203002834.171462-6-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789835907339222965 X-GMAIL-MSGID: 1789835907339222965 Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts files. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: - Add nand controller node label for 4908 so it is consistent with other SoCs and can be referenced by board dts file arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 4 ++-- arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts | 10 ++++++++++ 14 files changed, 156 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi index 2f124b027bbf..336016e334d9 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -589,7 +589,7 @@ hsspi: spi@1000 { status = "disabled"; }; - nand-controller@1800 { + nand_controller: nand-controller@1800 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; @@ -597,7 +597,7 @@ nand-controller@1800 { reg-names = "nand", "nand-int-base"; interrupts = ; interrupt-names = "nand_ctlrdy"; - status = "okay"; + status = "disabled"; nandcs: nand@0 { compatible = "brcm,nandcs"; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi index d658c81f7285..14b2adfb817c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi index 4f474d47022e..589b8a1efc72 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi @@ -119,6 +119,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi index 909f254dc47d..48d618e75866 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi @@ -137,6 +137,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi index 685ae32951c9..1d1303cf90f3 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi index 820553ce541b..00c62c1e5df0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi index 0eb93c298297..caeaf428dc15 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi @@ -156,5 +156,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts index c4e6e71f6310..030ffa5364fb 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts index e69cd683211a..4b779e6c22e1 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts index db2c82d6dfd8..2851e8e41bf4 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts index 25c12bc63545..17dc594fe83f 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts index faba21f03120..34832a734734 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts index 9808331eede2..e1396b5544b7 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts index 1f561c8e13b0..30bbf6f2917e 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; 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Also remove the unnecessary brcm,nand-has-wp property from AC5300 board. This property is only needed for some old controller that this board does not apply. Signed-off-by: William Zhang --- Changes in v4: None Changes in v3: None Changes in v2: None .../boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 5 +++++ .../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 5 +++++ .../boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 6 +++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 78204d71ecd2..999d93730240 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -125,6 +125,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts index fcf092c81b59..19fc03ef47a0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts @@ -155,6 +155,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts index d94a53d68320..52f928dbfa3c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts @@ -166,11 +166,15 @@ led@19 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; nand-on-flash-bbt; - brcm,nand-has-wp; #address-cells = <1>; #size-cells = <0>; From patchwork Sat Feb 3 00:28:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196189 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp825198dyc; Fri, 2 Feb 2024 19:11:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IGezPnYa5g7MvIKTw5TTX9slDzq4oviM3y65XlheZ4etcnqWEWkIHDwvIWs2Bvz9exvokNE X-Received: by 2002:a05:6358:f1c3:b0:178:c57d:8f3 with SMTP id kr3-20020a056358f1c300b00178c57d08f3mr5640949rwb.1.1706929874370; Fri, 02 Feb 2024 19:11:14 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706929874; cv=pass; d=google.com; s=arc-20160816; b=lZwKrfxK770kiAOu6j9mA8evMFJQLtbzzelydPhMIQil518NMAhazsUemTpqymIRAN rVBuBnpGvevUEe/uhAdXynxy088rqtWcKR5zgs4cT5N7wy98kiGA/raN3SyB/jrSRW2F P4BBsa9HEQj45+Jtf7Yabfaj/xeWt2nHePmGDbv/ThPsfctDwm9xxFjdHd+ERxQ1X5VB YdqQRTebCv8tkmby6IczdbUdqnzwkkQbW6WnCVSFJM5sY1JZW1Qem3sM0j0lKo57muaO DJoujE2koVX7NJlYG6YlXjrHBHHDSSsuL5Kdx//30e87avATxW/aK2Jeu5VPChIH4tF4 p6Tw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=rFEq+oP+rNLqGw84UE8sE5Ir2jgQ9A8Wn/cHjNIrLz8=; fh=2o+sDzpuH7AVQJA2MRN0d89K2/ZxMPE1lrSTKJZgdUg=; b=fi+2Ufylp3tutf4ib7XLPs0H9iXHFmD1ZFXggwsRPI2+UzVc9XDCx1NmXMFG8EwYuA ts9yq2n/BHFgWZnaJC6eGrmIIZo0wgfveszrfXoj5vaCALQJ1560fuLTCZ79S44suNt/ jo0nTaBZ9+eNY1uJZnjdsEjJIqHUUqJsw3FuW1P0YsUZuN7QqdYdR2rj09n4I4Awdx5/ EgZEe3d50TkpMbZm3KKNYI9hruPR0pWyDKLZ9y2CQY8uf67/6LgeSQUSqDLwyuhLfuZe mvSWZDav6CZIq5B9AcS0Osb+u5kqfjXpZgYmIBc0PCMjmZc1jzDKsGMyK8oaa4OIjh65 JScw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b="tEE/h1kC"; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50781-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50781-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCXJuI3GqTnbiZMjsE5w23EHMlrWkuGzOofAk3TesTODBZve0ODRwl7oVfs6bbr9LEAVbR3I6vnONwM72Z4UIJhG0cfm4A== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: William Zhang Reviewed-by: David Regan Acked-by: Florian Fainelli --- Changes in v4: None Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/Makefile | 2 +- drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c | 99 ------------------- drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 99 +++++++++++++++++++ 3 files changed, 100 insertions(+), 100 deletions(-) delete mode 100644 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c create mode 100644 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 9907e3ec4bb2..0536568c6467 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,7 +2,7 @@ # link order matters; don't link the more generic brcmstb_nand.o before the # more specific iproc_nand.o, for instance obj-$(CONFIG_MTD_NAND_BRCMNAND_IPROC) += iproc_nand.o -obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcm63138_nand.o +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BCM63XX) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BRCMSTB) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c deleted file mode 100644 index 968c5b674b08..000000000000 --- a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright © 2015 Broadcom Corporation - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "brcmnand.h" - -struct bcm63138_nand_soc { - struct brcmnand_soc soc; - void __iomem *base; -}; - -#define BCM63138_NAND_INT_STATUS 0x00 -#define BCM63138_NAND_INT_EN 0x04 - -enum { - BCM63138_CTLRDY = BIT(4), -}; - -static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; - u32 val = brcmnand_readl(mmio); - - if (val & BCM63138_CTLRDY) { - brcmnand_writel(val & ~BCM63138_CTLRDY, mmio); - return true; - } - - return false; -} - -static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; - u32 val = brcmnand_readl(mmio); - - if (en) - val |= BCM63138_CTLRDY; - else - val &= ~BCM63138_CTLRDY; - - brcmnand_writel(val, mmio); -} - -static int bcm63138_nand_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct bcm63138_nand_soc *priv; - struct brcmnand_soc *soc; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - soc = &priv->soc; - - priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - soc->ctlrdy_ack = bcm63138_nand_intc_ack; - soc->ctlrdy_set_enabled = bcm63138_nand_intc_set; - - return brcmnand_probe(pdev, soc); -} - -static const struct of_device_id bcm63138_nand_of_match[] = { - { .compatible = "brcm,nand-bcm63138" }, - {}, -}; -MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match); - -static struct platform_driver bcm63138_nand_driver = { - .probe = bcm63138_nand_probe, - .remove_new = brcmnand_remove, - .driver = { - .name = "bcm63138_nand", - .pm = &brcmnand_pm_ops, - .of_match_table = bcm63138_nand_of_match, - } -}; -module_platform_driver(bcm63138_nand_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Brian Norris"); -MODULE_DESCRIPTION("NAND driver for BCM63138"); diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 000000000000..3e2f3b79788d --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT_STATUS 0x00 +#define BCMBCA_NAND_INT_EN 0x04 + +enum { + BCMBCA_CTLRDY = BIT(4), +}; + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_STATUS; + u32 val = brcmnand_readl(mmio); + + if (val & BCMBCA_CTLRDY) { + brcmnand_writel(val & ~BCMBCA_CTLRDY, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= BCMBCA_CTLRDY; + else + val &= ~BCMBCA_CTLRDY; + + brcmnand_writel(val, mmio); +} + +static int bcmbca_nand_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct bcmbca_nand_soc *priv; + struct brcmnand_soc *soc; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + soc = &priv->soc; + + priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + + return brcmnand_probe(pdev, soc); +} + +static const struct of_device_id bcmbca_nand_of_match[] = { + { .compatible = "brcm,nand-bcm63138" }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcmbca_nand_of_match); + +static struct platform_driver bcmbca_nand_driver = { + .probe = bcmbca_nand_probe, + .remove_new = brcmnand_remove, + .driver = { + .name = "bcmbca_nand", + .pm = &brcmnand_pm_ops, + .of_match_table = bcmbca_nand_of_match, + } +}; +module_platform_driver(bcmbca_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Brian Norris"); +MODULE_DESCRIPTION("NAND driver for BCMBCA"); From patchwork Sat Feb 3 00:28:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196124 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp797836dyc; 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Fri, 2 Feb 2024 16:29:36 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 1AA05C0019BC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920176; bh=rHgDo1RKEQeKn1A0o+gadEkZReIynFyOZSruP7Uclbw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YMSOX+OLBaxYUxdfEaqMtA8//BYlesGFGKHuZaVAu6lq/yoBtpOle7Pa/zSuDiYB/ iQGae9yacVQymVany2+tpQhE7Ug1VPTaxDnnyFnM9zNw6R5rscEdgrqJtqgz88UR9M L6eWU40IDbTJqfGzGI7t/O1+sHpK6VdRRbdI1mZw= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id A855718041CAC4; Fri, 2 Feb 2024 16:29:34 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v4 08/12] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface Date: Fri, 2 Feb 2024 16:28:29 -0800 Message-Id: <20240203002834.171462-9-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789839538724644278 X-GMAIL-MSGID: 1789839538724644278 The BCMBCA broadband SoC integrates the NAND controller differently than STB, iProc and other SoCs. It has different endianness for NAND cache data. Add a SoC read data bus shim for BCMBCA to meet the specific SoC need and performance improvement using the optimized memcpy function on NAND cache memory. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v4: None Changes in v3: - Updated bcmbca_read_data_bus comment Changes in v2: - Drop the is_param argument to the read data bus function now that we have the exec_op API to read the parameter page and ONFI data - Remove be32_to_cpu from brcmnand_read_data_bus drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 27 +++++++++++++++++++++ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 ++++++++++++--- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 2 ++ 3 files changed, 46 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c index 3e2f3b79788d..7ad3e7a98f97 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -26,6 +26,18 @@ enum { BCMBCA_CTLRDY = BIT(4), }; +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) { struct bcmbca_nand_soc *priv = @@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) brcmnand_writel(val, mmio); } +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer)) + memcpy((void *)buffer, (void *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + static int bcmbca_nand_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -73,6 +99,7 @@ static int bcmbca_nand_probe(struct platform_device *pdev) soc->ctlrdy_ack = bcmbca_nand_intc_ack; soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; return brcmnand_probe(pdev, soc); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8faca43ae1ff..73fdf7ce21aa 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -851,6 +851,20 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl, return brcmnand_readl(ctrl->edu_base + offs); } +static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + struct brcmnand_soc *soc = ctrl->soc; + int i; + + if (soc->read_data_bus) { + soc->read_data_bus(soc, flash_cache, buffer, fc_words); + } else { + for (i = 0; i < fc_words; i++) + buffer[i] = brcmnand_read_fc(ctrl, i); + } +} + static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) { @@ -1975,7 +1989,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, { struct brcmnand_host *host = nand_get_controller_data(chip); struct brcmnand_controller *ctrl = host->ctrl; - int i, j, ret = 0; + int i, ret = 0; brcmnand_clear_ecc_addr(ctrl); @@ -1988,8 +2002,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, if (likely(buf)) { brcmnand_soc_data_bus_prepare(ctrl->soc, false); - for (j = 0; j < FC_WORDS; j++, buf++) - *buf = brcmnand_read_fc(ctrl, j); + brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf, FC_WORDS); + buf += FC_WORDS; brcmnand_soc_data_bus_unprepare(ctrl->soc, false); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index 928114c0be5e..7261a69989fe 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -24,6 +24,8 @@ struct brcmnand_soc { void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); 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Fri, 2 Feb 2024 16:29:37 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com A277BC00329C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920177; bh=s/ChhgfzXW1d5Br4dKiO6tP7LbtmJXzGgiphezRGZXI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fuc3uRjmNby/3g0/5tQhOOe6cRZ7YokmGYLsDNUdPH80/MjQsljPtBH4nNiMRi3n+ qeijZ9E9ExRwWV/alTJQjDfevJkCj6oJhG97SNj2a3k7OKvWXcdnMfQFfiUHTrBW1B 6ZGuCzhjNNqCepATMQlHk4Hc0bgh93xhgwkNIvMc= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 3139018041CAC4; Fri, 2 Feb 2024 16:29:36 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v4 09/12] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap Date: Fri, 2 Feb 2024 16:28:30 -0800 Message-Id: <20240203002834.171462-10-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789845006409285313 X-GMAIL-MSGID: 1789845006409285313 BCMBCA broadband SoC based board design does not specify ecc setting in dts but rather use the SoC NAND strap info to obtain the ecc strength and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for this purpose and update driver to support this option. The generic nand ecc settings still take precedence over this flag. For example, if nand-ecc-strength is set in the dts, the driver ignores the strap setting and falls back to original behavior. This makes sure that the existing BCMBCA board dts still works the old way even the strap flag is set in the BCMBCA chip dtsi. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v4: - Update the comments for ecc setting selection Changes in v3: None Changes in v2: - Minor cosmetic fixes drivers/mtd/nand/raw/brcmnand/brcmnand.c | 83 ++++++++++++++++++++++-- 1 file changed, 76 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 73fdf7ce21aa..efeee9e80213 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1038,6 +1038,19 @@ static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl) return -1; } +static int brcmnand_get_sector_size_1k(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + int shift = brcmnand_sector_1k_shift(ctrl); + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + + if (shift < 0) + return 0; + + return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1; +} + static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) { struct brcmnand_controller *ctrl = host->ctrl; @@ -1055,6 +1068,38 @@ static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) nand_writereg(ctrl, acc_control_offs, tmp); } +static int brcmnand_get_spare_size(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + u32 acc = nand_readreg(ctrl, acc_control_offs); + + return (acc & brcmnand_spare_area_mask(ctrl)); +} + +static int brcmnand_get_ecc_strength(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + int sector_size_1k = brcmnand_get_sector_size_1k(host); + int spare_area_size, ecc_level, ecc_strength; + u32 acc; + + spare_area_size = brcmnand_get_spare_size(host); + acc = nand_readreg(ctrl, acc_control_offs); + ecc_level = (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_shift; + if (sector_size_1k) + ecc_strength = ecc_level * 2; + else if (spare_area_size == 16 && ecc_level == 15) + ecc_strength = 1; /* hamming */ + else + ecc_strength = ecc_level; + + return ecc_strength; +} + /*********************************************************************** * CS_NAND_SELECT ***********************************************************************/ @@ -2622,19 +2667,43 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) nanddev_get_memorg(&chip->base); struct brcmnand_controller *ctrl = host->ctrl; struct brcmnand_cfg *cfg = &host->hwcfg; - char msg[128]; + struct device_node *np = nand_get_flash_node(chip); u32 offs, tmp, oob_sector; - int ret; + int ret, sector_size_1k = 0; + bool use_strap = false; + char msg[128]; memset(cfg, 0, sizeof(*cfg)); + use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap"); - ret = of_property_read_u32(nand_get_flash_node(chip), - "brcm,nand-oob-sector-size", + /* + * Set ECC size and strength based on hw configuration from strap + * if brcm,nand-ecc-use-strap is set. However if nand-ecc-strength + * is set, its value will be used and ignore the strap setting. + */ + if (chip->ecc.strength) + use_strap = 0; + + if (use_strap) { + chip->ecc.strength = brcmnand_get_ecc_strength(host); + sector_size_1k = brcmnand_get_sector_size_1k(host); + if (chip->ecc.size == 0) { + if (sector_size_1k < 0) + chip->ecc.size = 512; + else + chip->ecc.size = 512 << sector_size_1k; + } + } + + ret = of_property_read_u32(np, "brcm,nand-oob-sector-size", &oob_sector); if (ret) { - /* Use detected size */ - cfg->spare_area_size = mtd->oobsize / - (mtd->writesize >> FC_SHIFT); + if (use_strap) + cfg->spare_area_size = brcmnand_get_spare_size(host); + else + /* Use detected size */ + cfg->spare_area_size = mtd->oobsize / + (mtd->writesize >> FC_SHIFT); } else { cfg->spare_area_size = oob_sector; } From patchwork Sat Feb 3 00:28:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196129 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp802761dyc; Fri, 2 Feb 2024 17:50:11 -0800 (PST) X-Google-Smtp-Source: AGHT+IFCiTAxluFqVUJnHmZc/92kpISUu2P9gbo1LiOlJMfBNfr64tzRA0zdjUK+Ancqp06tXFh2 X-Received: by 2002:a05:6808:23ca:b0:3bf:bf81:c700 with SMTP id bq10-20020a05680823ca00b003bfbf81c700mr3967528oib.16.1706925010892; Fri, 02 Feb 2024 17:50:10 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706925010; cv=pass; d=google.com; s=arc-20160816; b=AN+CqOD3R2WoQOXQPlt+GDVmoO0AvyhxzUZ6SgLH2hwRGxwt3BrtWH/4RhCmK3Dl3W fL0aSbS9lJC4+Ay6TZTELfu0ZUB7L9VOtlo9Hx4xrkafiLnQ3zcVmb3Y+ux+wyXB9JKz M84WTEal/b/A9yU2YZS/J4Ag5M9uAm0DwaGeKvgTlLcKEM3ypzeLlr30bD/kZJz9EmOS Th0R6fgqzjHv1U8VTEBDLi5NI5SySTRynxhXKA5vkqGJspuykI8ncZdk4qKt1xVjLQd5 EM41fXo9IKPja0nkSkz1qIU00Ec+WWeRrrYs0fwg/M0v1JRmXaMArRcjdAdj1bu91Q9+ Z5NQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=JbJskgU16IKX1o+zwN+em6SbRZySqO1hl82127p0go8=; fh=nWCXKtwYKp0J41m+3C2RO6XWKb+rEGGhA40ds+ImUnQ=; b=s54IKLkcwTW+dajcTOy9ap7YBRhu1O8uR3T7/Ay8gqHdl8HutE1UZpRJ0dS2U6/Gj8 8MYa8D06SfZC/Hb6OY21uAq5IRC9daFN1f/VEdto/nzFLzUfDy19SiP6Ia5iLGRTdIeu wnEj6SijEr2Ox3qBwTEd7F7N6hAUmeQ9okclDqqeGenoaoOv7wB9qjFIcRtgoC7PkQj9 X4Mg35drl+9kUcWcdSVPfKSS6DmACVEr7udqdM3by7F3N5MdDIgTJOasYdT6q7+o4+GW LX3YrYzYZYxh3CRdStYKUgDXvMwOtaZPW5D8sILpnWgMP4HpoTuIYttx2zmuXy2CtP2S c+Rg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=AlOW1xN+; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50784-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50784-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCVCQoPEojv6p7qwvJM1jmq2EqxHDatDzb19On3wDzIbNHlFLQQ2cYqnlJrvzSnHuvIFJZL/1n+DrJ6dwSEo4HRB7XLVVw== Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Fri, 2 Feb 2024 16:29:41 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 63CA3C0000EC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920181; bh=UPiy9NotMMhw6RetrVpXpgqiL4XDR2ya1PJkJ281Hf8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AlOW1xN+lDL5uGwFqHKc4uMARbK5v94zuXoKF0hP1LhOT+WAHAL7MkoSU+zbEHFxx VtPNJTcVDwzuxLCnN0z/yyw6F1YD8Ewj79abbz4NboHDpX5i6UaYD4IblJ7qnGCTXA COFjVniYLx4GhQvguR6/bT08YNL4ksYPLVdDrm/k= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id BE1E518041CAC4; Fri, 2 Feb 2024 16:29:39 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , Florian Fainelli , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v4 10/12] mtd: rawnand: brcmnand: Support write protection setting from dts Date: Fri, 2 Feb 2024 16:28:31 -0800 Message-Id: <20240203002834.171462-11-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789840599145211996 X-GMAIL-MSGID: 1789840599145211996 The write protection feature is controlled by the module parameter wp_on with default set to enabled. But not all the board use this feature especially in BCMBCA broadband board. And module parameter is not sufficient as different board can have different option. Add a device tree property and allow this feature to be configured through the board dts on per board basis. Signed-off-by: William Zhang Reviewed-by: Florian Fainelli Reviewed-by: Kamal Dasu Reviewed-by: David Regan --- Changes in v4: - Use the new brcm,wp-not-connected property based on the dts binding change Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index efeee9e80213..8c1489ff7bd6 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -3218,6 +3218,10 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* Disable XOR addressing */ brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0); + /* Check if the board connects the WP pin */ + if (of_property_read_bool(dn, "brcm,wp-not-connected")) + wp_on = 0; + if (ctrl->features & BRCMNAND_HAS_WP) { /* Permanently disable write protection */ if (wp_on == 2) From patchwork Sat Feb 3 00:28:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 196123 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp785525dyc; Fri, 2 Feb 2024 17:00:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IHCDFGBK0/r/QGr9yZa/8dJ5t8rVBJEtjTEfU9olgt/N5HVNONwCCMZvQjsgyyHU8Ihe1cr X-Received: by 2002:a05:6358:7f1b:b0:176:a512:e63e with SMTP id p27-20020a0563587f1b00b00176a512e63emr4070268rwn.29.1706922017938; Fri, 02 Feb 2024 17:00:17 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706922017; cv=pass; d=google.com; s=arc-20160816; b=zjOqLlUGN6IpmjcsznR+Q565iXy4EmtEuxw6JOob81TnrQot2l7X7HKnoTSs2UpOcX odElBjIfg6VvyH5UJbz06fdE7qhJNSHKQWriiktHEfg36Q2M14gKztMPPDIJzqk42CAd DRoaucnZS7l72xpi6hk3tvDQIDWfsLkHVd6RkuW7DWWPPwKhYFCVrSfF8LdGGdNoCRcw 4mNl0AQUN3Axr7p+4fU8x+vUvYweB8wmtEP8guulh7oqP5wlJsSz4nThQuDGQYxaEWbz S9Iki/EkMSppfdqmhkyyd4JU0hk9V4kt3iQz6Ofl17G6Aa2urfTsEsyQ5r79pEJ7UuQL DfKw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature:dkim-filter; bh=aVTx8NmI279qyMHsiYWgjkWJltxhcWDLITolixCPC/s=; fh=QaecXUB5q8ICS5yd6eMETZO5NwZnqu99nhGDno3O9zo=; b=nZe4nMBRRaKKom+FJRZYpi9pcwQkABw1B8fsLrrKUOGVmU5R7lNNnV7/wCUXgdZzpa Kznph231M/p5CJhrPtQLz3IBu7JvS0/g3njSo80xwnAxLluCSPo4RtmZHsh+NBlprCly 32o1/LphZDj3/AS1+9r9aOBWJQZPQQ602Zy52G3jkBT2qruRVcpS9qD7fut0dDZpR3BQ gPnnHFc6pfE8w6AnOCyZaimzfS+NnhHsBuVGuGQsDAvksFMFe+HTznns89U7USGtjW+h 0ZLI82MdoMDk8lKjeN2m9e2lNO+UADWFpNPREzPh4737hdChxxtqnH5y8wDoauK9gDic Ygbg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@broadcom.com header.s=dkimrelay header.b=HbftFuFp; arc=pass (i=1 dkim=pass dkdomain=broadcom.com dmarc=pass fromdomain=broadcom.com); spf=pass (google.com: domain of linux-kernel+bounces-50786-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-50786-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com X-Forwarded-Encrypted: i=1; AJvYcCWcGj3+V/l4WodKQqOUu1L3UgBnrbB2DHK5QHNBKhlFsTSMzfDb6YBLsLRrDoVtrRLe4NTakPrQyQ7NBeqKVCrppjy51Q== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Fri, 2 Feb 2024 16:29:44 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 43320C001C89 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1706920184; bh=oYWu5Fo1F0+7WCqhPKRqpGmYX5+YscXs0w2BLbY2DiQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HbftFuFpjR7830bsBF/2j9Qdq7mRKEkN9FA1o1PTlAT6Ls2omsvXj9V71I+nLbXmK oPgWUth5QCxpRyG8ZE4lNLwGKgLAkQ0W3W3bbASQZxAmZVqLfRo+4/slP5RQS/EKO4 00n+k/iE5SCbt0di86f5a4vuy3c/gnasIbnS40VQ= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id D179218041CAC4; Fri, 2 Feb 2024 16:29:42 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, David Regan , Dan Carpenter , William Zhang , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v4 11/12] mtd: rawnand: brcmnand: exec_op helper functions return type fixes Date: Fri, 2 Feb 2024 16:28:32 -0800 Message-Id: <20240203002834.171462-12-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240203002834.171462-1-william.zhang@broadcom.com> References: <20240203002834.171462-1-william.zhang@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789837460655406321 X-GMAIL-MSGID: 1789837460655406321 From: David Regan fix return type for exec_op reset and status detect helper functions Reported-by: Dan Carpenter Closes: http://lists.infradead.org/pipermail/linux-mtd/2023-December/102423.html Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation") Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v4: - Fix the commit id in the fixes tag Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8c1489ff7bd6..7ce2b267676f 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -625,7 +625,7 @@ enum { /* Only for v7.2 */ #define ACC_CONTROL_ECC_EXT_SHIFT 13 -static u8 brcmnand_status(struct brcmnand_host *host); +static int brcmnand_status(struct brcmnand_host *host); static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl) { @@ -1749,7 +1749,7 @@ static int brcmnand_waitfunc(struct nand_chip *chip) INTFC_FLASH_STATUS; } -static u8 brcmnand_status(struct brcmnand_host *host) +static int brcmnand_status(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; struct mtd_info *mtd = nand_to_mtd(chip); @@ -1760,7 +1760,7 @@ static u8 brcmnand_status(struct brcmnand_host *host) return brcmnand_waitfunc(chip); } -static u8 brcmnand_reset(struct brcmnand_host *host) +static int brcmnand_reset(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; @@ -2492,11 +2492,14 @@ static int brcmnand_exec_op(struct nand_chip *chip, if (brcmnand_op_is_status(op)) { status = op->instrs[1].ctx.data.buf.in; - *status = brcmnand_status(host); + ret = brcmnand_status(host); + if (ret < 0) + return ret; + + *status = ret & 0xFF; return 0; - } - else if (brcmnand_op_is_reset(op)) { + } else if (brcmnand_op_is_reset(op)) { ret = brcmnand_reset(host); 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Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v4: - Revert the log level change for correctable ecc error Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 7ce2b267676f..e50582b45182 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1143,7 +1143,7 @@ static int bcmnand_ctrl_poll_status(struct brcmnand_host *host, if ((val & mask) == expected_val) return 0; - dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n", + dev_err(ctrl->dev, "timeout on status poll (expected %x got %x)\n", expected_val, val & mask); return -ETIMEDOUT; @@ -2196,7 +2196,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, return err; } - dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n", + dev_err(ctrl->dev, "uncorrectable error at 0x%llx\n", (unsigned long long)err_addr); mtd->ecc_stats.failed++; /* NAND layer expects zero on ECC errors */