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In addition to the text description reference generic interrupts properties and add an example. Signed-off-by: Josua Mayer --- .../devicetree/bindings/rtc/abracon,abx80x.txt | 31 ---------- .../devicetree/bindings/rtc/abracon,abx80x.yaml | 72 ++++++++++++++++++++++ 2 files changed, 72 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt b/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt deleted file mode 100644 index 2405e35a1bc0..000000000000 --- a/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt +++ /dev/null @@ -1,31 +0,0 @@ -Abracon ABX80X I2C ultra low power RTC/Alarm chip - -The Abracon ABX80X family consist of the ab0801, ab0803, ab0804, ab0805, ab1801, -ab1803, ab1804 and ab1805. The ab0805 is the superset of ab080x and the ab1805 -is the superset of ab180x. - -Required properties: - - - "compatible": should one of: - "abracon,abx80x" - "abracon,ab0801" - "abracon,ab0803" - "abracon,ab0804" - "abracon,ab0805" - "abracon,ab1801" - "abracon,ab1803" - "abracon,ab1804" - "abracon,ab1805" - "microcrystal,rv1805" - Using "abracon,abx80x" will enable chip autodetection. - - "reg": I2C bus address of the device - -Optional properties: - -The abx804 and abx805 have a trickle charger that is able to charge the -connected battery or supercap. Both the following properties have to be defined -and valid to enable charging: - - - "abracon,tc-diode": should be "standard" (0.6V) or "schottky" (0.3V) - - "abracon,tc-resistor": should be <0>, <3>, <6> or <11>. 0 disables the output - resistor, the other values are in kOhm. diff --git a/Documentation/devicetree/bindings/rtc/abracon,abx80x.yaml b/Documentation/devicetree/bindings/rtc/abracon,abx80x.yaml new file mode 100644 index 000000000000..0c2cf6410604 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/abracon,abx80x.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/abracon,abx80x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Abracon ABX80X I2C ultra low power RTC/Alarm chip + +maintainers: + - devicetree@vger.kernel.org + +allOf: + - $ref: rtc.yaml# + - $ref: /schemas/interrupts.yaml# + +properties: + compatible: + description: + Select a specific compatible chip. + + 'abracon,abx80x' has special meaning, + it provides auto-dection based on ID register. + enum: + - abracon,abx80x + - abracon,ab0801 + - abracon,ab0803 + - abracon,ab0804 + - abracon,ab0805 + - abracon,ab1801 + - abracon,ab1803 + - abracon,ab1804 + - abracon,ab1805 + - microcrystal,rv1805 + + reg: + maxItems: 1 + + abracon,tc-diode: + description: + Trickle-charge diode type. + Required to enable charging backup battery. + + Supported are 'standard' diodes with a 0.6V drop + and 'schottky' diodes with a 0.3V drop. + $ref: /schemas/types.yaml#/definitions/string + enum: + - standard + - schottky + + abracon,tc-resistor: + description: + Trickle-charge resistor value in kOhm. + Required to enable charging backup battery. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 3, 6, 11] + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + rtc: rtc@69 { + compatible = "abracon,abx80x"; + reg = <0x69>; + abracon,tc-diode = "schottky"; + abracon,tc-resistor = <3>; + interrupt-parent = <&gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; From patchwork Fri Feb 2 14:22:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 195874 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp461301dyc; Fri, 2 Feb 2024 06:24:01 -0800 (PST) X-Google-Smtp-Source: AGHT+IGbY/fdDwuoMcNzhAnA1+18KWkAAOu49tTcH71qjhHZ9g/gmhD+H6CsisGz4KGD6X5pe6JO X-Received: by 2002:aa7:d493:0:b0:560:58f:7148 with SMTP id b19-20020aa7d493000000b00560058f7148mr608594edr.34.1706883841640; Fri, 02 Feb 2024 06:24:01 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWzqL8vndJ4RqyqluvN6K8qY+0gKYnYppyMG7ot+W3Pb5T6pHWt8mf3snvUupQJMndHFJnHI5DVYvMIL51OxPLmOoD0Aw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?SKuxUTsLi21uz9twjQaz9Jj1vcoa?= =?utf-8?q?9nK/v/TD8xnGzTjL9nQ9NNi6jE1epsKmts/r6oIEt5X0AP5clf7H+C/UmTtSEYO//?= =?utf-8?q?p7PWoC1r7/j3JpFi29Y4kYsKBTL/ak05qUeaLZA3EjAbNmvQEAOSGtDx0XKDwKu5J?= =?utf-8?q?RNoElJFR81j25zyCDAdnFHV7Q5RwJSRbK3CoVVfs/lRW2EDH3eBqPMLpT0fJ/qpg6?= =?utf-8?q?fMuUUmACC/9kCy+LAyPI0XIG69m2Ns+iEQe9z4YCjbcCw6wFSRpRAnOhbGaBQUEEK?= =?utf-8?q?TYJYQX2mSPNy0rdcN3Vi8aq+SD/Vx5CYbcfvJhpIrNiUwNepUxY/oRrZYHsK3BpP0?= =?utf-8?q?HIgUGhHsyuHrOa1Z5kjFsF105aeNX8xxuKTr0bqDbqi6n+84EYd0hjaSKxE09UsCZ?= =?utf-8?q?4Daw5DyQcDkuNI3vhBkbStvJYphvdObgqzx3+FJ9W2Ix4A1lmkPVrcvUQ1nEm0H66?= =?utf-8?q?I33qavaTC2SPbBShxkdxHnAnUBe++lLICMEKjKwOFDFIwDczS9ED+ZZfsCK/lx1Zn?= =?utf-8?q?QfflxnCGuTojq6wCyrn4EXFXWPOfrArtPLz6AeY+pDrpiiYiQ86eePi4oP4wTxrK/?= =?utf-8?q?5UGz2QrRS/lHbCqn0IgYve4pSpfbrmPAFH/SaVWrcVEU9ecgnlQ9AqRISceHynbat?= =?utf-8?q?nRwJ3mKJVquQlVnAEZL4k2hyU8nLdebE96UESfrtNXbsfNKh1XlPUt7aRyQOWUeNq?= =?utf-8?q?0/aqFxfRs44hwXGpH5YW82GaE6k4nHsvQRuvGkPTyC8dS2b6a6pu8hI9lgY8NyXFW?= =?utf-8?q?pzGBNbtmIWd/ttiXe3k4s7EwLfN3cw+v2IkC+oZP7n3olZ00kBBi2FGem2UA5D9kE?= =?utf-8?q?7DIrvza0RfDtc9ZwKGRkPE9b78FZ+gE6kwQCnodUwAbgBTeymK/HIpGYEm1RUjgB0?= =?utf-8?q?qWZNS+nfpP9ILBOgVm0wv/qZPUdDeugqQTjVRZTHvwtszOW+xvu52ScRrBcmbcgLc?= =?utf-8?q?prh8tdDP7kpVj7S0PYuomPlYAXFGRPKOosGa4wBhyFXGhuwibKyXjvkGde6aIe3zM?= =?utf-8?q?6IURjiSV83qUAKZiGHW/k91mrBeN187/TdZURdIfHr2DamnlgGy28LD2aZSRZRUuU?= =?utf-8?q?2EbuVhD9eCIfec3Q+cmUQW+61AYy616QUhEqGzaYMp0mCE9dOTRDRB2y1gVztFaVx?= =?utf-8?q?UYJYfDv7X4n5QwNVadxDcZXo573lNDAn2clZp2zCKNF+xUEGVoLxj7M0wpyW7V6JU?= =?utf-8?q?BbTsartapoMbNVSvAh0m4bGjlBiM/Zcq6LSSwcgcYB21QTyjyVcBeZRLRi6HyGJkw?= =?utf-8?q?lf89gn+GrTDvnskGlsllCUwigr4m6RP+ASacf79sE1BG9vdGcOnxsOnRn9abW/T4x?= =?utf-8?q?TrX5t4SPLCg+tXCLNNufDuGR5spKm543QSZklrqf8SKYbOo+Wxk2gZYciVj9H+guP?= =?utf-8?q?UDhRXu6lWerY5YOCQWO7kPycZRLJLij0YycZmc9/rWuFLeM8Hh9bQMvA1IAHaDn6H?= =?utf-8?q?xQD1bxMBLo1NnhUp9HjjJfZNpar09pS38RNwEKbaK/80cAaRZHVZ6tH6kt9S4cXbQ?= =?utf-8?q?1dRwcYmkHKQb?= X-OriginatorOrg: solid-run.com X-MS-Exchange-CrossTenant-Network-Message-Id: d3a9f311-adfa-47e8-c555-08dc23fa5ff3 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB7586.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2024 14:22:23.9454 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a4a8aaf3-fd27-4e27-add2-604707ce5b82 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cM17LH4IFrBBa+SrEKBq7kUlvNJntwFukBtMZzkQmXEOEuftOrpWYqFFS9aKT3JCE1vmRVntewd0KxEqpn3zwg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB9093 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789797431305205278 X-GMAIL-MSGID: 1789797431305205278 From: Suman Anna The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Vignesh Raghavendra Signed-off-by: Grygorii Strashko Signed-off-by: Suman Anna Signed-off-by: MD Danish Anwar Signed-off-by: Josua Mayer --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 0be642bc1b86..8130ee02a3d9 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1232,6 +1232,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { }; }; + icssg0_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + + icssg0_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + icssg0_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1373,6 +1385,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { }; }; + icssg1_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + + icssg1_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + icssg1_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>;