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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id z1-20020aa7d401000000b0055fd61c9be9si655859edq.438.2024.02.02.01.21.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Feb 2024 01:21:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-49546-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=jedQRPVG; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-49546-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-49546-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id C17471F2572F for ; Fri, 2 Feb 2024 09:21:11 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1E57C7C09E; Fri, 2 Feb 2024 09:19:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jedQRPVG" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22B4A63119; Fri, 2 Feb 2024 09:19:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706865573; cv=none; b=Vvd0rZWFS9cAV4BbRCIS9FNawUioRDdRIl10UI3bjQUIBXLIgldPMOR5TYCEPZnr4Kg4dhpK/vKefxD2Dj3K5sXFMY/SRXz98+6y+1ibfRO8xCMoPTeRINMPoD79nNn4Zl3o5MdFEG4epzrJj2dEQbntGUtm9sAVv8hhnpJnfz4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706865573; c=relaxed/simple; bh=rCvaDAdvVEPkc/5uSMACu9gWCQ1/fxBqVhcE39XQOQs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=e4O7dYpGRh4FojwxTeHznpFnFz/VKRn7wFmL23Fv4hbGK7wQOz42vR9MNxjRprEaA80B7Z/lgN192uNLTSBRiIcMYCdwY3mv2vZsVXa9488N3+xW37mH1t4sp81JZbr+lbsbQbyuwQ9adiL6RCkjEu1DMKxG4HSc5M414xduong= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jedQRPVG; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPS id B11D4C433C7; Fri, 2 Feb 2024 09:19:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706865572; bh=rCvaDAdvVEPkc/5uSMACu9gWCQ1/fxBqVhcE39XQOQs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jedQRPVGaqsVoflMFNGtVWJlXpfMwFOMXBbGSAXWJXebPXa0Rl8xvaFZZB7l5yL5P spg70w7n5wcikpt0DRk+fAlAAJCmSs1CLNvxtMgJZ3S33dY1UqwkPuiMb6gdayVbVl yYqYnTAFUB+Hc5my9apQcy/6LB2QuQ72U173iPglKqBFbq4YL3Wb1dGpnlm991878Z mZZDfDeREsDJbwIeDMvJkV2qaYBgOM9sQJh46CwEBky5NgW3Bb4ePQ3B8e8CDT88nN vIcvsTltXzPRsGVrzJzp8CgX+JAkxx2RxOkRDw45ZnqEMUPWH03Kv7Lr7zJ9HJGIDd pFbv/yJw6MuKA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90493C48291; Fri, 2 Feb 2024 09:19:32 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Fri, 02 Feb 2024 12:19:07 +0300 Subject: [PATCH net-next v3 1/7] net: dsa: mt7530: empty default case on mt7530_setup_port5() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240202-for-netnext-mt7530-improvements-2-v3-1-63d5adae99ca@arinc9.com> References: <20240202-for-netnext-mt7530-improvements-2-v3-0-63d5adae99ca@arinc9.com> In-Reply-To: <20240202-for-netnext-mt7530-improvements-2-v3-0-63d5adae99ca@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=1561; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=4iqmJSREOOSr69rzXZ9fMqbTsIjeBdURHVNrmhTA6EI=; b=TeFqFshuDfZ5ZtHlV2wYOCIagEY8/cQ/3dz9qwLIC/uvZRz991/HxiXn7Sc7VwzOs3fXymSgc 2QG09ps/xpsCkrJzsYBYius5Nc8Wj7wCPq+UiEBslQK8hZxHpMleGK9 X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778378770216823 X-GMAIL-MSGID: 1789778378770216823 From: Arınç ÜNAL There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() On the first code path, priv->p5_intf_sel is either set to P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run. On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when mt7530_setup_port5() is run. Empty the default case which will never run but is needed nonetheless to handle all the remaining enumeration values. Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 68be38ae66e0..330e22abc076 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -943,9 +943,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) val &= ~MHWTRAP_P5_DIS; break; default: - dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", - priv->p5_intf_sel); - goto unlock_exit; + break; } /* Setup RGMII settings */ @@ -975,7 +973,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); -unlock_exit: mutex_unlock(&priv->reg_mutex); } From patchwork Fri Feb 2 09:19:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 195726 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp305933dyc; Fri, 2 Feb 2024 01:21:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IFITVsLi6qpV7toRXZonf/pmQoe5v1O1NTm4LslQJ3CambL3HfIppeMHKoB137aSLOYVimL X-Received: by 2002:aa7:d290:0:b0:55f:f124:521c with SMTP id w16-20020aa7d290000000b0055ff124521cmr719474edq.4.1706865697668; Fri, 02 Feb 2024 01:21:37 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706865697; cv=pass; d=google.com; s=arc-20160816; b=Mv6Tst8waAW/b3LsimrkHGx+SHYuBiIL42lAXkRUN2RLiz6ApeTGI4nDT2BWV5wZvR OI1G6bJttplwt4jM6zgxrrpyWtdYPvgE2jRiVbnl0W+axQmkGAYf388xut5OMkiX7aEs fKV0BDInCSa2hMHvno7TVIpAETnUUy+e6CU0J0SwfOuJkZg9EYXDawdeY8cI/2wdLdAb 3rXAwq5X0vXV1G7MTfn6gIjnAEgDh6czdDHZ46XwgxxA7ppCp+ToKvzwygBO6AiQIhJd ud0ZTnclgOXEtISdiKquXQWEQeNJnSZdovhndr8Xt+ZzwWdRne5+YExNEL0toPazI4ks jUPg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=N9wyiNwWfFjOffwnEaBPMBQdrIFm56ebopuAE0kIvag=; fh=sAMfx7G1OdrntY038vfH0NMvRgKx3egXX3sni/s3pXI=; b=ZPX7vN++36s2Wbth1c4lVT290oL7Sm2tWCjZYSiP227h3eBYdnz8vWUIkZf3DR3cM5 qhjnyiFDDUBeKIoeEERKQ40U9gxqCLqpEepZLm6ekx6rxllN4KCcaRs0HXW5poD6AbC/ VYuucKkLP+BDRLQNNKP+v9ydr4uTxsd3jzfT2ax3xVUq8+GMMUPRRr/IjYCmPkZ6Ym12 dy/tSI2jxtsyKI91NYyFBsWFFiwRuKTu6XxCetaif3aW2pthnCpperO/q0gp6QiJmb9Q C+tdURnUgsO8/AVCA1LpADIK8LLnnKSoOtdjHDvBytoN8vVnqj/8PoAznofYeNaAFAC4 BWZw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PujNNZov; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-49545-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-49545-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=1; AJvYcCVEYaRhYPRVb3GiQlWdaNhpzQmVKJA6+917vWmt3pCRXNiRRKxFJoiW9kZlx9gBQvsDXXDRtGTeQe5hB2t6HaulGzWATg== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=2415; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=B4ubcnj0kkoG/x10O/6vsrHgrghUPFvE8EQyfqv241o=; b=3S1dUOXUt3XkWFYjkGi5E5aLXTgWmOauxCmS+JNwup4u8gHV95Ic0EIcSiuILU+dmpv06jo/I E6WP/g3PbsZAlC92rWs/2qG4cixotc26yIkGHOOyDwrKwkNIE/P//P2 X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778405400326015 X-GMAIL-MSGID: 1789778405400326015 From: Arınç ÜNAL mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more things than setting up port 6. That part was moved to more appropriate locations, mt7530_setup() and mt7530_pll_setup(). Now that all it does is set up port 6, rename it to mt7530_setup_port6(), and move it to a more appropriate location, under mt7530_mac_config(). Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function pointer. This is the code path for setting up the ports before: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt753x_pad_setup() -> mt7530_pad_clk_setup() This is after: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt7530_setup_port6() Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 330e22abc076..2d468a5f2e70 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -415,7 +415,7 @@ mt753x_preferred_default_local_cpu_port(struct dsa_switch *ds) /* Setup port 6 interface mode and TRGMII TX circuit */ static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; @@ -487,6 +487,12 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) return 0; } +static int +mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +{ + return 0; +} + static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { @@ -2624,12 +2630,15 @@ mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; + int ret; - /* Only need to setup port5. */ - if (port != 5) - return 0; - - mt7530_setup_port5(priv->ds, interface); + if (port == 5) { + mt7530_setup_port5(priv->ds, interface); + } else if (port == 6) { + ret = mt7530_setup_port6(priv->ds, interface); + if (ret) + return ret; + } return 0; } From patchwork Fri Feb 2 09:19:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 195735 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp307664dyc; Fri, 2 Feb 2024 01:26:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IFWY5lBHektChY+JVE77DMFZfZUiwQSIjiSKAvhvkqzartoZoca4FxZYxP8fozZqpOvmRhO X-Received: by 2002:a54:4090:0:b0:3be:250c:7a92 with SMTP id i16-20020a544090000000b003be250c7a92mr6930995oii.17.1706865978020; Fri, 02 Feb 2024 01:26:18 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706865977; cv=pass; d=google.com; s=arc-20160816; b=eI0XN3XsRoFHVFS2p1NKZbl+OE4McEWT8pDlFC2czxe9KI43H8lMysqDr9b08gMxkD GVEEtOyrWNpvOLKt8uGCOUoZ7XEuIQ2jHPNAemhxrUlT8XfbcHWXA6w7Q40flRo239Yz UShZTGPG+DaPJUuWV6fQwnRhNgWInfnAKVnwCJiXWZOFVFn/7hLhCvumIIwE5WRwZh52 Jz8QCK+8AyR2npt+A4vaouZEycaWsF71c3v593io+cNK1EgAZK+DCHjk2fEb/oB5wHPt bNQX4bBzB8Outinh2xtgvu8+FwGeNY1ycBBg1HysHoUKnQdwyENBQl0MsBnD/0wXCpTK jwLw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=nqiGcn7t3qiLD/1zq1VZfwMI2eAhFrVXlYavLJ5Qefg=; fh=s4s260kfMmOiJQ2GujEkw3oumgUdxIrAQUpyunfS0ko=; b=WAF+I32t4IhfBJ6E2PK0/FSOgEuN8dR1TMZMHkBMZNuINrMJgddPTlIUXmRbuXzhWD i4UW0n4x2XIIPrH4cLtIOSbrH8Dssp0c8t4axfmdAMuPjMLrarGibFWvRadY5h7LfKSG BEUetkM/YGaNXvN2KlvUL+VdYabDy9qINQ9ocUZxcQjkRKPgTdlGUfU1AmKTuE4jwFA8 PEaF73ZTcqTbKfPjtsFbsTUebpI6BhnKrRucBqIY1r1SouHt19SrbKvoMv3iUFDeQkN1 l7FhIEcf+RZeAVm6mwrevJ5a2hSVJdEjVnHYNSYlfJPd7HBpTw62r+t0sdFTbiiS7fDy pdnw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="cprgKsM/"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-49547-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-49547-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=1; AJvYcCXQ5gWY3tyfxmwY0pkfdwxFO9TSBWK37TTN+G8E7QjoZenNqpz//04F/sNYsVPp9utcevXCASTs2oRMRkY/p0xsesW1Jw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=5377; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=mGG9kyQDvMUC5EklHXtFMAWXK1ZdqyzJT5eZTcp+Y90=; b=f+JF8KM64zJRkj/KJDQN8vkKEhVQccWLWxKkI9NLRqF95gugIsq0aGI6z7zAusGK1wqh/vUX9 98PKylHG9ELB39c21cVqccSsAatjC94jCTROF3zABtiabLBf0e5hZVJ X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778700107499972 X-GMAIL-MSGID: 1789778700107499972 From: Arınç ÜNAL The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware"). It was being used to set up the core clock and port 6 of the MT7530 switch, and pll of the MT7531 switch. All of these were moved to more appropriate locations, and it was never used for the switch on the MT7988 SoC. Therefore, this function pointer hasn't got a use anymore. Remove it. Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean Reviewed-by: Russell King (Oracle) --- drivers/net/dsa/mt7530.c | 36 ++---------------------------------- drivers/net/dsa/mt7530.h | 3 --- 2 files changed, 2 insertions(+), 37 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 2d468a5f2e70..fdaf65b58b72 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -487,18 +487,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) return 0; } -static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - -static int -mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static void mt7531_pll_setup(struct mt7530_priv *priv) { @@ -2617,14 +2605,6 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, } } -static int -mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) -{ - struct mt7530_priv *priv = ds->priv; - - return priv->info->pad_setup(ds, state->interface); -} - static int mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) @@ -2794,8 +2774,6 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, if (priv->p6_interface == state->interface) break; - mt753x_pad_setup(ds, state); - if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; @@ -3113,11 +3091,6 @@ mt753x_conduit_state_change(struct dsa_switch *ds, mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); } -static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static int mt7988_setup(struct dsa_switch *ds) { struct mt7530_priv *priv = ds->priv; @@ -3181,7 +3154,6 @@ const struct mt753x_info mt753x_table[] = { .phy_write_c22 = mt7530_phy_write_c22, .phy_read_c45 = mt7530_phy_read_c45, .phy_write_c45 = mt7530_phy_write_c45, - .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_config = mt7530_mac_config, }, @@ -3193,7 +3165,6 @@ const struct mt753x_info mt753x_table[] = { .phy_write_c22 = mt7530_phy_write_c22, .phy_read_c45 = mt7530_phy_read_c45, .phy_write_c45 = mt7530_phy_write_c45, - .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_config = mt7530_mac_config, }, @@ -3205,7 +3176,6 @@ const struct mt753x_info mt753x_table[] = { .phy_write_c22 = mt7531_ind_c22_phy_write, .phy_read_c45 = mt7531_ind_c45_phy_read, .phy_write_c45 = mt7531_ind_c45_phy_write, - .pad_setup = mt7531_pad_setup, .cpu_port_config = mt7531_cpu_port_config, .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, @@ -3218,7 +3188,6 @@ const struct mt753x_info mt753x_table[] = { .phy_write_c22 = mt7531_ind_c22_phy_write, .phy_read_c45 = mt7531_ind_c45_phy_read, .phy_write_c45 = mt7531_ind_c45_phy_write, - .pad_setup = mt7988_pad_setup, .cpu_port_config = mt7988_cpu_port_config, .mac_port_get_caps = mt7988_mac_port_get_caps, .mac_port_config = mt7988_mac_config, @@ -3248,9 +3217,8 @@ mt7530_probe_common(struct mt7530_priv *priv) /* Sanity check if these required device operations are filled * properly. */ - if (!priv->info->sw_setup || !priv->info->pad_setup || - !priv->info->phy_read_c22 || !priv->info->phy_write_c22 || - !priv->info->mac_port_get_caps || + if (!priv->info->sw_setup || !priv->info->phy_read_c22 || + !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || !priv->info->mac_port_config) return -EINVAL; diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 80060cc740d2..26a6d2160c08 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -704,8 +704,6 @@ struct mt753x_pcs { * @phy_write_c22: Holding the way writing PHY port using C22 * @phy_read_c45: Holding the way reading PHY port using C45 * @phy_write_c45: Holding the way writing PHY port using C45 - * @pad_setup: Holding the way setting up the bus pad for a certain - * MAC port * @phy_mode_supported: Check if the PHY type is being supported on a certain * port * @mac_port_validate: Holding the way to set addition validate type for a @@ -726,7 +724,6 @@ struct mt753x_info { int regnum); int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int regnum, u16 val); - int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); From patchwork Fri Feb 2 09:19:10 2024 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=1500; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=tzbZi99DdeWCfP5IhTMb0r535zllNsHp9+oBk2Ev3sU=; b=brIWlBShcSKoFoPX9dBBoYEN0jSVs7sXUjO+lJf5MtIOqozJn6V4XrOrZADDkN4YWOXkBPo4b N+oy7MharIHC3aVF2ir7ueafoDRXalrOj05Qh8hUNVl2NOV0LoOHHNP X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778690975191041 X-GMAIL-MSGID: 1789778690975191041 From: Arınç ÜNAL The crystal frequency concerns the switch core. The frequency should be checked when the switch is being set up so the driver can reject the unsupported hardware earlier and without requiring port 6 to be used. Move it to mt7530_setup(). Drop the unnecessary function printing. Signed-off-by: Arınç ÜNAL Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index fdaf65b58b72..c4d492e29fdf 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -422,13 +422,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; - if (xtal == HWTRAP_XTAL_20MHZ) { - dev_err(priv->dev, - "%s: MT7530 with a 20MHz XTAL is not supported!\n", - __func__); - return -EINVAL; - } - switch (interface) { case PHY_INTERFACE_MODE_RGMII: trgint = 0; @@ -2253,6 +2246,12 @@ mt7530_setup(struct dsa_switch *ds) return -ENODEV; } + if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_20MHZ) { + dev_err(priv->dev, + "MT7530 with a 20MHz XTAL is not supported!\n"); + return -EINVAL; + } + /* Reset the switch through internal reset */ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | From patchwork Fri Feb 2 09:19:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 195728 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:9bc1:b0:106:209c:c626 with SMTP id op1csp306115dyc; Fri, 2 Feb 2024 01:22:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IFRVjENLSBJoxxbjOdNhjve44VrQ8/6O4R6YJcxAj9RMRBGiHh2pRR1h+cpWDcA7EgsU9er X-Received: by 2002:a17:906:dda:b0:a30:3323:8ea1 with SMTP id p26-20020a1709060dda00b00a3033238ea1mr5656125eji.23.1706865728836; Fri, 02 Feb 2024 01:22:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706865728; cv=pass; d=google.com; s=arc-20160816; b=T3szrZ+0HROXTnxOtmFEUoYMmW37Bm+7njExiinPgIF/GhsIRCiCrcLlCexi7YI82d /xI9Omo82gkeJppnRG1BkfxU7wuU+OMmGkmqR30TszRzuFTGxo7a6/DpTcEri4p/B8I+ sMFCfC48zdtDk98HxOJXf64SQenM11IW20/21hGeKlAXzheabMcblWZ4u7/TyeCDYpYU mht4OZyzLMOEyyGtD1yRNoKUSWd0kHdGDN9zyDeMZxmZnq3wBaZLCeI+XzzqxrXNzp6H QONmhbQE79eK/6KTeJaOpCXi4mbJ5cjmAyfrFWgFj/6mi6LMrF2pattK1kzXG1VNOMiv 0H9g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=reply-to:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:subject:date:from:dkim-signature; bh=3D8Btzv39d4ZnPbFMiQi2uPPFLukk2gjv5QeGg/I4n0=; fh=+WqzCZYRZBKXhLrM48gtgevJLSEpiEydyFv3dLdAyXA=; b=M0dgHl44HJLCsBM/traYdlnCjG/iwNW6kfalFUi6W/giNeCGfuJP6Lfxt5ONLUzT/n /PXrnXXGaV9RNdtSIC4yAZxBBUNICXBgtWd5Kj7Vw1qVMKHVQTMNOP2pXrOMeGaWEHVu V9LwlXgzdjU1MoOXWfSiSp3hLgJLeVqKsaFJ18M5TuBxy83n2rU0iySMCfTQ3/fMHxaR FJHoV/Ixymk0aiu4jzIoD1Do2hbmQWRcLHe4MXQR4Ed8qNpXtYcLSdSuQtslpe47ubbx 2TNUPfn4wb8AHrOqr1+ZJBOfNjP9ojfGfSZUSNfPUdFZ2IbtGYF/8uyFgeyW5MvZ3oYH wKAg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=jJ24hMNu; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-49549-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-49549-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org X-Forwarded-Encrypted: i=1; AJvYcCV8hhNq82FjtKKpg7I8me94jPK/LGcr0v1QPVdinxlBb4rh8O222TCR0C637B0QgK9WhW+h9x5CpVNAVKo/9sVRVP77fw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=5591; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=SClOUTS4gvpigG+FVYtC+TPHpycdVONKPohI+GCk4KI=; b=qPBLSFm+L/Yaib7/N//8D44YxDAQUAw4+rorBwSOBqzArtOT3qYv+2l5seZyQMGGDnN3lgyy0 /XcqPXQzWmPDb54yJubWLPRxknKKft7BqfU3PVIAXJf1KoI3VIC2CRh X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778438441629563 X-GMAIL-MSGID: 1789778438441629563 From: Arınç ÜNAL This code is from before this driver was converted to phylink API. Phylink deals with the unsupported interface cases before mt7530_setup_port6() is run. Therefore, the default case would never run. However, it must be defined nonetheless to handle all the remaining enumeration values, the phy-modes. Switch to if statement for RGMII and return which simplifies the code and saves an indent. Set P6_INTF_MODE, which is the the three least significant bits of the MT7530_P6ECR register, to 0 for RGMII even though it will already be 0 after reset. This is to keep supporting dynamic reconfiguration of the port in the case the interface changes from TRGMII to RGMII. Disable the TRGMII clocks for all cases. They will be enabled if TRGMII is being used. Read XTAL after checking for RGMII as it's only needed for the TRGMII interface mode. Change mt7530_setup_port6() to void now that there're no error cases left. Reviewed-by: Daniel Golle Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 101 ++++++++++++++++++++--------------------------- 1 file changed, 42 insertions(+), 59 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index c4d492e29fdf..e1fdef5766fb 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -414,70 +414,57 @@ mt753x_preferred_default_local_cpu_port(struct dsa_switch *ds) } /* Setup port 6 interface mode and TRGMII TX circuit */ -static int +static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; - u32 ncpo1, ssc_delta, trgint, xtal; + u32 ncpo1, ssc_delta, xtal; - xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + /* Disable the MT7530 TRGMII clocks */ + core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - trgint = 0; - break; - case PHY_INTERFACE_MODE_TRGMII: - trgint = 1; - if (xtal == HWTRAP_XTAL_25MHZ) - ssc_delta = 0x57; - else - ssc_delta = 0x87; - if (priv->id == ID_MT7621) { - /* PLL frequency: 125MHz: 1.0GBit */ - if (xtal == HWTRAP_XTAL_40MHZ) - ncpo1 = 0x0640; - if (xtal == HWTRAP_XTAL_25MHZ) - ncpo1 = 0x0a00; - } else { /* PLL frequency: 250MHz: 2.0Gbit */ - if (xtal == HWTRAP_XTAL_40MHZ) - ncpo1 = 0x0c80; - if (xtal == HWTRAP_XTAL_25MHZ) - ncpo1 = 0x1400; - } - break; - default: - dev_err(priv->dev, "xMII interface %d not supported\n", - interface); - return -EINVAL; + if (interface == PHY_INTERFACE_MODE_RGMII) { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(0)); + return; } - mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, - P6_INTF_MODE(trgint)); + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); - if (trgint) { - /* Disable the MT7530 TRGMII clocks */ - core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; - /* Setup the MT7530 TRGMII Tx Clock */ - core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); - core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); - core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); - core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); - core_write(priv, CORE_PLL_GROUP4, - RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN | - RG_SYSPLL_BIAS_LPF_EN); - core_write(priv, CORE_PLL_GROUP2, - RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | - RG_SYSPLL_POSDIV(1)); - core_write(priv, CORE_PLL_GROUP7, - RG_LCDDS_PCW_NCPO_CHG | RG_LCCDS_C(3) | - RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); + if (xtal == HWTRAP_XTAL_25MHZ) + ssc_delta = 0x57; + else + ssc_delta = 0x87; - /* Enable the MT7530 TRGMII clocks */ - core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + if (priv->id == ID_MT7621) { + /* PLL frequency: 125MHz: 1.0GBit */ + if (xtal == HWTRAP_XTAL_40MHZ) + ncpo1 = 0x0640; + if (xtal == HWTRAP_XTAL_25MHZ) + ncpo1 = 0x0a00; + } else { /* PLL frequency: 250MHz: 2.0Gbit */ + if (xtal == HWTRAP_XTAL_40MHZ) + ncpo1 = 0x0c80; + if (xtal == HWTRAP_XTAL_25MHZ) + ncpo1 = 0x1400; } - return 0; + /* Setup the MT7530 TRGMII Tx Clock */ + core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); + core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); + core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); + core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); + core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN | + RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN); + core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL | + RG_SYSPLL_VODEN | RG_SYSPLL_POSDIV(1)); + core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG | + RG_LCCDS_C(3) | RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); + + /* Enable the MT7530 TRGMII clocks */ + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); } static void @@ -2609,15 +2596,11 @@ mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; - int ret; - if (port == 5) { + if (port == 5) mt7530_setup_port5(priv->ds, interface); - } else if (port == 6) { - ret = mt7530_setup_port6(priv->ds, interface); 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=1134; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=C+eRNzRMDtIba7vQLCEXXq4gYtY07Q6DrrKE/vhW8K8=; b=lNLVoRsMxDJZyiW6dmWXjSwLM7Gjg30vtnnsuEDfzBR2RLoRy8mx3yKz0TAFr0rzRug4RBdz7 WydiIk7K0/ODghokoz9QPeZrSgr2vxqcF/DAd88ZwytJRfuxJtcLfcO X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778727364373300 X-GMAIL-MSGID: 1789778727364373300 From: Arınç ÜNAL On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page 125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for ports which connect to switch PHYs to '0 ... 3'. Port 4 and 5 are not used at all in this design. Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1] Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index e1fdef5766fb..4ca7ba94788e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2577,7 +2577,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, switch (port) { /* Ports which are connected to switch PHYs. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706865569; l=1237; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=O2Jc3kMGKF7p2IMR4BSUcjDORbDflRydvglEQ/7DqIY=; b=oz1Jb+hTkQBq+zHBfH5lPDglY2+5P/R0xXWcb/3ehsxh63f1fIu/v/CVfc5jNziMq+IR/xQEe TAGfppGixF8A3Xdq7Zr8sCu9n7Yz5Rgl2SRFrlH3BIAVgvJgGlv3qtv X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789778427425714106 X-GMAIL-MSGID: 1789778427425714106 From: Arınç ÜNAL There's no need to clear the config->supported_interfaces bitmap before reporting the supported interfaces as all bits in the bitmap will already be initialized to zero when the phylink_config structure is allocated. The "config" pointer points to &dp->phylink_config, and "dp" is allocated by dsa_port_touch() with kzalloc(), so all its fields are filled with zeroes. There's no code that would change the bitmap beforehand. Remove it. Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 4ca7ba94788e..aed1ea6815ee 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2573,8 +2573,6 @@ static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { - phy_interface_zero(config->supported_interfaces); - switch (port) { /* Ports which are connected to switch PHYs. There is no MII pinout. */ case 0 ... 3: