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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789687514186369270 X-GMAIL-MSGID: 1789687514186369270 Starting from SM8550, the TX ADC input soundwire port is offset by 1, and uses the new SWR_INPUTx input ports, so replace the legacy SWR_ADCx routes for SWR_INPUT0 & SWR_INPUT1 following the correct TX Soundwire port mapping. Add some comments on the routing for clarity. Fixes: b5e25ded2721 ("arm64: dts: qcom: sm8550: add support for the SM8550-HDK board") Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) --- base-commit: 51b70ff55ed88edd19b080a524063446bcc34b62 change-id: 20240201-topic-sm8550-hdk8550-audio-fix-579f87f109b5 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts index 87276c39c589..12d60a0ee095 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts @@ -211,9 +211,9 @@ sound { "AMIC1", "MIC BIAS1", "AMIC2", "MIC BIAS2", "AMIC5", "MIC BIAS4", - "TX SWR_ADC0", "ADC1_OUTPUT", - "TX SWR_ADC1", "ADC2_OUTPUT", - "TX SWR_ADC3", "ADC4_OUTPUT"; + "TX SWR_INPUT0", "ADC1_OUTPUT", + "TX SWR_INPUT1", "ADC2_OUTPUT", + "TX SWR_INPUT1", "ADC4_OUTPUT"; wcd-playback-dai-link { link-name = "WCD Playback"; @@ -1139,6 +1139,13 @@ wcd_rx: codec@0,4 { compatible = "sdw20217010d00"; reg = <0 4>; + /* + * WCD9385 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R) + * WCD9385 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH) + * WCD9385 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R) + * WCD9385 RX Port 4 (LO) <=> SWR1 Port 4 (LO) + * WCD9385 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R) + */ qcom,rx-port-mapping = <1 2 3 4 5>; }; }; @@ -1151,7 +1158,13 @@ wcd_tx: codec@0,3 { compatible = "sdw20217010d00"; reg = <0 3>; - qcom,tx-port-mapping = <1 1 2 3>; + /* + * WCD9385 TX Port 1 (ADC1,2) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) + * WCD9385 TX Port 2 (ADC3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) + * WCD9385 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7) + * WCD9385 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11) + */ + qcom,tx-port-mapping = <2 2 3 4>; }; };