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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.14 via Frontend Transport; Wed, 31 Jan 2024 08:51:00 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:50:36 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 1/6] ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors Date: Wed, 31 Jan 2024 16:50:16 +0800 Message-ID: <3a2a5bb22f9ec853cc8762fa1795a75fa1106f22.1706690577.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|DM6PR12MB4073:EE_ X-MS-Office365-Filtering-Correlation-Id: ec2f035b-2ae8-4058-245b-08dc2239bff9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:00.8086 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec2f035b-2ae8-4058-245b-08dc2239bff9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4073 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789595688432515646 X-GMAIL-MSGID: 1789595688432515646 As there are some AMD processors which only support CPPC V2 firmware and BIOS implementation, the amd_pstate driver will be failed to load when system booting with below kernel warning message: [ 0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled To make the amd_pstate driver can be loaded on those TR40 processors, it needs to match x86_model from 0x30 to 0x7F for family 17H. With the change, the system can load amd_pstate driver as expected. Reported-by: Gino Badouri Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171 Fixes: fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory") Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello --- arch/x86/kernel/acpi/cppc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 8d8752b44f11..ff8f25faca3d 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void) (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f))) return true; else if (boot_cpu_data.x86 == 0x17 && - boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f) + boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f) return true; return boot_cpu_has(X86_FEATURE_CPPC); } From patchwork Wed Jan 31 08:50:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 194631 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1765978dyb; Wed, 31 Jan 2024 01:18:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IH8DKVQ0PpTkRCEGMTacyXLzIBrK2xJY+g40CX3Pst5MfclhACR9XdnZrb6mLd3fYcYFPlP X-Received: by 2002:a05:6870:8312:b0:214:fcfe:1488 with SMTP id p18-20020a056870831200b00214fcfe1488mr1298397oae.1.1706692721351; Wed, 31 Jan 2024 01:18:41 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCX1OuKgVcZtymDJWrvLPqcu5tIeOqQ97RQrKX7A9lHV+gRU0YPNlQpiQwveymAv0mTKv2ICKv474Or0PuCOXXoCyn5OOg== Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:03.8243 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 60f8485f-377b-4213-adc8-08dc2239c1c7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6434 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789597027217963910 X-GMAIL-MSGID: 1789597027217963910 Address an untested error where the nominal_freq was returned in KHz instead of the correct MHz units, this oversight led to a wrong nominal_freq set and resued, it will cause the max frequency of core to be initialized with a wrong frequency value. Cc: stable@vger.kernel.org Fixes: ec437d71db7 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors") Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 2f8656f75a1d..9291a22bd3cc 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -625,8 +625,7 @@ static int amd_get_nominal_freq(struct amd_cpudata *cpudata) if (ret) return ret; - /* Switch to khz */ - return cppc_perf.nominal_freq * 1000; + return cppc_perf.nominal_freq; } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) From patchwork Wed Jan 31 08:50:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 194601 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1757901dyb; Wed, 31 Jan 2024 01:01:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IGJAWFx7U/jYSzjfAejVJ77e3Esn2BijoiFoo5g8eW7qZxivoNHAfpQ/iM4drDo7U7zatWP X-Received: by 2002:a17:90b:a0d:b0:295:b985:5323 with SMTP id gg13-20020a17090b0a0d00b00295b9855323mr1086235pjb.7.1706691672879; Wed, 31 Jan 2024 01:01:12 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVW+bTCBjI77OnebvAOh5AnuguYbDZjmTYxD05ixektvyRBQ6lsoS6WasC/B8SsgeIvTP7DDyxd878h4BEMSBC/6VA6jA== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.14 via Frontend Transport; Wed, 31 Jan 2024 08:51:08 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:51:03 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 3/6] cpufreq:amd-pstate: initialize nominal_freq of each cpudata Date: Wed, 31 Jan 2024 16:50:18 +0800 Message-ID: <5d5822a829045c02a37d6dac81756be1312a1ac5.1706690577.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|CH2PR12MB4101:EE_ X-MS-Office365-Filtering-Correlation-Id: 154cad0d-7b85-452e-a42b-08dc2239c465 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:08.2149 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 154cad0d-7b85-452e-a42b-08dc2239c465 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4101 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789595927288924306 X-GMAIL-MSGID: 1789595927288924306 Optimizes the process of retrieving the nominal frequency by utilizing 'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface. To enhance efficiency and reduce the CPU load, shifted to using 'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed directly from the cached data in 'cpudata' of each CPU. It will also slightly reduce the frequency change latency while using pstate driver passive mode. Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 9291a22bd3cc..db7b36afdce2 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata) if (ret) return ret; - nominal_freq = cppc_perf.nominal_freq; + nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); max_perf = READ_ONCE(cpudata->highest_perf); @@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) if (ret) return ret; - nominal_freq = cppc_perf.nominal_freq; + nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; @@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) amd_pstate_boost_init(cpudata); min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); + cpudata->nominal_freq = nominal_freq; + max_freq = amd_get_max_freq(cpudata); lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) { + dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d) \ + value is incorrect\n", \ + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) /* Initial processor data capability frequencies */ cpudata->max_freq = max_freq; cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; @@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) amd_pstate_boost_init(cpudata); min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); + cpudata->nominal_freq = nominal_freq; + max_freq = amd_get_max_freq(cpudata); lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) { + dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d) \ + value is incorrect\n", \ + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) /* Initial processor data capability frequencies */ cpudata->max_freq = max_freq; cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; From patchwork Wed Jan 31 08:50:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 194616 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1761187dyb; Wed, 31 Jan 2024 01:07:17 -0800 (PST) X-Google-Smtp-Source: AGHT+IGt/OM2bcHTSBXjc0DXzwtCQKx5lYPa+DV/9/DTjIzwphSLqFCwhM1/wlB6lQjUcAIfeVVc X-Received: by 2002:a17:906:f111:b0:a31:f7e:8a53 with SMTP id gv17-20020a170906f11100b00a310f7e8a53mr655369ejb.26.1706692037275; Wed, 31 Jan 2024 01:07:17 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVaRlKc9rk2nvGsvHrwMVUrKM2FN8YeV4ChSsu582sCQkJ3i0+ApRxTaXxP4kBnwe3CwgsgMQ5+zpx2t/rlEU2wj0W+Tw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.14 via Frontend Transport; Wed, 31 Jan 2024 08:51:10 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:51:06 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 4/6] cpufreq:amd-pstate: get pstate transition delay and latency value from ACPI tables Date: Wed, 31 Jan 2024 16:50:19 +0800 Message-ID: <872b172c350021ab3c55f80460c33473486e4241.1706690577.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|DM4PR12MB6424:EE_ X-MS-Office365-Filtering-Correlation-Id: dcba7b6e-df5f-460f-486b-08dc2239c58d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:10.1681 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dcba7b6e-df5f-460f-486b-08dc2239c58d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6424 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789596310003960288 X-GMAIL-MSGID: 1789596310003960288 make pstate driver initially retrieve the P-state transition delay and latency values from the BIOS ACPI tables which has more reasonable delay and latency values according to the platform design and requirements. Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor. [054h 0084 8] Preserve Mask : FFFFFFFF00000000 [05Ch 0092 8] Write Mask : 0000000000000001 [064h 0100 4] Command Latency : 00000FA0 [068h 0104 4] Maximum Access Rate : 0000EA60 [06Ch 0108 2] Minimum Turnaround Time : 0000 Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index db7b36afdce2..eea2e192d748 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -683,6 +683,36 @@ static void amd_perf_ctl_reset(unsigned int cpu) wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); } +/** + * Get pstate transition delay time from ACPI tables that firmware set + * instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) +{ + u32 transition_delay_ns; + + transition_delay_ns= cppc_get_transition_latency(cpu); + if (transition_delay_ns == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_DELAY; + + return transition_delay_ns / NSEC_PER_USEC; +} + +/** + * Get pstate transition latency value from ACPI tables that firmware set + * instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_latency(unsigned int cpu) +{ + u32 transition_latency; + + transition_latency = cppc_get_transition_latency(cpu); + if (transition_latency == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_LATENCY; + + return transition_latency; +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -725,8 +755,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) goto free_cpudata1; } - policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY; - policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY; + policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu); + policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu); policy->min = min_freq; policy->max = max_freq; From patchwork Wed Jan 31 08:50:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 194615 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1761084dyb; Wed, 31 Jan 2024 01:07:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IENCrHhDAiwBTI4LS+sp0FzAacqZ6pnrKaddptoXhVDMwHo604dgNOnOK76iGh4Www3RdRg X-Received: by 2002:a17:906:4c54:b0:a35:992e:2936 with SMTP id d20-20020a1709064c5400b00a35992e2936mr709398ejw.13.1706692024774; Wed, 31 Jan 2024 01:07:04 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUYelx83S77TsgfHJeSOkIo4DsWuDXC5YAnGlSnwG8Ca3jJ98xoqluuelbF5asxX3ErCUX/3E/Mc2cYE8DKxdJ2O5DXLw== Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:13.3767 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40ea7d61-070e-4319-4318-08dc2239c779 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9449 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789596296481659353 X-GMAIL-MSGID: 1789596296481659353 to be more clear what is wrong with CPPC when pstate driver failed to load which has dependency on the CPPC capabilities. Add one more debug message to notify user if CPPC is not supported by the CPU, then it will be easy to find out what need to fix for pstate driver loading issue. [ 0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled Above message is not clear enough to verify whether CPPC is not supported. Signed-off-by: Perry Yuan --- drivers/acpi/cppc_acpi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 7ff269a78c20..217c11c12b57 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr) if (!osc_sb_cppc2_support_acked) { pr_debug("CPPC v2 _OSC not acked\n"); - if (!cpc_supported_by_cpu()) - return -ENODEV; + if (!cpc_supported_by_cpu()) { + pr_debug("CPPC is not supported\n"); + return -ENODEV; + } } /* Parse the ACPI _CPC table for this CPU. */ From patchwork Wed Jan 31 08:50:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 194602 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1758157dyb; Wed, 31 Jan 2024 01:01:34 -0800 (PST) X-Google-Smtp-Source: AGHT+IE45lktUFIP3fRmYQECUYDV8XC6TqQ+moHDqjp96w11oz9EjSq9I3gWKaQluv8g+2VIs+/L X-Received: by 2002:a05:6a20:a616:b0:19c:a10c:726b with SMTP id bb22-20020a056a20a61600b0019ca10c726bmr767479pzb.21.1706691693964; Wed, 31 Jan 2024 01:01:33 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUvZbi7QdivNU8M3cc/9G8LyxMU6xLCPrE7rOo7fGLTBQ0o9AlpGhJcs2PBnZj5q4PH6LKk1KFa1DWrf1vbMzJnDTbi3g== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCC1.mail.protection.outlook.com (10.167.242.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7228.16 via Frontend Transport; Wed, 31 Jan 2024 08:51:17 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:51:13 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing Date: Wed, 31 Jan 2024 16:50:21 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC1:EE_|BL1PR12MB5255:EE_ X-MS-Office365-Filtering-Correlation-Id: 15a7d7c0-b568-43c2-b3d7-08dc2239c9b0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:17.1111 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15a7d7c0-b568-43c2-b3d7-08dc2239c9b0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5255 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789595949762978646 X-GMAIL-MSGID: 1789595949762978646 Add quirk table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading. If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those issues fixed with correct workaround values to make pstate driver can be loaded even though there are CPPC capabilities errors. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 51 +++++++++++++++++++++++++++++++----- include/linux/amd-pstate.h | 6 +++++ 2 files changed, 51 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index eea2e192d748..cbc415af0f08 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; +static struct quirk_entry *quirks; /** * struct global_params - Global parameters, mostly tunable via sysfs. @@ -121,6 +122,32 @@ static unsigned int epp_values[] = { typedef int (*cppc_mode_transition_fn)(int); +static struct quirk_entry quirk_amd_7k62 = { + .nominal_freq = 2600, + .lowest_freq = 550, +}; + +static int __init dmi_matched(const struct dmi_system_id *dmi) +{ + quirks = dmi->driver_data; + + return 1; +} + +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = { + { + .callback = dmi_matched, + .ident = "AMD EPYC 7K62", + .matches = { + DMI_MATCH(DMI_PRODUCT_VERSION, "C1"), + DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"), + }, + .driver_data = &quirk_amd_7k62, + }, + {} +}; +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table); + static inline int get_mode_idx_from_str(const char *str, size_t size) { int i; @@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_get_min_freq(struct amd_cpudata *cpudata) { struct cppc_perf_caps cppc_perf; + u32 lowest_freq; int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); if (ret) return ret; + if (quirks && quirks->lowest_freq) + lowest_freq = quirks->lowest_freq; + else + lowest_freq = cppc_perf.lowest_freq; + /* Switch to khz */ - return cppc_perf.lowest_freq * 1000; + return lowest_freq * 1000; } static int amd_get_max_freq(struct amd_cpudata *cpudata) @@ -619,13 +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata) static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; + u32 nominal_freq; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; + if (quirks && quirks->nominal_freq) + nominal_freq = quirks->nominal_freq; + else + nominal_freq = READ_ONCE(cpudata->nominal_freq); - return cppc_perf.nominal_freq; + return nominal_freq; } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) @@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void) if (cpufreq_get_current_driver()) return -EEXIST; + quirks = NULL; + + /* check if this machine need CPPC quirks */ + dmi_check_system(amd_pstate_quirks_table); + switch (cppc_state) { case AMD_PSTATE_UNDEFINED: /* Disable on the following configs by default: diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index 446394f84606..ea80f961607d 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -110,4 +110,10 @@ static const char * const amd_pstate_mode_string[] = { [AMD_PSTATE_GUIDED] = "guided", NULL, }; + +struct quirk_entry { + u32 nominal_freq; + u32 lowest_freq; +}; + #endif /* _LINUX_AMD_PSTATE_H */