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clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; }; + + pgc_mlmix: power-domain@24 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>, + <&clk IMX8MP_CLK_NPU_ROOT>; + }; }; }; }; From patchwork Tue Nov 15 09:16:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20250 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2607773wru; Tue, 15 Nov 2022 01:22:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf5+BVREMCUZPark3Dp2+nzzidTrOEO+4POCvg+DweAWOB4g+JdJ2SIgmMft4SXcCfjY0j7V X-Received: by 2002:a17:902:e94d:b0:187:2430:d37d with SMTP id b13-20020a170902e94d00b001872430d37dmr3197855pll.28.1668504163646; Tue, 15 Nov 2022 01:22:43 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504163; cv=pass; d=google.com; s=arc-20160816; b=u2X+o2JUL+Yiu/F217Fsk0MhFdHu2CPn1HoZkAH9ft7buknu6MDoPM9p5jMqzTWfRx 8RVfwVQFKh8qAVCcqkTU7rXaieKbD1k1KbdwZy8612PzMMK13IyyNc8NUQHTohrgb6ZJ rI+THnXs8AK059f17i2hDzr6dcdbETYyVYonf0uhNQwP1XHCgYATZRnWoVj/98upTnWD tD7FxjkvfL/BN+pyJDbXI8QSEr8/EvEwSqfOKQaeTnXBTCgsiL809Kdf+OE/Cc/YeSrV K3VGfxW6crScO4Lc1RssN/uuST+zd5IUvn0/KITRVR2NwsssWVKSNjPIidRUVOea1M+Y YyaQ== ARC-Message-Signature: i=2; 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Fixes: d50650500064 ("arm64: dts: imx8mp-evk: Add PCIe support") Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 9f1469db554d..b4c1ef2559f2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -544,14 +544,14 @@ MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c2 pinctrl_pcie0: pcie0grp { fsl,pins = < - MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x61 /* open drain, pull up */ - MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x41 + MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x60 /* open drain, pull up */ + MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40 >; }; pinctrl_pcie0_reg: pcie0reggrp { fsl,pins = < - MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x41 + MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40 >; }; From patchwork Tue Nov 15 09:17:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20257 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608265wru; Tue, 15 Nov 2022 01:24:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf4DpGjH509C/b7jWHQ/lvQVZDfy76wO/IbFeq1WmLzUSGiGjE/tJA1DeZASKuukbDb4PlND X-Received: by 2002:a17:902:c652:b0:187:4920:3a78 with SMTP id s18-20020a170902c65200b0018749203a78mr3140174pls.88.1668504248160; Tue, 15 Nov 2022 01:24:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504248; cv=pass; d=google.com; s=arc-20160816; b=dzi/bVVt/6s3SqwsrQEB7rTkQGvCGPO5vaFUOzeyTcq5dENCr3SmNgMxHJZzw9SW6F ODr6ea6Iqr/uYQ30+QRC6V8U7tufVldTWHQKfQyH3IRERgAc3OkvYdLlsc0J/MM+Nq7L 4IehULS383mO0pTqeDP4K6kWnegq6Q44Ie7GDx/TBBkR2i7YTsSU2C3npqSbR5vbpvRc IfFa/REBLzRaPKEt3+e+ZNSgpmw75W+IuxQCFbsikE7IQWA4MESApTFwWDr1/L37ITCV jtpb6ZMSklx115tyKP277CXzOnK226E1enH4cyjcqDGBcO8kBEYvzDrSIyctxnJr93sf v7DQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=94TR/gJ3QFYxCbPvYw8g71pvCpJSSj08ePQxdLAnyuQ=; b=YN99U+jqeHSymUb/6eEgZgobOE8wCSB++eh7J/ivw5lT/ozyJXCV79BoCE6M/UkMfH D/RU8utVb32jC4grST4FfZALh8Um7UFhxaQ63kU21SEwkisjvPHwwRAbot86ki0znMcM cLJ791qn3Al+INOiIviHzzkYGi0zWNZA9/ytevsALacSlorli0TNYtoOMGGcUVUZVwtE fCcdIt6B/sqVKA7RA4y5cGcIZkX49nN/tVGQ5OUS4HM0AhLnFJfbts7tedCauO3RssnV NQb/JPNWmO6KtEYEqNydiAkAnVoLCP8SxKI4jRoEFJ2adWn1swuOtRV8REDKaGmUrRJH rw1g== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=IQr5hlWC; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM pwm4 on pin SAI5_RXFS for J21-32 Acked-by: Fugang Duan Signed-off-by: Clark Wang Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 36 ++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index b4c1ef2559f2..e323e6f4b7e5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -390,6 +390,24 @@ &pcie { status = "okay"; }; +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -567,6 +585,24 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* Input pull-up. */ >; }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x116 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x116 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT 0x116 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 From patchwork Tue Nov 15 09:17:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20251 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2607871wru; Tue, 15 Nov 2022 01:23:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf7SCPElfqzO3q61C1kwDzDOyfA4Nj1juECD0L3zbXhpyc7I3pklSXaxamzkO/Jp/vKX3FnD X-Received: by 2002:a17:90b:280e:b0:214:ba3:4eb1 with SMTP id qb14-20020a17090b280e00b002140ba34eb1mr1308488pjb.161.1668504180355; Tue, 15 Nov 2022 01:23:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504180; cv=pass; d=google.com; s=arc-20160816; b=0t1gL1aR4cHbzc4ShVL8KnMkkLmbvuEovomoSwKlxn8hXMYvDdojgOfvaf46+dzcWm S7toHAVQJ2+jRGpQQfk3s2rihC5Id1UG4kurFgDijhLT60XS3vRk2y9RztpChceUWrfX CalbLz6ovl6bdkBAmcxCqvH5q6qIh+j74SKDY8rCW8/j5R++Y/dAOOnD4cr/SKocgBJA OvBCjiyG/igJzkp+2kpKi7nfx18S1I4rfuqlwWuvZksDQaWFASTdN2thxmyvpJtxFhUJ z3XrgcrAVECU9JZJOejCspiQuOYC13mdWNQ+Ewuq6VtwongqbGtVEEUgfwI/uAiW6BLj JHPA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lp2YYOSAdZyP2Ed0cVr3XmjW1UCXA/Ikw+0NhZenzck=; b=G2J2EVvLBO8WjNotLDnvPKwPhVJ6LUu3S6VfCmc67hMeXj7+RPYcCYbqIRsOVxpaFq SJhg91UOw9P6V+o6Ts2MXSIB5ihZoEPM8RxXEKvgx4RtH/2TAS56+Nt8FSqbDoTc2Wf1 iTBiDw4P/ORCtjVuvSrLnEmsjTOAxKwjkbLnjHGrpyw4jwPitlx+aydZwMPqBmVOmjlB GWQBR8/UIW3W/R9OuCUQga6CXdWfE76sNJTEpl1yZOv7dHex8dx82woaQg2M+8fhfEJf lOqSWQjkmjCvGX3L+kmQ4PEXzCgkmbdGZGKS1d5RkWyEJiXRnNr9fFAWVHI2g6GthVtJ bkQg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=H2sLk4oR; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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Configure the clock to source from IMX8MP_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 36 ++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index e323e6f4b7e5..29472502d547 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -412,6 +412,15 @@ &snvs_pwrkey { status = "okay"; }; +&uart1 { /* BT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clk IMX8MP_CLK_UART1>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + fsl,uart-has-rtscts; + status = "okay"; +}; + &uart2 { /* console */ pinctrl-names = "default"; @@ -434,6 +443,15 @@ &usb_dwc3_1 { status = "okay"; }; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clk IMX8MP_CLK_UART3>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + fsl,uart-has-rtscts; + status = "okay"; +}; + &usdhc2 { assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; assigned-clock-rates = <400000000>; @@ -609,6 +627,15 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 >; }; + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 + MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140 + MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 @@ -622,6 +649,15 @@ MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x10 >; }; + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 + MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 + MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140 + MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140 + >; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 From patchwork Tue Nov 15 09:17:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20259 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608310wru; Tue, 15 Nov 2022 01:24:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Tt5q228RHHEci8SE4Z3G2m+xYtrCVAFLe+lJ+OWB181EEp76bXnuPBIRbKp2yNb0aFhVp X-Received: by 2002:a17:903:1084:b0:186:5f82:3812 with SMTP id u4-20020a170903108400b001865f823812mr3262005pld.51.1668504256402; Tue, 15 Nov 2022 01:24:16 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504256; cv=pass; d=google.com; s=arc-20160816; b=N8CYG67Qqv+44qCrL5YJ5cR14/zxkgAG1z4lWiYrP8hMswsXRANacgahjr5cf6Mgxb 051Ia1Q6pR84F60DtPDCTFyNlklXgd2x0EUiVPPy8i7abMySEIN/jmdBpzFFTnz+dmSe s2uPnUTupKc2iaD+rJ/mk988XgXe4jgCvZhyLmQlTYjVs34/dSyuUTCXOzTGYMF1HKi0 9ZB0AMkDLNP5L+Tcug9ZyByKC7qk1Wl8PqoodTMHisN8+Z1vNMZ4cTMFWKABSsQ8UwR6 ir8TQ1bto5Tc8W5ycld1RrtD/6TWZM8d9bExwhni/B/rJtt+1ChpHt0ZT8iPuc8oJptX Sy9A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wqQhrYUqrPGsX58WHIHx+VjV6/HB8iZfsuonkjP5t9I=; b=Z30wogwlGMnV8D013VU2DHB3wg5xTjMeWfjlwySkIpk5fzMZevMPt+l2bxLhGFO/+K QuZVWTTaWpvZrqrqM2wHujszeMvBpUxH4iLkNeVPsl1nmn7QwgrHpIevoJrH0/hcaDrb RepEMl243Kar9C+1esrHO5FfSSAhXJPjeX3pfA1GUagwF9b5YfMcblLKZ5EIt6NUErxj JVBycXQ5LQAQ+rpeT/9TgpkFObpW2ru5LzQhnnJAJ4IAioSdjCpqvT5L7SUn2bxo0Hcb JywCp90f8irEUTHAQMQQTCFMGNBRmi0s6y+GQ4u/e6wwSFY11yDwFNsYSdZTybF1EZ07 5mFA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=hsDJfW2H; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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}; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + }; +}; + &A53_0 { cpu-supply = <®_arm>; }; @@ -551,6 +565,17 @@ MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x154 /* CAN2_STBY */ >; }; + pinctrl_flexspi0: flexspi0grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2 + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82 + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82 + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82 + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82 + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 + >; + }; + pinctrl_gpio_led: gpioledgrp { fsl,pins = < MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 From patchwork Tue Nov 15 09:17:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20252 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2607931wru; 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}; +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + &i2c3 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -589,6 +596,13 @@ MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2 From patchwork Tue Nov 15 09:17:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20261 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608561wru; Tue, 15 Nov 2022 01:25:07 -0800 (PST) X-Google-Smtp-Source: AA0mqf4bwT0wpNj0hN1fj03sEQfEYJsYw/fYx2BndCMwvCVWJrtgOC0nkziUmRs/i1nA54Hc0UiD X-Received: by 2002:a63:cd11:0:b0:46f:ef65:f6a8 with SMTP id i17-20020a63cd11000000b0046fef65f6a8mr15574344pgg.398.1668504306757; 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The nxp,dvs-run-voltage and nxp,dvs-standby-voltage need set for BUCK1, not BUCK2. BUCK2 is for A53, which is handled by DVFS, so no need dvs property. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8mn-evk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts index 4eb467df5ba7..a5a7d74ec1d5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts @@ -47,6 +47,8 @@ buck1: BUCK1{ regulator-boot-on; regulator-always-on; regulator-ramp-delay = <3125>; + nxp,dvs-run-voltage = <950000>; + nxp,dvs-standby-voltage = <750000>; }; buck2: BUCK2 { @@ -56,8 +58,6 @@ buck2: BUCK2 { regulator-boot-on; regulator-always-on; regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <950000>; - nxp,dvs-standby-voltage = <850000>; }; buck4: BUCK4{ From patchwork Tue Nov 15 09:17:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20255 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608035wru; Tue, 15 Nov 2022 01:23:26 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Oo535/iPnaA+lGnkYj40jvln5QHksYSORYBDWOKRPrDVN9cYLnlMNkyRWbj980w4JYp8A X-Received: by 2002:a17:902:ccca:b0:188:aa84:14 with SMTP id z10-20020a170902ccca00b00188aa840014mr3208481ple.17.1668504205948; Tue, 15 Nov 2022 01:23:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504205; cv=pass; d=google.com; s=arc-20160816; b=i6YaV3mLwoqGfFQOwjiPvR+IvOys0SmrwL4jUb2fLH1uyeJjxDy5cYe/Y2cV8v4xSQ jyPt1cVun48F5WjUrT87z8sBd4cohtWLZvo5fOS90EPWSe9gLxem4vXBu7RJc3+99enk IMU6OK92IyOEPbHLQS/eH6b5LYiyc+QY6vUyU1esUEXppP0r2yJ/QHH8tPejS5TaHNmy JtXpqPgzYabI/BgKVE3RLj9vKaXyuBjiK2T1Px2zUxpfDeb3ldVegKcMG2xTrDzeULQv 5pyXq5REhBkeSYn7tSEZDiOp6vvObk4bpIbxNO6krFdkmlHzYXMI9aJUc6IdZ5OcJWem PQCA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wvUAb3mcK96FP9e73bKTht9uQvkXPfy6sAzCX5waNMc=; b=x4ulfkMxs1rZaH7ZYWOgsCOxYUuZE8ovtp+z+g2Jtf0eNuNSX8dSh20GFPsQU4lmy2 fI4rgKwbeqqZzy/vJTXgPAASlbnLaN0RGwJ/GxeBDpyGPr84/rm44s/2QVGWtIKx/TlB GssMC1FOANynJ7ws2vF6DRWFp1tP1fjXOUhyoQy4Q3o4Nh9gx0epiWKuOAoDcFXGpatg IO44TzwkEi9KUqM3Vd+kwPYbsffPhu7KoIng93iAO33ntCwm4SVgvST0C+/tJ2owob3w JR2+dYw8u932cp7J+pzUUgQEijnkMEQqThUY6C422/PYhAvK2hMQX4GDczSSgLT6tH6e KIcw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=EXxrisbS; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi index 261c36540079..2b4395854283 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi @@ -36,6 +36,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <12000>; enable-active-high; }; From patchwork Tue Nov 15 09:17:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20254 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2607999wru; Tue, 15 Nov 2022 01:23:20 -0800 (PST) X-Google-Smtp-Source: AA0mqf5cbFllYw3b9ANa6ElzNeCiUpKqZq46JqeRtbgzvp9B+rhiWhbP96UfgG4ns0+qeRCTdJN+ X-Received: by 2002:a17:902:e547:b0:188:7dca:6f4a with SMTP id n7-20020a170902e54700b001887dca6f4amr3236077plf.60.1668504200701; Tue, 15 Nov 2022 01:23:20 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504200; cv=pass; d=google.com; s=arc-20160816; b=shfAbXFiUl5T/LoUxW+1Vfak0n89l8zUvNOytyRNBInGOAdwmWzo70I9ahY/S9D0pf cNXVWV4IkGxM3pyUlMMTOSs1sJ/HJmFUmqgLHl29wheWWr+7ngMPhNQpYdB/YA1qCKRf Kh3wpDnxggt07vbn+TZXRF9N51QyuJ3iGuHPQHdJvELlVMu6tW+CVJF1fPkkQVZKbpix cjzjCapjD6rZSbbZ4PZru3G+r8pjT1w84bQ1v1mTyrATb/Vf75EaDxg3TLRA5Tz8vZZb pNidVmCFIwQosymqvTnprZOEUdrD8AutjK8ptB3fmf8qZ9wjVDBV/Tnbr0zOKjjZtTOt e1tA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rMOqevrOfn6aOSvH8+ncOwTcoL5CLsJ0bqXH6/P4n0I=; b=Og1k4L5eAZOvsqy86cL2KEDjMds/neI9GcFxhBtbPTQfIBGAD6MtDZ5Cow443uI3wW ZJlHMvzInC7cpd3tPAKQvfC8V2eY17gRl+2HblxSzmhc1Xf035cONT9DPDZr7QM79+oX 0DopaGV8/sOW7CUbCdZ7tasJqsWTx2P9qu7auUQUBxUVFr+k006RfZ8sgLGK5CN1x0a8 71twwRcV2pl3Y55WlNmivEbaw6Ld0hYT1wcOFezSMQIqlq37MKji+TO/Zv+zSmuV6qUc 6Jv3mfPtxckkjTFMR7C8FtIvO3PPcWueGlKvUC9IdvqRKB/n5QMv6OyqOz+KM9fY0lzd dwKw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=VL24jUam; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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- pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "okay"; ptn5110: tcpc@50 { @@ -196,8 +199,11 @@ typec1_con: connector { &i2c3 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; status = "okay"; pca6416: gpio@20 { @@ -370,6 +376,13 @@ MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 >; }; + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x1c3 + MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x1c3 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 @@ -377,6 +390,13 @@ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; + pinctrl_i2c3_gpio: i2c3grp-gpio { + fsl,pins = < + MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3 + MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3 + >; + }; + pinctrl_pmic: pmicirqgrp { fsl,pins = < MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 From patchwork Tue Nov 15 09:17:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20256 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608068wru; Tue, 15 Nov 2022 01:23:36 -0800 (PST) X-Google-Smtp-Source: AA0mqf6qW55kExSZG3ve1xCm1BLYgyILMKSe9ofvTcJ5O1R0qdZQ7O0E9TleLfYBg/DPJoq/y0We X-Received: by 2002:a65:694f:0:b0:476:ccde:6694 with SMTP id w15-20020a65694f000000b00476ccde6694mr235546pgq.603.1668504216072; Tue, 15 Nov 2022 01:23:36 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504216; cv=pass; d=google.com; s=arc-20160816; b=bCUR33zlEEzGHkikUCFAh4A++Bg+b97hM21DxPZeFmMkFWPaVxGEq3Jhk7VTh9dMnz RPB9U7GH5QNceZzqZt/wmZjkJcBOzhAKdhOZCZUExcIWajxSqYcGYuZXHc05aixscdTS j03MH+HZIE6SOhox6oiJYYzMDmrhli4/m0x7g3sDcFyPhlbAbxXMAq0lGqxiPiBwBG8P QoTj/gdrMyayVGt98KZ3N97k2S5fSfVtNFMHVO3INjP1Rm7sZygbS5kLsPaZPpNM0JnT BHrsWmPjsdtRh/Utc9OKPYCrV/sVGUxOMD0RKepOENYFZY8k/RupFJ+W3WBrpDwMxBAW /ccA== ARC-Message-Signature: i=2; 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Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi index 1971f095e4c2..12dc5d398a03 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi @@ -247,6 +247,15 @@ &spdif1 { status = "okay"; }; +&uart1 { /* BT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clk IMX8MN_CLK_UART1>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; + fsl,uart-has-rtscts; + status = "okay"; +}; + &uart2 { /* console */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -440,6 +449,15 @@ MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 >; }; + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 + MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 + MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 + MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 From patchwork Tue Nov 15 09:17:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20258 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608267wru; Tue, 15 Nov 2022 01:24:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Cvzsdy3pyluCJXsjghgXK6okmz1ubJ4xs9B9gCuJhVHMdHMfvPCPfNz+E/wHCcqXkO3q1 X-Received: by 2002:a63:f64d:0:b0:46f:7e1c:e6e6 with SMTP id u13-20020a63f64d000000b0046f7e1ce6e6mr15414495pgj.138.1668504248441; Tue, 15 Nov 2022 01:24:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504248; cv=pass; d=google.com; s=arc-20160816; b=FrV8Ppg7HOFkBzX3t9mFTm7X0/trxwsMfEgD0iITtdQ0dXujJ5sCYnvi6EUJVUHXU4 IpTcjDbdc1EBgDIIGmQc0iddpUAZDBGszYEznyHqpjr87oPJyL+n76LS9FkAPiGo0a3M U/VCIAdkx9BC3YW66upOQSKo35HaKSHfVSnpZj7gfrTT23TCPHRIOQbsebdOdrl3fOgI 6t/cosZQM9nco9g7wHog29N/PchGM3Bblo8EuudLKl1hwWwGOkLF7CFYVU9PhiIH3hrQ 7ewInSKb+5atWuzAT95SBkaEVEvjhzOKtGXHgSRkOBRVFzRuP2XdMVbTNoXHOorARDgJ YEcg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=c4GtD6rCQpSTNRugMldF/AhuI43m5h3lfCx/IbidyAQ=; b=bLCBw77JS+CXDsuufSZErnHsY/81WIHaEnifsSogOi1lzkPmKa6SarB9BjHywXXwK5 /6X/TVBR9oGUL64Hr+k/++oTCuucVUAR3ycS+iFY6bzTuQAF6n7RGMPmQRRKwqgvxhlt /r5X7gvhBECI6nCJPQD1/6Sm3CTo/TAw5iNwj76kg0kVE+TyG3ke28opJrFL2SbF4SZv F3+OpOMNE0CnjODATnEf+wcXCb5AZBVZW6hvMIAAKG9Gt9nHffbE6mQDllXKJexSrbD3 TTd2y2vbJSO/MZOOZ08N25Q/rUQvSQLTsekY4WgUeGZflelms3u8b18jMlYXpHqRm95C aIFw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=NvwX1bfh; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Haibo Chen Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index 7d6317d95b13..f881494996a1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -56,6 +56,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <20000>; enable-active-high; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 82387b9cb800..07d9fb2aacf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -46,6 +46,7 @@ reg_usdhc2_vmmc: regulator-vsd-3v3 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <20000>; enable-active-high; }; From patchwork Tue Nov 15 09:17:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 20260 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2608360wru; Tue, 15 Nov 2022 01:24:25 -0800 (PST) X-Google-Smtp-Source: AA0mqf6BpCtlVLx6uoTfrhViqg+MxFZsPAFAcMZneW8jGRBdGBVXzlKOyR0SWoSuHu7RcjI8cAv4 X-Received: by 2002:a17:902:d54d:b0:174:b537:266d with SMTP id z13-20020a170902d54d00b00174b537266dmr3107324plf.144.1668504264905; Tue, 15 Nov 2022 01:24:24 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1668504264; cv=pass; d=google.com; s=arc-20160816; b=r8Esl5DfEKKHC77uKwvyHX2YHh7TrhG5xM+JwQx5ID0siAfhHdFJGdwiGdB19gza1f PaArhrAcRqeibUWbuQPkKl3bXfoLOAMkeBHiY9LwFfMDCkUSDNsaQhFyCu3TepHN3GX7 QYgH8fisf484PrVwIhIVFQMzrYRIc0tj5QN4q2MPdE3Ho+JI2LVprh2sVzwhkxTzOrUV 9rUiw/oRnd+IjCCHJUeBUW08+sGLNXSGFi8Cn9a25XK9tSZEb8Y7yY/hoOaMQKPW54PN BEBAOpWVbQRrErru/8qkiqvsGy2MVubdYgDqxJyjiJiMn6LnlbWsBK9LkwOS+R3tkcz9 HIPg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/QJyfcMRCt8RnzfjVIbNMhcXQqdgUy4gExc4vtwu7DI=; b=oZacU3lOdZzoEx8P07MKrZjRy+tWryIZhl3F3aN/DlQ2wwTxo+6/29nub0iyN32dYM UDf4HTC2XuukixwaODHpm39WMYEjOPIiQTIPqduhMKfEvE09+aSE4O7ReViBLbW05tFq ZWbs//WARjiqIv5Es04f2ARs2D8MXJlaczYbdA5Fksx198kH4goM1IJ51GYaSceH/G/B r0XtWYqENskplEhgv2OM/sfMxC8TzlrG+dp7WFjvmlbJr1q8YEalvfnVUBTkoDrRWN+r hIHnwrrn4M2XX8+20v5lVXPK98RubksV7KA+U7pJ0eFnp0xcQ0pGHlWCeibmX5EIxAIF /F4A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=QgIYgjpu; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Shengjiu Wang Signed-off-by: Adrian Alonso Signed-off-by: Peng Fan Reviewed-by: Marco Felsch --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index f881494996a1..e7984205de3e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -344,6 +344,7 @@ pca6416: gpio@20 { reg = <0x20>; gpio-controller; #gpio-cells = <2>; + vcc-supply = <&buck4_reg>; }; };