From patchwork Tue Jan 30 10:20:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 193984 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1128526dyb; Tue, 30 Jan 2024 02:48:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IEeEGlYLwB+4VWVC9EW3u9SCNLe8UKSkQsP5yNV9hDKQxQwmD8zF+eb/8GOX3X+vqyYbQiE X-Received: by 2002:a17:902:aa85:b0:1d7:c27:2d3c with SMTP id d5-20020a170902aa8500b001d70c272d3cmr1079993plr.6.1706611726898; Tue, 30 Jan 2024 02:48:46 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706611726; cv=pass; d=google.com; s=arc-20160816; b=VazBjKs68skwI6XP1VVj5cd7imo4WpgKBh90IC2doURDN+OQvabFlTELdKvLYlok7a hGfrbaDkQSmx3irBN6EdDvyMKvZ7w5v2/dqcOpu9+YFuaUNxHDuWg5zC+xPa9CeIym9N Ee8hxhlNsdPZk6YHVwBM5bfInBuVtZWWS/MDguCC4H212/9qiCy3jQyhi9swLG952RBe snDGOGeYvOkNFXGEbshIl1APzJ7FkC0ej/gHaH49d2Q8LZZeeO2Zzjy5Ld5vh5xlPhFZ hlaae32abaukTnnW37pYjTzmqHJg6ovL+sQ9hjMJSCvTJ0LrEpvVofXaW5xmTEnqIoyS YKfg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=LXQbUd5ai5wxnfNheSifAqcrBh8d9ymLIaXwvJnXXvo=; fh=WNOW3i8pv+JZVz+RVW3w+z3T5nkdlUhT8aPyquMcKvI=; b=s7cqtVyYLDQPge5Rmj6ccgwq4NDvXIYw8RGcL1R9llTHePiwyiol08IXnWvIitptau s5UDNiOllcvJ5PE99QxNEz0BKhAtKamf2K++QGzVDmik4dJQKmu33D/7YUlfcG0JS0Lx loB6qzfLB6yEcU+DapSdRpEHYH/215rUHeGajQ1Q6Id8BNL3I97CmEYJBud6x4RdfHDG Zda/+f5FBWI1Z7ZjGvIk2z2owL7RWrIK3MTV9HxYnOYW231MT8t5wwQjaLDbEjFzRuWF qNSok1VqPSv5EIdfb77U61xKdXSktnZZaF6S2o4Wk9om8r5IUrpknDrIp7osId1XlXsV OKRg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=O3Rtk56f; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44375-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44375-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id q20-20020a170902b11400b001d8ff334318si1551669plr.176.2024.01.30.02.48.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 02:48:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-44375-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=O3Rtk56f; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44375-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44375-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 75110B2A7E5 for ; Tue, 30 Jan 2024 10:22:21 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8945067729; Tue, 30 Jan 2024 10:21:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="O3Rtk56f" Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B248B6167F; Tue, 30 Jan 2024 10:21:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610065; cv=none; b=ltBvYnSjpWl0qPGVGm4JZt/MwHzynIxJHL20U/zEHSScc1Gwyu7ymIdifbGvHqBLwX5Mabj111b52hDh79nDGTR7kDI84q6qPxW7MD36o/tdoN1dunm4AVOxkrDMLdlexyCPcuPsPZcVkbJFzQ1gcxObrVnB0Kg2C/lZ/xeF548= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610065; c=relaxed/simple; bh=t4ihSeEiSJmjrjH2gowgqfEbP4xlLq5HsUJpdls5aKM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WZnBJZdH0+x5/U3uGb675IjDn0XqNrmE+S9Xjk/dKHTARxOWMftDAi/GzH5QOMMFLYrx1l1W57sox5gDKi9Ri/rSkd6zxIowOQvmf/Gtrykeouk4CzSoOwVMalbIPeEbSPsIWxBHPDCPwR9AdMG32lMtD08MlSKYcNISplH8sxM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=O3Rtk56f; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKlCf074007; Tue, 30 Jan 2024 04:20:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706610047; bh=LXQbUd5ai5wxnfNheSifAqcrBh8d9ymLIaXwvJnXXvo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=O3Rtk56f/amvPDs2FXgG87RSAADuU9kuFj9GiL7yD08pFRPygC5TEov/spMI1qtMP GGdaVoffDF9eySIMg7YafYnpMU4LnugJfyJ2E2EnML8NlKRv/FqFfqfcKnN7zoS7wT NIEjLpvdvyDme12H3f1CttbUkiwXVeqf6F0X+AQ0= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40UAKlD7102394 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jan 2024 04:20:47 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 30 Jan 2024 04:20:46 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 30 Jan 2024 04:20:47 -0600 Received: from localhost (a0498981-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.68.216]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKk6t027119; Tue, 30 Jan 2024 04:20:46 -0600 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH 1/3] arm64: dts: ti: k3-j7200: Add support for CAN nodes Date: Tue, 30 Jan 2024 15:50:42 +0530 Message-ID: <20240130102044.120483-2-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130102044.120483-1-b-kapoor@ti.com> References: <20240130102044.120483-1-b-kapoor@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789512098427388064 X-GMAIL-MSGID: 1789512098427388064 Add support for 18 CAN controllers in main domain and 2 CAN controllers present in mcu domain. All the CAN controllers support classic CAN messages as well as CAN_FD messages. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 270 ++++++++++++++++++ .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 30 ++ 2 files changed, 300 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index da67bf8fe703..58fd67be213f 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -895,6 +895,276 @@ main_gpio6: gpio@630000 { status = "disabled"; }; + main_mcan0: can@2701000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02701000 0x00 0x200>, + <0x00 0x02708000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 156 0>, <&k3_clks 156 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan1: can@2711000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02711000 0x00 0x200>, + <0x00 0x02718000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 158 0>, <&k3_clks 158 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan2: can@2721000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02721000 0x00 0x200>, + <0x00 0x02728000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 160 0>, <&k3_clks 160 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan3: can@2731000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02731000 0x00 0x200>, + <0x00 0x02738000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 161 0>, <&k3_clks 161 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan4: can@2741000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02741000 0x00 0x200>, + <0x00 0x02748000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 162 0>, <&k3_clks 162 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan5: can@2751000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02751000 0x00 0x200>, + <0x00 0x02758000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 163 0>, <&k3_clks 163 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan6: can@2761000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02761000 0x00 0x200>, + <0x00 0x02768000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 164 0>, <&k3_clks 164 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan7: can@2771000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02771000 0x00 0x200>, + <0x00 0x02778000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 165 0>, <&k3_clks 165 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan8: can@2781000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02781000 0x00 0x200>, + <0x00 0x02788000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 166 0>, <&k3_clks 166 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan9: can@2791000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02791000 0x00 0x200>, + <0x00 0x02798000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 167 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 167 0>, <&k3_clks 167 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan10: can@27a1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x027a1000 0x00 0x200>, + <0x00 0x027a8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 168 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 168 0>, <&k3_clks 168 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan11: can@27b1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x027b1000 0x00 0x200>, + <0x00 0x027b8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 169 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 169 0>, <&k3_clks 169 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan12: can@27c1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x027c1000 0x00 0x200>, + <0x00 0x027c8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 170 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 170 0>, <&k3_clks 170 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan13: can@27d1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x027d1000 0x00 0x200>, + <0x00 0x027d8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 171 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 171 0>, <&k3_clks 171 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan14: can@2681000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02681000 0x00 0x200>, + <0x00 0x02688000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 150 0>, <&k3_clks 150 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan15: can@2691000 { + compatible = "bosch,m_can"; + reg = <0x00 0x02691000 0x00 0x200>, + <0x00 0x02698000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 151 0>, <&k3_clks 151 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan16: can@26a1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x026a1000 0x00 0x200>, + <0x00 0x026a8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 152 0>, <&k3_clks 152 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + main_mcan17: can@26b1000 { + compatible = "bosch,m_can"; + reg = <0x00 0x026b1000 0x00 0x200>, + <0x00 0x026b8000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 153 0>, <&k3_clks 153 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + main_spi0: spi@2100000 { compatible = "ti,am654-mcspi","ti,omap4-mcspi"; reg = <0x00 0x02100000 0x00 0x400>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 60b26374ae0c..11bda5c70655 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -655,4 +655,34 @@ mcu_esm: esm@40800000 { ti,esm-pins = <95>; bootph-pre-ram; }; + + mcu_mcan0: can@40528000 { + compatible = "bosch,m_can"; + reg = <0x00 0x40528000 0x00 0x200>, + <0x00 0x40500000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 172 0>, <&k3_clks 172 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + mcu_mcan1: can@40568000 { + compatible = "bosch,m_can"; + reg = <0x00 0x40568000 0x00 0x200>, + <0x00 0x40540000 0x00 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 173 0>, <&k3_clks 173 2>; + clock-names = "hclk", "cclk"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; }; From patchwork Tue Jan 30 10:20:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 193969 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1118733dyb; Tue, 30 Jan 2024 02:22:17 -0800 (PST) X-Google-Smtp-Source: AGHT+IG1nteVvLHw9kJgEkTGa1xANbXaH+qq+OFuFmOa16PV9poQ7c8tCneUmaUgEdsWHnDNgcvH X-Received: by 2002:ad4:4eaa:0:b0:68c:5ecb:c257 with SMTP id ed10-20020ad44eaa000000b0068c5ecbc257mr1368548qvb.117.1706610137014; Tue, 30 Jan 2024 02:22:17 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706610137; cv=pass; d=google.com; s=arc-20160816; b=uwdOXDEUjGn5XO38SI3rGFkCtdHKN988WXMt/aicqONrqtJQTRTqWU0qwnRZcjhwN8 rssNhI+AbtlNRlyqMab42N7z+e/fnBqnhxLAHuxkX/7vdOgiG4E3NrS3TGmVKiK2tHsk 0M+1o1/TsMbt606NTT7TmmqSqJAZpd5aSHWO2iIRbJYTInc8MfYuGH3QgZY1xHW9HR2E HphovmpZeGgxjWhE0P0RG2qTFfa4HNV6P/6kQyENJxC1zodEqOTgVeqmaxah4Cj09wwF B10YdwYjyAYOI0wrbbFxFEm343NNOsS1TCbMjMRo4Rv5H906HoVlw/93AIuu1S/lX5ZZ 3OxA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=pcQtRcrtFveeIY8xzn2syKr87JyPBybxp9LnMqt5Iy0=; fh=WNOW3i8pv+JZVz+RVW3w+z3T5nkdlUhT8aPyquMcKvI=; b=D67iF1ImimOM2k0Ie1Z+yoUscjB5JJMZ53+1/lOngxwO/K4BZSnSlg6pXm2FPQ88nh 9ebH0GmoKrnRfyrQnpfeeVK4FsWhlaTMX8pqreMAAgQ2fItvFmnYAjC9SQZgHV/ppwnT 7Am+2DYFkICCdZD0oPmhIMKB6dPTG39fTO4d4qd2uuk1SWSJD4P9wtd4SPzlXsicM/8d t1cyww6J2xL/hm/tjyozkITxx+417UPAB7e+KZIbs21mjl2TZjK7zO8FTMpE3CYzUIte MAKdS0p2wCOmVxPvLLt6PmqgV8uw6Za8jajpc6L35FMSGeRTUABK+KEvCBMkn5+off5z 8Ynw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=s2GxSyS5; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44377-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44377-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id 5-20020a0562140d6500b0068c53f9f8fdsi3138320qvs.583.2024.01.30.02.22.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 02:22:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-44377-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=s2GxSyS5; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44377-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44377-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id E2E341C24D72 for ; Tue, 30 Jan 2024 10:22:12 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9054F67744; Tue, 30 Jan 2024 10:21:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="s2GxSyS5" Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE5C960DCD; Tue, 30 Jan 2024 10:21:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610066; cv=none; b=K0zRZF1R28sPZja8ywr5INfQhj0KSw6kX4aWYW6Gj2/K2h90W5PetBtEWaYC2+fOhP5dlerYRTCg/tQhoYWX3Mhn/O2KgTGXaE+zc2ue60Xp0Iq3ssmQsm8KjchGOBjckboaqZGydYzg8DMt/qpf7Wcc6BCocuuVmVCMTo3tDoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610066; c=relaxed/simple; bh=Ln5qtZbq4GXL1pkD6vt5CVkCif/cs0b9QjnMmkxlkco=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=F+x5fsTWAV9E+F3Smsqor+LV1Q2yaKT199kCqPih5yo2FB/xF6k2a+gz2g7uoYVADPdaUruko9USOcuA5imjcUYEDK3VY8YW+ixiT0fnuoxa2R0wUM/nRYhAWXJBNi4xJ/zrMLTNnzEfhlIJiUOeDhc2b6Be0hZCbMsGtvIKNP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=s2GxSyS5; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKm60037220; Tue, 30 Jan 2024 04:20:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706610048; bh=pcQtRcrtFveeIY8xzn2syKr87JyPBybxp9LnMqt5Iy0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=s2GxSyS53SDfzjUWl817nIL/XjscGbOxkJH70zRHVAs9IvqcgDYXlfNUPRh36OSkt fh1E1+vVv/V/OtVIK7yYgr6C0LxXOl6r78JJTNqmK0bcBwv0W94NffI0Ef6TvT6PU9 gLw+D5x+jOcLHX6stGKJGoL6qrf/qE41QD5rmobU= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40UAKmMi129943 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jan 2024 04:20:48 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 30 Jan 2024 04:20:48 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 30 Jan 2024 04:20:48 -0600 Received: from localhost (a0498981-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.68.216]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKln4027139; Tue, 30 Jan 2024 04:20:48 -0600 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain Date: Tue, 30 Jan 2024 15:50:43 +0530 Message-ID: <20240130102044.120483-3-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130102044.120483-1-b-kapoor@ti.com> References: <20240130102044.120483-1-b-kapoor@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789510430781491721 X-GMAIL-MSGID: 1789510430781491721 CAN instance 0 in the main domain is brought on the J7200 SoM through header J1. Thus, Add transceiver dt node to add support for this CAN instance. Also, add the mux dt nodes to route CAN High and Low lines coming from the SoC to the Common Processor Board. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 35 +++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index ea47f10d393a..0010600b8176 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -5,6 +5,8 @@ /dts-v1/; +#include + #include "k3-j7200.dtsi" / { @@ -80,6 +82,25 @@ rtos_ipc_memory_region: ipc-memories@a4000000 { no-map; }; }; + + mux0: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>; + }; + + mux1: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>; + }; + + transceiver0: can-phy0 { + /* standby pin has been grounded by default */ + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; }; &wkup_pmx0 { @@ -142,6 +163,13 @@ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ >; }; + + main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */ + J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */ + >; + }; }; &hbmc { @@ -478,3 +506,10 @@ partition@3fc0000 { }; }; }; + +&main_mcan0 { + status = "okay"; + pinctrl-0 = <&main_mcan0_pins_default>; + pinctrl-names = "default"; + phys = <&transceiver0>; +}; From patchwork Tue Jan 30 10:20:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 193968 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1118549dyb; Tue, 30 Jan 2024 02:21:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IEnwTzMQL7SYSxqoIC0JTBHEhpIXOS97N75tHeBadIJVFWO93Mx6Z1BXLimgTM9l2FA9k2w X-Received: by 2002:a17:902:d50c:b0:1d9:1b3f:b39b with SMTP id b12-20020a170902d50c00b001d91b3fb39bmr89856plg.67.1706610108044; Tue, 30 Jan 2024 02:21:48 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706610108; cv=pass; d=google.com; s=arc-20160816; b=g8Vt0qm07Ttgl0VRMjOXHdN0PWRZP16E5Eii8mGNbQYPao8M9z1WtOU5uKOS8Bte/v of6Tb9grAnvUYRl91OG6/yNc0tqD3fYdJKFR5oZJ2HtvNsH5uoPqEwk8Q3rjenbrczV0 gdUpwJ1Vmhmcnz7p3OfhFO5BT5OWB+ZMpooCKHScnSULTSjd0rCWIgmVP7daJyGThhHd 88QgNE9l//EYY4z3c0AEpiK4kX0yNhkcpDkMi59G/YNvU+CFp4G+v0tLNzwCB1j2uXTT IKiBOywmn3puwynaT5E8I4AreyEnf/rnTdaU5MiyvR0PsYgyRd9QPIsE890QOfy18yC3 3i+A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=7KtrsNB3Qo53QsHHGjsvqWeZjt3XmDHwVLvllgU1U2U=; fh=WNOW3i8pv+JZVz+RVW3w+z3T5nkdlUhT8aPyquMcKvI=; b=jB9J1rQHF7SJQNsc+e2nPyr/nL8WYe7N6fmKDXC4HZYhRhCXMRv9kalosxI8pvj45O di/xAnQvlC1tgMvj8JqfofYj9dG5CGz3i1IwMwEtiop5IHsyoRvGWa07ZWcQ4YOBGBlf LGeQjhq3e+CwTtI644N746gZJlsdk3GbK0tYs+t+vF/xVEZh1AO/WhO5vDcnqYeSGyP3 VcxPU1d0KQmRQK7oTtJe79dmsyOoafsrI1jpKeCqASNjQ90I+wy5uygGmluqYxB+31kW 5qX8RT+P3/otWDvxaBK1bPO+Dtxqai+Na96APICUvS/qir/j3W7TL9j/yZ9AWfnXzUIP UArQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tbWT3Gsn; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44374-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44374-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id n6-20020a170902e54600b001d792c3bbe3si7352990plf.81.2024.01.30.02.21.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 02:21:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-44374-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tbWT3Gsn; arc=pass (i=1 spf=pass spfdomain=ti.com dkim=pass dkdomain=ti.com dmarc=pass fromdomain=ti.com); spf=pass (google.com: domain of linux-kernel+bounces-44374-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-44374-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C59AF28A4CA for ; Tue, 30 Jan 2024 10:21:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3450366B2F; Tue, 30 Jan 2024 10:21:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="tbWT3Gsn" Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2234A60DCB; Tue, 30 Jan 2024 10:21:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610064; cv=none; b=Ym6YK3XY/9qHg2amlUgVoDmQgZJI0mXqXheqS+bONfV9TmCSr/GOvWfMOAavUlchPm/rIw73hPkzrq3rPP8rpPsO2IuOsrQLKnX9m9GMm4o3zcO9zhqNCDB/y5/Fjq6gmrqWu5P+utoTCIo0gNaZPwXECcuHZcQSE6NhBGpaqII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706610064; c=relaxed/simple; bh=vk+ZJi4fIM6CcYRiuC+wYAKqqIvdK/4Q4UzYq1kb3WU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=laI5QKaLpo/hzacYG6Vk8iB9M5V6erQWrJZYYxyv1q9ns/mbTQziMNk4Cb4pUdDoChs//voL5EashS45HEytOfXGxP2krMgUmjhu9pUIOZfuKXLvoDo3mOuneAPG77Cf0480nuSmrVlfGWKuAWZnjlix8ywyk/nPWMCsmFrp+qY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=tbWT3Gsn; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKoQg037532; Tue, 30 Jan 2024 04:20:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706610050; bh=7KtrsNB3Qo53QsHHGjsvqWeZjt3XmDHwVLvllgU1U2U=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tbWT3GsnyP6tMj8hknqIyMgeIQXCeFe8FCer8fu6gZb3Q3xqKw7CagQ55MiCK1k7S NRK+ZI8IbodDhgWxTL8wPi26+JngyzNvRT7VCbD7qB7yMP1DsUJVQQ8AgII+hrY92r hZyhMzkLMog9Kpze8EhnvpW5hzsIBrHpLWYR1ZNA= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40UAKoeG102454 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jan 2024 04:20:50 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 30 Jan 2024 04:20:50 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 30 Jan 2024 04:20:50 -0600 Received: from localhost (a0498981-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.68.216]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40UAKnnh048061; Tue, 30 Jan 2024 04:20:49 -0600 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH 3/3] arm64: dts: ti: k3-j7200: Add support for multiple CAN instances Date: Tue, 30 Jan 2024 15:50:44 +0530 Message-ID: <20240130102044.120483-4-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130102044.120483-1-b-kapoor@ti.com> References: <20240130102044.120483-1-b-kapoor@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789510400752947332 X-GMAIL-MSGID: 1789510400752947332 CAN instances 0 and 1 in the mcu domain are brought on the common processor board through headers J30 and J31 respectively. Thus, add their respective transceivers 1 and 2 dt nodes to add support for these CAN instances. CAN instance 3 in the main domain is brought on the common processor board through header J27. The CAN High and Low lines from the SoC are routed through a mux on the SoM. The select lines need to be set for the CAN signals to get connected to the transceiver 3 on the common processor board. Therefore, add transceiver dt nodes to add support for this CAN instance. Signed-off-by: Bhavya Kapoor --- .../dts/ti/k3-j7200-common-proc-board.dts | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index cee2b4b0eb87..63b03dc326fa 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -88,6 +88,34 @@ vdd_sd_dv: gpio-regulator-TLV71033 { states = <1800000 0x0>, <3300000 0x1>; }; + + transceiver1: can-phy1 { + compatible = "ti,tcan1043"; + #phy-cells = <0>; + max-bitrate = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; + standby-gpios = <&wkup_gpio0 58 GPIO_ACTIVE_LOW>; + enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>; + }; + + transceiver2: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; + standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; + }; + + transceiver3: can-phy3 { + compatible = "ti,tcan1043"; + #phy-cells = <0>; + max-bitrate = <5000000>; + standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>; + enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; + mux-states = <&mux0 1>; + }; }; &wkup_pmx0 { @@ -138,6 +166,33 @@ J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ >; }; + + mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x54, PIN_INPUT, 0) /* (A17) MCU_MCAN0_RX */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (A16) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x6c, PIN_INPUT, 0) /* (B16) WKUP_GPIO0_5.MCU_MCAN1_RX */ + J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (D13) WKUP_GPIO0_4.MCU_MCAN1_TX */ + >; + }; + + mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x58, PIN_INPUT, 7) /* (B18) WKUP_GPIO0_0 */ + J721E_WKUP_IOPAD(0x40, PIN_INPUT, 7) /* (B17) MCU_SPI0_D1 */ + >; + }; + + mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */ + >; + }; }; &main_pmx0 { @@ -189,6 +244,13 @@ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ >; }; + + main_mcan3_pins_default: main-mcan3-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */ + J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */ + >; + }; }; &main_pmx1 { @@ -394,3 +456,24 @@ &pcie1_ep { num-lanes = <2>; status = "disabled"; }; + +&mcu_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins_default>; + phys = <&transceiver1>; +}; + +&mcu_mcan1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; +}; + +&main_mcan3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan3_pins_default>; + phys = <&transceiver3>; +};