From patchwork Tue Jan 30 07:50:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenglulu X-Patchwork-Id: 193872 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1059642dyb; Mon, 29 Jan 2024 23:51:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IFav/xGvuHywYzo86oxtXM3fMT10cDHszLjSxc6N/an0iZn7/LcQMD016FnXV+fsYxujz/G X-Received: by 2002:a05:620a:4784:b0:783:dcee:77fe with SMTP id dt4-20020a05620a478400b00783dcee77femr7773225qkb.14.1706601079304; Mon, 29 Jan 2024 23:51:19 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706601079; cv=pass; d=google.com; s=arc-20160816; b=xl5PvHCWOYMVuyKmhV7Jip1Os+N5SMu39HrgQafyeqjqVtwbGLyn76ACMTk5ar7+/Y 8OUXWDnuiCzIZTG1mi95VOZq2WWY+MG1ie/1oDC5AiKZNe02xx5yv9oBNOUVqKBM+tV3 09aVJZV+TLWwgcQ7DwtdaULRLr0/L2efrgB7pCPB04qN4GCc1q9z94O3TyjiH19f36cI zh6VM2Zr5kvsO7ODi0nION4ar7qaJSIT1FEKH+szjl5VQLwjKFTKGmSKd1XMoTpxiGXB 6mrhHCdQPmSQiAfk6/wB6T1u98SVP4SabVodaMCYUcG76glEgBCl5RKlqMPw2iO9eWqf oNXw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:arc-filter :dmarc-filter:delivered-to; bh=mu10l151EFPVyP9+VFWiPWTJHeKABdDCO7UFYckuQoo=; fh=wYRiZnn9nDBltyuQH1H/s7FMOEBgw7D5UzXRQ9Hnwic=; b=ikfpETTpYzZXQYBe7id7knXLm1Dou4ifbmgDQO9nkjmBo+4VdZidoe3GD9LrI7RmtF r/NOmGQsa67PhP9/p87+zHArVC3kUFKuzJc/BzrYtcdbBlFK6LdBSfM4WjzQSjgTBcxi nPJ89UCvoR25t+IFv61uNcq2n9gsrtmLJf2FknWB22KnM/oWa9eFXX+tzEbD3LDC4p1t 3lKRclVlsginFfiC8q9WamDPrTk5e0yRQWCRA5BEbgk9tpHEHWBtFNxV2bqcvUNEhB8+ Qho91TFCBu5jLyGdEkx1+OKB8fpqeEiYC73jjctC97/4Yv3M8A7Wa5xVzdeBO/xs8gdL OGYg== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id s5-20020a05620a030500b007840e24d132si606680qkm.463.2024.01.29.23.51.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 23:51:19 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 085973858407 for ; Tue, 30 Jan 2024 07:51:19 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id C5D8C3858C41 for ; Tue, 30 Jan 2024 07:50:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C5D8C3858C41 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C5D8C3858C41 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1706601040; cv=none; b=QZ38sxSXb9oevboCBgsNp+NHxTfyKuQDB04G0uQeNDQv9lKM9bR6UtIcIGQvWG9YvUcDbPvxAqhzinPyPHPMrEgKbOi8oxrVyVgnLkNP9CPHNuzF+9ry/jooYiQsfAZ8SgdNimhk/BtJpirmJGbJBKY92HeLr9GkGAtBLcTeLTo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1706601040; c=relaxed/simple; bh=xOIKLNPBJZkIQYDNWEuhNvrLAfjlMFBt+5oUHdid/cI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=eIg8M7ZJc5oH1s7f40eS75xijQFeyKCm7E5cYiccQhFG21aWsKwouo6h9uAePFPp4svyLvoHi2nK3oTn9cKVObK+bG6JnFQ+jUDEvKFElvasxnhHHMqG6v/ils4iqla1mJKBpBWcHvgMmQbQN2eOs6ffRgTXjk56K1zYymqJhxw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8AxDOtHqrhlOj0IAA--.15197S3; Tue, 30 Jan 2024 15:50:31 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxHs9FqrhlfZknAA--.23672S2; Tue, 30 Jan 2024 15:50:30 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH] LoongArch: Modify the address calculation logic for obtaining array element values through fp. Date: Tue, 30 Jan 2024 15:50:26 +0800 Message-Id: <20240130075026.32103-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxHs9FqrhlfZknAA--.23672S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWxCF1kGF47Zw4fCFykKF4kAFc_yoWrXw1fpr WxA343Ar4DXr12va17G3s0vr15GryfCr4Yga92qryjkrs7WryxCF4kA34Yqa1UK3yUXrW2 qF1xt39ruFW7A3cCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r106r15McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07jUsqXUUUUU= X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789500933179878952 X-GMAIL-MSGID: 1789500933179878952 Modify address calculation logic from (((a x C) + fp) + offset) to ((fp + offset) + a x C). Thereby modifying the register dependencies and optimizing the code. The value of C is 2 4 or 8. The following is the assembly code before and after a loop modification in spec2006 401.bzip: old | new 735 .L71: | 735 .L71: 736 slli.d $r12,$r15,2 | 736 slli.d $r12,$r15,2 737 ldx.w $r13,$r22,$r12 | 737 ldx.w $r13,$r22,$r12 738 addi.d $r15,$r15,-1 | 738 addi.d $r15,$r15,-1 739 slli.w $r16,$r15,0 | 739 slli.w $r16,$r15,0 740 addi.w $r13,$r13,-1 | 740 addi.w $r13,$r13,-1 741 slti $r14,$r13,0 | 741 slti $r14,$r13,0 742 add.w $r12,$r26,$r13 | 742 add.w $r12,$r26,$r13 743 maskeqz $r12,$r12,$r14 | 743 maskeqz $r12,$r12,$r14 744 masknez $r14,$r13,$r14 | 744 masknez $r14,$r13,$r14 745 or $r12,$r12,$r14 | 745 or $r12,$r12,$r14 746 ldx.bu $r14,$r30,$r12 | 746 ldx.bu $r14,$r30,$r12 747 lu12i.w $r13,4096>>12 | 747 alsl.d $r14,$r14,$r18,2 748 ori $r13,$r13,432 | 748 ldptr.w $r13,$r14,0 749 add.d $r13,$r13,$r3 | 749 addi.w $r17,$r13,-1 750 alsl.d $r14,$r14,$r13,2 | 750 stptr.w $r17,$r14,0 751 ldptr.w $r13,$r14,-1968 | 751 slli.d $r13,$r13,2 752 addi.w $r17,$r13,-1 | 752 stx.w $r12,$r22,$r13 753 st.w $r17,$r14,-1968 | 753 ldptr.w $r12,$r19,0 754 slli.d $r13,$r13,2 | 754 blt $r12,$r16,.L71 755 stx.w $r12,$r22,$r13 | 755 .align 4 756 ldptr.w $r12,$r18,-2048 | 756 757 blt $r12,$r16,.L71 | 757 758 .align 4 | 758 This patch is ported from riscv's commit r14-3111. gcc/ChangeLog: * config/loongarch/loongarch.cc (mem_shadd_or_shadd_rtx_p): New function. (loongarch_legitimize_address): Add logical transformation code. --- gcc/config/loongarch/loongarch.cc | 40 +++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index b494040d165..62e74207042 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -3219,6 +3219,22 @@ loongarch_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out) return true; } +/* Helper for riscv_legitimize_address. Given X, return true if it + is a left shift by 1, 2 or 3 positions or a multiply by 2, 4 or 8. + + This respectively represent canonical shift-add rtxs or scaled + memory addresses. */ +static bool +mem_shadd_or_shadd_rtx_p (rtx x) +{ + return ((GET_CODE (x) == ASHIFT + || GET_CODE (x) == MULT) + && CONST_INT_P (XEXP (x, 1)) + && ((GET_CODE (x) == ASHIFT && IN_RANGE (INTVAL (XEXP (x, 1)), 1, 3)) + || (GET_CODE (x) == MULT + && IN_RANGE (exact_log2 (INTVAL (XEXP (x, 1))), 1, 3)))); +} + /* This function is used to implement LEGITIMIZE_ADDRESS. If X can be legitimized in a way that the generic machinery might not expect, return a new address, otherwise return NULL. MODE is the mode of @@ -3242,6 +3258,30 @@ loongarch_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, loongarch_split_plus (x, &base, &offset); if (offset != 0) { + /* Handle (plus (plus (mult (a) (mem_shadd_constant)) (fp)) (C)) case. */ + if (GET_CODE (base) == PLUS && mem_shadd_or_shadd_rtx_p (XEXP (base, 0)) + && IMM12_OPERAND (offset)) + { + rtx index = XEXP (base, 0); + rtx fp = XEXP (base, 1); + + if (REG_P (fp) && REGNO (fp) == VIRTUAL_STACK_VARS_REGNUM) + { + /* If we were given a MULT, we must fix the constant + as we're going to create the ASHIFT form. */ + int shift_val = INTVAL (XEXP (index, 1)); + if (GET_CODE (index) == MULT) + shift_val = exact_log2 (shift_val); + + rtx reg1 = gen_reg_rtx (Pmode); + rtx reg3 = gen_reg_rtx (Pmode); + loongarch_emit_binary (PLUS, reg1, fp, GEN_INT (offset)); + loongarch_emit_binary (PLUS, reg3, gen_rtx_ASHIFT (Pmode, XEXP (index, 0), GEN_INT (shift_val)), reg1); + + return reg3; + } + } + if (!loongarch_valid_base_register_p (base, mode, false)) base = copy_to_mode_reg (Pmode, base); addr = loongarch_add_offset (NULL, base, offset);