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[8.43.85.97]) by mx.google.com with ESMTPS id q1-20020a170906144100b0078da3218b54si8577049ejc.171.2022.11.14.20.38.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 20:38:53 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="eydoCFr/"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9EB2038357A1 for ; Tue, 15 Nov 2022 04:38:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9EB2038357A1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668487132; bh=R4/zVlMsw+hibmYoVwQ+9xUE9Q1E1hEV6+OI2PkO7E0=; h=To:CC:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=eydoCFr/wIIMRWy2ovVj3qKCzb5wilViJSWvqygdqPWxXu2uyhVZEOkqPIrzXKE2u WBw4HrrYBKrSG5w9Gy8rWZaIGrYrFwfpsUzA570O1pRBoAyz0cMVor1LKOrsNt5Ou/ 8VmRokDKufgzzbpqmHLm9NV6k3r2gHg08yoliCls= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id 26132385843D for ; Tue, 15 Nov 2022 04:38:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 26132385843D Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AF4O5Oe029004 for ; Mon, 14 Nov 2022 20:38:06 -0800 Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3kv3q601yu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 14 Nov 2022 20:38:06 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 14 Nov 2022 20:38:04 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 14 Nov 2022 20:38:04 -0800 Received: from linux.marvell.com (unknown [10.69.242.198]) by maili.marvell.com (Postfix) with ESMTP id DD1A53F703F; Mon, 14 Nov 2022 20:38:03 -0800 (PST) To: CC: Andrew Pinski Subject: [PATCH] Remove documentation for MeP Date: Mon, 14 Nov 2022 20:38:01 -0800 Message-ID: <1668487081-9637-1-git-send-email-apinski@marvell.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-Proofpoint-GUID: wv1vf641zUHm__XvOHlyT2tDDpx_l62g X-Proofpoint-ORIG-GUID: wv1vf641zUHm__XvOHlyT2tDDpx_l62g X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-14_15,2022-11-11_01,2022-06-22_01 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: apinski--- via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: apinski@marvell.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749535565172191842?= X-GMAIL-MSGID: =?utf-8?q?1749535565172191842?= From: Andrew Pinski MeP support was removed in r7-1614-g0609abdad81e26 but it looks like the documentation for the target was missed. Committed as obvious after doing "make html" to make sure the documentation is fine. Thanks, Andrew Pinski gcc/ChangeLog: * doc/extend.texi: Remove MeP documentation. * doc/invoke.texi: Remove MeP Options documentation. --- gcc/doc/extend.texi | 190 ---------------------------------------------------- gcc/doc/invoke.texi | 171 ---------------------------------------------- 2 files changed, 361 deletions(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 8da0db9..ca84f3a 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -2542,7 +2542,6 @@ GCC plugins may provide their own attributes. * M32R/D Function Attributes:: * m68k Function Attributes:: * MCORE Function Attributes:: -* MeP Function Attributes:: * MicroBlaze Function Attributes:: * Microsoft Windows Function Attributes:: * MIPS Function Attributes:: @@ -5392,45 +5391,6 @@ basic @code{asm} and C code may appear to work, they cannot be depended upon to work reliably and are not supported. @end table -@node MeP Function Attributes -@subsection MeP Function Attributes - -These function attributes are supported by the MeP back end: - -@table @code -@item disinterrupt -@cindex @code{disinterrupt} function attribute, MeP -On MeP targets, this attribute causes the compiler to emit -instructions to disable interrupts for the duration of the given -function. - -@item interrupt -@cindex @code{interrupt} function attribute, MeP -Use this attribute to indicate -that the specified function is an interrupt handler. The compiler generates -function entry and exit sequences suitable for use in an interrupt handler -when this attribute is present. - -@item near -@cindex @code{near} function attribute, MeP -This attribute causes the compiler to assume the called -function is close enough to use the normal calling convention, -overriding the @option{-mtf} command-line option. - -@item far -@cindex @code{far} function attribute, MeP -On MeP targets this causes the compiler to use a calling convention -that assumes the called function is too far away for the built-in -addressing modes. - -@item vliw -@cindex @code{vliw} function attribute, MeP -The @code{vliw} attribute tells the compiler to emit -instructions in VLIW mode instead of core mode. Note that this -attribute is not allowed unless a VLIW coprocessor has been configured -and enabled through command-line options. -@end table - @node MicroBlaze Function Attributes @subsection MicroBlaze Function Attributes @@ -7336,7 +7296,6 @@ attributes. * IA-64 Variable Attributes:: * LoongArch Variable Attributes:: * M32R/D Variable Attributes:: -* MeP Variable Attributes:: * Microsoft Windows Variable Attributes:: * MSP430 Variable Attributes:: * Nvidia PTX Variable Attributes:: @@ -8182,70 +8141,6 @@ Medium and large model objects may live anywhere in the 32-bit address space addresses). @end table -@node MeP Variable Attributes -@subsection MeP Variable Attributes - -The MeP target has a number of addressing modes and busses. The -@code{near} space spans the standard memory space's first 16 megabytes -(24 bits). The @code{far} space spans the entire 32-bit memory space. -The @code{based} space is a 128-byte region in the memory space that -is addressed relative to the @code{$tp} register. The @code{tiny} -space is a 65536-byte region relative to the @code{$gp} register. In -addition to these memory regions, the MeP target has a separate 16-bit -control bus which is specified with @code{cb} attributes. - -@table @code - -@item based -@cindex @code{based} variable attribute, MeP -Any variable with the @code{based} attribute is assigned to the -@code{.based} section, and is accessed with relative to the -@code{$tp} register. - -@item tiny -@cindex @code{tiny} variable attribute, MeP -Likewise, the @code{tiny} attribute assigned variables to the -@code{.tiny} section, relative to the @code{$gp} register. - -@item near -@cindex @code{near} variable attribute, MeP -Variables with the @code{near} attribute are assumed to have addresses -that fit in a 24-bit addressing mode. This is the default for large -variables (@code{-mtiny=4} is the default) but this attribute can -override @code{-mtiny=} for small variables, or override @code{-ml}. - -@item far -@cindex @code{far} variable attribute, MeP -Variables with the @code{far} attribute are addressed using a full -32-bit address. Since this covers the entire memory space, this -allows modules to make no assumptions about where variables might be -stored. - -@item io -@cindex @code{io} variable attribute, MeP -@itemx io (@var{addr}) -Variables with the @code{io} attribute are used to address -memory-mapped peripherals. If an address is specified, the variable -is assigned that address, else it is not assigned an address (it is -assumed some other module assigns an address). Example: - -@smallexample -int timer_count __attribute__((io(0x123))); -@end smallexample - -@item cb -@itemx cb (@var{addr}) -@cindex @code{cb} variable attribute, MeP -Variables with the @code{cb} attribute are used to access the control -bus, using special instructions. @code{addr} indicates the control bus -address. Example: - -@smallexample -int cpu_clock __attribute__((cb(0x123))); -@end smallexample - -@end table - @node Microsoft Windows Variable Attributes @subsection Microsoft Windows Variable Attributes @@ -8484,7 +8379,6 @@ attributes. * ARC Type Attributes:: * ARM Type Attributes:: * BPF Type Attributes:: -* MeP Type Attributes:: * PowerPC Type Attributes:: * x86 Type Attributes:: @end menu @@ -9069,18 +8963,6 @@ of that type. The behavior is equivalent to the programmer manually wrapping every such access with @code{__builtin_preserve_access_index}. -@node MeP Type Attributes -@subsection MeP Type Attributes - -@cindex @code{based} type attribute, MeP -@cindex @code{tiny} type attribute, MeP -@cindex @code{near} type attribute, MeP -@cindex @code{far} type attribute, MeP -Many of the MeP variable attributes may be applied to types as well. -Specifically, the @code{based}, @code{tiny}, @code{near}, and -@code{far} attributes may be applied to either. The @code{io} and -@code{cb} attributes may not be applied to types. - @node PowerPC Type Attributes @subsection PowerPC Type Attributes @@ -23599,7 +23481,6 @@ information. * AArch64 Pragmas:: * ARM Pragmas:: * M32C Pragmas:: -* MeP Pragmas:: * PRU Pragmas:: * RS/6000 and PowerPC Pragmas:: * S/390 Pragmas:: @@ -23681,77 +23562,6 @@ char port3; @end table -@node MeP Pragmas -@subsection MeP Pragmas - -@table @code - -@item custom io_volatile (on|off) -@cindex pragma, custom io_volatile -Overrides the command-line option @code{-mio-volatile} for the current -file. Note that for compatibility with future GCC releases, this -option should only be used once before any @code{io} variables in each -file. - -@item GCC coprocessor available @var{registers} -@cindex pragma, coprocessor available -Specifies which coprocessor registers are available to the register -allocator. @var{registers} may be a single register, register range -separated by ellipses, or comma-separated list of those. Example: - -@smallexample -#pragma GCC coprocessor available $c0...$c10, $c28 -@end smallexample - -@item GCC coprocessor call_saved @var{registers} -@cindex pragma, coprocessor call_saved -Specifies which coprocessor registers are to be saved and restored by -any function using them. @var{registers} may be a single register, -register range separated by ellipses, or comma-separated list of -those. Example: - -@smallexample -#pragma GCC coprocessor call_saved $c4...$c6, $c31 -@end smallexample - -@item GCC coprocessor subclass '(A|B|C|D)' = @var{registers} -@cindex pragma, coprocessor subclass -Creates and defines a register class. These register classes can be -used by inline @code{asm} constructs. @var{registers} may be a single -register, register range separated by ellipses, or comma-separated -list of those. Example: - -@smallexample -#pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6 - -asm ("cpfoo %0" : "=B" (x)); -@end smallexample - -@item GCC disinterrupt @var{name} , @var{name} @dots{} -@cindex pragma, disinterrupt -For the named functions, the compiler adds code to disable interrupts -for the duration of those functions. If any functions so named -are not encountered in the source, a warning is emitted that the pragma is -not used. Examples: - -@smallexample -#pragma disinterrupt foo -#pragma disinterrupt bar, grill -int foo () @{ @dots{} @} -@end smallexample - -@item GCC call @var{name} , @var{name} @dots{} -@cindex pragma, call -For the named functions, the compiler always uses a register-indirect -call model when calling the named functions. Examples: - -@smallexample -extern int foo (); -#pragma call foo -@end smallexample - -@end table - @node PRU Pragmas @subsection PRU Pragmas diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 78ac644..12be55f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1058,13 +1058,6 @@ Objective-C and Objective-C++ Dialects}. -mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol -mlittle-endian -mbig-endian -m210 -m340 -mstack-increment} -@emph{MeP Options} -@gccoptlist{-mabsdiff -mall-opts -maverage -mbased=@var{n} -mbitops @gol --mc=@var{n} -mclip -mconfig=@var{name} -mcop -mcop32 -mcop64 -mivc2 @gol --mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax @gol --mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf @gol --mtiny=@var{n}} - @emph{MicroBlaze Options} @gccoptlist{-msoft-float -mhard-float -msmall-divides -mcpu=@var{cpu} @gol -mmemcpy -mxl-soft-mul -mxl-soft-div -mxl-barrel-shift @gol @@ -19719,7 +19712,6 @@ platform. * M32R/D Options:: * M680x0 Options:: * MCore Options:: -* MeP Options:: * MicroBlaze Options:: * MIPS Options:: * MMIX Options:: @@ -26015,169 +26007,6 @@ value is 0x1000. @end table -@node MeP Options -@subsection MeP Options -@cindex MeP options - -@table @gcctabopt - -@item -mabsdiff -@opindex mabsdiff -Enables the @code{abs} instruction, which is the absolute difference -between two registers. - -@item -mall-opts -@opindex mall-opts -Enables all the optional instructions---average, multiply, divide, bit -operations, leading zero, absolute difference, min/max, clip, and -saturation. - - -@item -maverage -@opindex maverage -Enables the @code{ave} instruction, which computes the average of two -registers. - -@item -mbased=@var{n} -@opindex mbased= -Variables of size @var{n} bytes or smaller are placed in the -@code{.based} section by default. Based variables use the @code{$tp} -register as a base register, and there is a 128-byte limit to the -@code{.based} section. - -@item -mbitops -@opindex mbitops -Enables the bit operation instructions---bit test (@code{btstm}), set -(@code{bsetm}), clear (@code{bclrm}), invert (@code{bnotm}), and -test-and-set (@code{tas}). - -@item -mc=@var{name} -@opindex mc= -Selects which section constant data is placed in. @var{name} may -be @samp{tiny}, @samp{near}, or @samp{far}. - -@item -mclip -@opindex mclip -Enables the @code{clip} instruction. Note that @option{-mclip} is not -useful unless you also provide @option{-mminmax}. - -@item -mconfig=@var{name} -@opindex mconfig= -Selects one of the built-in core configurations. Each MeP chip has -one or more modules in it; each module has a core CPU and a variety of -coprocessors, optional instructions, and peripherals. The -@code{MeP-Integrator} tool, not part of GCC, provides these -configurations through this option; using this option is the same as -using all the corresponding command-line options. The default -configuration is @samp{default}. - -@item -mcop -@opindex mcop -Enables the coprocessor instructions. By default, this is a 32-bit -coprocessor. Note that the coprocessor is normally enabled via the -@option{-mconfig=} option. - -@item -mcop32 -@opindex mcop32 -Enables the 32-bit coprocessor's instructions. - -@item -mcop64 -@opindex mcop64 -Enables the 64-bit coprocessor's instructions. - -@item -mivc2 -@opindex mivc2 -Enables IVC2 scheduling. IVC2 is a 64-bit VLIW coprocessor. - -@item -mdc -@opindex mdc -Causes constant variables to be placed in the @code{.near} section. - -@item -mdiv -@opindex mdiv -Enables the @code{div} and @code{divu} instructions. - -@item -meb -@opindex meb -Generate big-endian code. - -@item -mel -@opindex mel -Generate little-endian code. - -@item -mio-volatile -@opindex mio-volatile -Tells the compiler that any variable marked with the @code{io} -attribute is to be considered volatile. - -@item -ml -@opindex ml -Causes variables to be assigned to the @code{.far} section by default. - -@item -mleadz -@opindex mleadz -Enables the @code{leadz} (leading zero) instruction. - -@item -mm -@opindex mm -Causes variables to be assigned to the @code{.near} section by default. - -@item -mminmax -@opindex mminmax -Enables the @code{min} and @code{max} instructions. - -@item -mmult -@opindex mmult -Enables the multiplication and multiply-accumulate instructions. - -@item -mno-opts -@opindex mno-opts -Disables all the optional instructions enabled by @option{-mall-opts}. - -@item -mrepeat -@opindex mrepeat -Enables the @code{repeat} and @code{erepeat} instructions, used for -low-overhead looping. - -@item -ms -@opindex ms -Causes all variables to default to the @code{.tiny} section. Note -that there is a 65536-byte limit to this section. Accesses to these -variables use the @code{%gp} base register. - -@item -msatur -@opindex msatur -Enables the saturation instructions. Note that the compiler does not -currently generate these itself, but this option is included for -compatibility with other tools, like @code{as}. - -@item -msdram -@opindex msdram -Link the SDRAM-based runtime instead of the default ROM-based runtime. - -@item -msim -@opindex msim -Link the simulator run-time libraries. - -@item -msimnovec -@opindex msimnovec -Link the simulator runtime libraries, excluding built-in support -for reset and exception vectors and tables. - -@item -mtf -@opindex mtf -Causes all functions to default to the @code{.far} section. Without -this option, functions default to the @code{.near} section. - -@item -mtiny=@var{n} -@opindex mtiny= -Variables that are @var{n} bytes or smaller are allocated to the -@code{.tiny} section. These variables use the @code{$gp} base -register. The default for this option is 4, but note that there's a -65536-byte limit to the @code{.tiny} section. - -@end table - @node MicroBlaze Options @subsection MicroBlaze Options @cindex MicroBlaze Options