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b=RODS774onD7Q2Ed1k0w52jLNPH5kgjmsAPo8dyaXPmtrgNXB0MT+kRc8oP3pC3de9 vOvaU3gjzTMCU/ihlARbPVQoE8j1bZ4B4lbtPYMuBhEaYBTdQ3B2vH2sI67f3yf40w FD+ZpieSyTQiRs8meTzZimPgi63lKq/35lZrHDD0= From: Luca Weiss Date: Thu, 25 Jan 2024 22:56:25 +0100 Subject: [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240125-msm8953-gpu-v1-1-f6493a5951f3@z3ntu.xyz> References: <20240125-msm8953-gpu-v1-0-f6493a5951f3@z3ntu.xyz> In-Reply-To: <20240125-msm8953-gpu-v1-0-f6493a5951f3@z3ntu.xyz> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Lypak Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1436; i=luca@z3ntu.xyz; h=from:subject:message-id; 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Signed-off-by: Vladimir Lypak --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index dcb5c98b793c..91d083871ab0 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -1046,6 +1046,37 @@ mdss_dsi1_phy: phy@1a96400 { }; }; + gpu_iommu: iommu@1c48000 { + compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2"; + ranges = <0 0x01c48000 0x8000>; + + clocks = <&gcc GCC_OXILI_AHB_CLK>, + <&gcc GCC_BIMC_GFX_CLK>; + clock-names = "iface", "bus"; + + power-domains = <&gcc OXILI_CX_GDSC>; + + qcom,iommu-secure-id = <18>; + + #address-cells = <1>; + #iommu-cells = <1>; + #size-cells = <1>; + + /* gfx3d_user */ + iommu-ctx@0 { + compatible = "qcom,msm-iommu-v2-ns"; + reg = <0x0000 0x1000>; + interrupts = ; + }; + + /* gfx3d_secure */ + iommu-ctx@2000 { + compatible = "qcom,msm-iommu-v2-sec"; + reg = <0x2000 0x1000>; + interrupts = ; + }; + }; + apps_iommu: iommu@1e20000 { compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1"; ranges = <0 0x01e20000 0x20000>; From patchwork Thu Jan 25 21:56:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 192787 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2395:b0:106:343:edcb with SMTP id gw21csp160046dyb; Fri, 26 Jan 2024 13:30:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IGDCRv626PAWWbhzHNDCfH2vJ0P4PrFao+sr1SfJwQio7LCUn8FuX49rN3V3D6/xRAkSXmA X-Received: by 2002:ac8:7dc2:0:b0:42a:87b0:ee7a with SMTP id c2-20020ac87dc2000000b0042a87b0ee7amr586086qte.40.1706304614132; Fri, 26 Jan 2024 13:30:14 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706304614; cv=pass; d=google.com; s=arc-20160816; b=HkzYOUkmVOMKf96p4K42sObPsc6D66jvwmdtdCgSUK//C/NWJLZ8/wbZ4LXXCA36QS QKiKc4iwVQuhC0Kzb9baw/uUvW5pbe0LjYPh1sMaMw+IxnDloc0uEGuMcrJTYXN3zUB4 PEg8UdoegZiPQ5mEQasR6e8cH9w0lEn3VPaJqqX2/VbiTkHY3+bxbvLPYvc9gJT9+h6x eY481mMBfJNHrRjFL89g27EykXz3tQBEVYgqmwfQNHdmWluAyav4VBU7Bf0xR8aovxna 7K0FdVEC2O7l4HGpSJHHXszgdNN8da6DUXb3eYdD89rNntsR9RsycShWtV4YFir1E7H7 5Snw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=/a3C2uqwCaEjaLtML2UNGANb8wE4gJeqwvM4Tmf+Hxo=; fh=ytyuSPC52TUElrA/mZen9kyWaXz91Oh2mpXiN50EEhI=; b=dsgoPUp2FM5a3QzDjQbQ0h5NFX3Y2t8dxy+L3l9DRTFVpwGZQrZkMI91v+d5y8EHFX xpwmZj8C6Lt4jvxYSQlbV9U4V+CNAHNd3s7XniU6TI/Cgjt72CR+W9rB7V2sWnxfEuBR sppmr3B97AdiGDNTypqOrfL4uZisATDW1PiLNgznpj/FbYGYWDPb+E6Z05KCU8mya4gm Ez7PEcLaTXbZXMsJSolq/mpMDQpGYmcdiiPX23GHplb2n0y8N2AZOWVsJ4ZUlkNZG3CE um+2ApG3z3ovwGeI8wct3FiHgnXn0dHyFbwr28qoGtVLxZRZjvEwb+g/zZ1kJGgWepOi 3XpA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@z3ntu.xyz header.s=s1 header.b=FWqk6gH4; arc=pass (i=1 spf=pass spfdomain=z3ntu.xyz dkim=pass dkdomain=z3ntu.xyz dmarc=pass fromdomain=z3ntu.xyz); spf=pass (google.com: domain of linux-kernel+bounces-39340-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-39340-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=z3ntu.xyz Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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b=FWqk6gH4SXpC2psEycIdHU/CVfUyW4vur7C0aJS36GTNhjIxuWiR8IBAXm4rq1Wkv oq02yrBUliIW/ZInetRbZAtE4n7ebdy5p5leoKifisJ9lX1wJlm48DpgEvkbArc8mE x7l49g5ey8AtsnUuaYUQSpHqZzvyZtYBE0kStd6U= From: Luca Weiss Date: Thu, 25 Jan 2024 22:56:26 +0100 Subject: [PATCH RFC 2/2] arm64: dts: qcom: msm8953: Add GPU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240125-msm8953-gpu-v1-2-f6493a5951f3@z3ntu.xyz> References: <20240125-msm8953-gpu-v1-0-f6493a5951f3@z3ntu.xyz> In-Reply-To: <20240125-msm8953-gpu-v1-0-f6493a5951f3@z3ntu.xyz> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Lypak Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=5530; i=luca@z3ntu.xyz; h=from:subject:message-id; bh=uxlKtlyhduTvOfdocjjZ8QA65zmTpmpXVNCWTg8SbYg=; b=owEBbQKS/ZANAwAIAXLYQ7idTddWAcsmYgBlstkLT23pPvklj9ZVYTuNZCeUf+xI5SlD7A/Pi NF34HTMp4SJAjMEAAEIAB0WIQQ5utIvCCzakboVj/py2EO4nU3XVgUCZbLZCwAKCRBy2EO4nU3X VmSeD/9GZ5NSNz0lBhI9KRyrbfH5Zm43r2g8/U70M2nZlrcHIVT1+/3d/1QcX2KOLpobK3lqx4z EnnyYuK74Qh+dqOdcepbvrNDs7uV3hUOGYSDOk2ULexLoS1JAU8b4Pb3LkQPQOJTtuqXhtjY95h mRaBGQLrFiOrEQbJbF5GLoXkhkhh96ezMqB74otxvdMSSBxKzGQtljh1GdXvSSwSwsvSR0XSs1/ beQIlsZr4+FnffcySH3fom6BO87IEop3O8HpUPUJc64x5lKC4O7b5Bx/F7D0WOb8AK2Q+ass52i BtM3k/iQaKkGl+7uNJdP4uePPhQZWQPG5ANc4OPAbj/GFfapYeY+4n90wCjVBnYMl1mOYeNJhKL kKZtQTVBHFoWkWTHNLrTtD3S48czekxbDJ8yhuWjP0wy9i2YBD9eSOOme0Fcat9bb6W4YE1xEcx wPRuzPlQ7n4xgyL01OwTbclzjitaw2U3D7KMfdbR+Orin/Nmgh1Swq65A/XmahDu5A6WZqkwXRj dLbRs7sKaWG3H6leXONwKFN/I7fovRZDah3NzhU3dMeecrAWXhmEOMg8R6j295L/Ae1bLKSG7tF SmjuD86vTn1wJFLYgWohjGQ8TlpvmehEPzUEWKXYdvssX1zf5ktTnV1W3GRcei3cjqTrtnWJpeT YO8kPGWAPjO6KSg== X-Developer-Key: i=luca@z3ntu.xyz; a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789102974942265904 X-GMAIL-MSGID: 1789190066814235913 From: Vladimir Lypak Add the GPU node for the Adreno 506 found on this family of SoCs. The clock speeds are a bit different per SoC variant, SDM450 maxes out at 600MHz while MSM8953 (= SDM625) goes up to 650MHz and SDM632 goes up to 725MHz. To achieve this, create a new sdm450.dtsi to hold the 600MHz OPP and use the new dtsi for sdm450-motorola-ali. Signed-off-by: Vladimir Lypak Co-developed-by: Luca Weiss Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 115 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 2 +- arch/arm64/boot/dts/qcom/sdm450.dtsi | 14 +++ arch/arm64/boot/dts/qcom/sdm632.dtsi | 8 ++ 4 files changed, 138 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 91d083871ab0..1fe0c0c4fd15 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -1046,6 +1046,94 @@ mdss_dsi1_phy: phy@1a96400 { }; }; + gpu: gpu@1c00000 { + compatible = "qcom,adreno-506.0", "qcom,adreno"; + reg = <0x01c00000 0x40000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = ; + + clocks = <&gcc GCC_OXILI_GFX3D_CLK>, + <&gcc GCC_OXILI_AHB_CLK>, + <&gcc GCC_BIMC_GFX_CLK>, + <&gcc GCC_BIMC_GPU_CLK>, + <&gcc GCC_OXILI_TIMER_CLK>, + <&gcc GCC_OXILI_AON_CLK>; + clock-names = "core", + "iface", + "mem_iface", + "alt_mem_iface", + "rbbmtimer", + "alwayson"; + power-domains = <&gcc OXILI_GX_GDSC>; + + iommus = <&gpu_iommu 0>; + operating-points-v2 = <&gpu_opp_table>; + + #cooling-cells = <2>; + + status = "disabled"; + + zap-shader { + memory-region = <&zap_shader_region>; + }; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-133300000 { + opp-hz = /bits/ 64 <133300000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-216000000 { + opp-hz = /bits/ 64 <216000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-320000000 { + opp-hz = /bits/ 64 <320000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-510000000 { + opp-hz = /bits/ 64 <510000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_nom>; + }; + + opp-560000000 { + opp-hz = /bits/ 64 <560000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_nom_plus>; + }; + + /* + * This opp is only available on msm8953 and + * sdm632, the max for sdm450 is 600MHz. + */ + opp-650000000 { + opp-hz = /bits/ 64 <650000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_turbo>; + }; + }; + }; + gpu_iommu: iommu@1c48000 { compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2"; ranges = <0 0x01c48000 0x8000>; @@ -2045,6 +2133,33 @@ map0 { }; }; }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 15>; + + trips { + gpu_alert: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu_crit: crit { + temperature = <90000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_alert>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; }; timer { diff --git a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts index 362be5719dd2..e27f3c5d5bba 100644 --- a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts +++ b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts @@ -4,7 +4,7 @@ */ /dts-v1/; -#include "msm8953.dtsi" +#include "sdm450.dtsi" #include "pm8953.dtsi" #include "pmi8950.dtsi" diff --git a/arch/arm64/boot/dts/qcom/sdm450.dtsi b/arch/arm64/boot/dts/qcom/sdm450.dtsi new file mode 100644 index 000000000000..b222aeb459a3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm450.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2023, Luca Weiss */ + +#include "msm8953.dtsi" + +&gpu_opp_table { + /delete-node/ opp-650000000; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_turbo>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi index 645b9f6a801f..95b025ea260b 100644 --- a/arch/arm64/boot/dts/qcom/sdm632.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm632.dtsi @@ -79,3 +79,11 @@ &CPU7 { compatible = "qcom,kryo250"; capacity-dmips-mhz = <1980>; }; + +&gpu_opp_table { + opp-725000000 { + opp-hz = /bits/ 64 <725000000>; + opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_turbo>; + }; +};