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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Christian Marangi Cc: stable@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] net: stmmac: do not clear TBS enable bit on link up/down Date: Fri, 26 Jan 2024 10:10:41 +0100 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Authenticated-Sender: esben@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.10/27165/Thu Jan 25 10:51:15 2024) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789152143606424728 X-GMAIL-MSGID: 1789152143606424728 With the dma conf being reallocated on each call to stmmac_open(), any information in there is lost, unless we specifically handle it. The STMMAC_TBS_EN bit is set when adding an etf qdisc, and the etf qdisc therefore would stop working when link was set down and then back up. Fixes: ba39b344e924 ("net: ethernet: stmicro: stmmac: generate stmmac dma conf before open") Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b334eb16da23..25519952f754 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3932,6 +3932,9 @@ static int __stmmac_open(struct net_device *dev, priv->rx_copybreak = STMMAC_RX_COPYBREAK; buf_sz = dma_conf->dma_buf_sz; + for (int i = 0; i < MTL_MAX_TX_QUEUES; i++) + if (priv->dma_conf.tx_queue[i].tbs & STMMAC_TBS_EN) + dma_conf->tx_queue[i].tbs = priv->dma_conf.tx_queue[i].tbs; memcpy(&priv->dma_conf, dma_conf, sizeof(*dma_conf)); stmmac_reset_queues_param(priv); From patchwork Fri Jan 26 09:10:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Esben Haabendal X-Patchwork-Id: 192492 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:e09d:b0:103:945f:af90 with SMTP id gm29csp558772dyb; Fri, 26 Jan 2024 02:09:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMtANWW8KJ2c2O3b+f/VWIbFEW3EowVN24Wwh4WxfguknqViZZPumvaqepeRm/xPVKo0za X-Received: by 2002:a05:620a:166d:b0:783:850a:d1a6 with SMTP id d13-20020a05620a166d00b00783850ad1a6mr1149349qko.148.1706263773821; Fri, 26 Jan 2024 02:09:33 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706263773; cv=pass; d=google.com; s=arc-20160816; b=0wMOR0wGd+fapNJvNEPTEMfzsDfRTjpAn4NjFpEUqr1Qxrx87gShH/Ws9zDA+Xp4oG BacP3AwNRGTZIGaS4ojfumANnsHx6IuDXoZ8zuQ7Cl0kRGEQHLkpUPJGxhzJWnY/WVp/ 7LIIsYSmVH3oR198wTc/gvmiMTRS0yXgjxFZc/QGpzRbJUpvkUmuMOmRL49nQ4DnhJtj X5FB8ioEuWW+EgOsLrF9j6W8FhiKRmvYVGBjPRDNYIhHtG6a0/hVq/fCP1kEtxAtdQrC tZhqrbseJQXicr0KTODwBVEA0NbZJ/k8OgODEZrHmNSF9tqqHK8kjsp+gaezFALHktiQ BGwg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=PfIWJgaCYljkJrkeOSurtuPSrNuyp8EvqXe2SqiBP2U=; fh=mSt/Kla1DEFTfmMWzlsJaGgI8Rw50ePHydFT8KiSZRU=; b=e4QMI6cCkRZlQ17leo/+V01FP3iGRSdlI/Ag+DF8aIG4h3G1kT4NiwX5S/UghPxzVd JeB6nK2/sUInIVxpxUT4P51hCj6f7lIwF90c7PVZIoDgXcvq1PPvmtfREe4jK39yDTq2 0nL+cIjWt0QNehM6cdmsU6CJejERwi07g82Cf2VZlMEi2OvuLpDJw8JJvTcLzaA2SDg3 LDJYSTk8E4N2NWJtsibObyE8bus0jYHz+4FHxyqGdoH+73bpq7Hxuetgpp1p1Cq8zL04 3aJoc3QjTvSZ6CPsmcb1X0SI9kQAtELOQ3oQUhJNpBW6GJjAV6qRVSMXU9uSsGY9OrdZ XzZw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=FOAZbZQB; arc=pass (i=1 spf=pass spfdomain=geanix.com dkim=pass dkdomain=geanix.com dmarc=pass fromdomain=geanix.com); spf=pass (google.com: domain of linux-kernel+bounces-39896-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-39896-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Maxime Coquelin Cc: Rohan G Thomas , "Abhishek Chauhan (ABC)" , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] net: stmmac: dwmac-imx: set TSO/TBS TX queues default settings Date: Fri, 26 Jan 2024 10:10:42 +0100 Message-ID: <379f79687ca4a7d0394a04d14fb3890ce257e706.1706256158.git.esben@geanix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Authenticated-Sender: esben@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.10/27165/Thu Jan 25 10:51:15 2024) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789147242808009045 X-GMAIL-MSGID: 1789147242808009045 TSO and TBS cannot coexist. For now we set i.MX Ethernet QOS controller to use the first TX queue with TSO and the rest for TBS. TX queues with TBS can support etf qdisc hw offload. Signed-off-by: Esben Haabendal Reviewed-by: Kurt Kanzenbach Reviewed-by: Vadim Fedorenko --- drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c index 8f730ada71f9..6b65420e11b5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c @@ -353,6 +353,10 @@ static int imx_dwmac_probe(struct platform_device *pdev) if (data->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY) plat_dat->flags |= STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY; + /* Default TX Q0 to use TSO and rest TXQ for TBS */ + for (int i = 1; i < plat_dat->tx_queues_to_use; i++) + plat_dat->tx_queues_cfg[i].tbs_en = 1; + plat_dat->host_dma_width = dwmac->ops->addr_width; plat_dat->init = imx_dwmac_init; plat_dat->exit = imx_dwmac_exit;