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Fri, 26 Jan 2024 00:40:41 -0800 (PST) Received: from localhost ([102.140.209.237]) by smtp.gmail.com with ESMTPSA id j11-20020a5d618b000000b003393592ef8dsm753877wru.54.2024.01.26.00.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 00:40:41 -0800 (PST) Date: Fri, 26 Jan 2024 11:40:37 +0300 From: Dan Carpenter To: Niklas Cassel Cc: Jingoo Han , Gustavo Pimentel , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?q?Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org Subject: [PATCH v5 1/2] PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq() Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline X-Mailer: git-send-email haha only kidding X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789144378907769365 X-GMAIL-MSGID: 1789144378907769365 The "msg_addr" variable is u64. However, the "aligned_offset" is an unsigned int. This means that when the code does: msg_addr &= ~aligned_offset; it will unintentionally zero out the high 32 bits. Use ALIGN_DOWN() to do the alignment instead. Cc: stable@vger.kernel.org Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support") Signed-off-by: Dan Carpenter Reviewed-by: Niklas Cassel Reviewed-by: Ilpo Järvinen Reviewed-by: Manivannan Sadhasivam --- v5: Add the #include. v4: Add stable and r-b from Niklas v3: Use ALIGN_DOWN() v2: fix typo in commit message drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 5befed2dc02b..d6b66597101e 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -6,6 +6,7 @@ * Author: Kishon Vijay Abraham I */ +#include #include #include #include @@ -551,7 +552,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, } aligned_offset = msg_addr & (epc->mem->window.page_size - 1); - msg_addr &= ~aligned_offset; + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, epc->mem->window.page_size); if (ret) From patchwork Fri Jan 26 08:41:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dan Carpenter X-Patchwork-Id: 192476 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:e09d:b0:103:945f:af90 with SMTP id gm29csp544844dyb; Fri, 26 Jan 2024 01:34:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IG5dAzpXjyCdaYAOeMH4A53okaFoSA51iv6VXFnwDyu+q+G3bM5VPo87Jp82NWMlaf/uwUD X-Received: by 2002:a05:6a20:8d26:b0:19c:7f54:512e with SMTP id q38-20020a056a208d2600b0019c7f54512emr711159pzi.49.1706261699027; Fri, 26 Jan 2024 01:34:59 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706261699; cv=pass; d=google.com; s=arc-20160816; b=oCbhGVsHTZgeyvfgzP0rn/6CuHRPESovnItIQ444kRzc/c49VAVKnKgmjh+kpYXsmZ HHyMJIv33mB/SXESkBWjyzFHbtCVx0dEp6eENnT8DOYC4qGv0/VQ2+nuhFvJ7pKzRi09 mWcjupoMxxQ/ZpoZe6rNDXaxRkU9sjIlQN48UTwOhdnnNrA7NFeH7lY1TakNrGOB6s7+ R7g//VeCQvRsvsRB+UO1BxSF1dlZPffKdFG3PVTtvFbbtivuCrXynZgZfVsPZ8W7s5So 1vz+91nd6x7bDuvSyhXAZQIVTX//TetiKNdvArGYFurmqyfLK7sGaTuRLY0GucrA08I5 D/kw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :message-id:subject:cc:to:from:date:dkim-signature; bh=XX7Apx6LKiP4Pc42nzu4TYMSpS+o60Wt9NvNj/zb+0Q=; fh=eXzY3uCod0uoUhoSFH26hwNyKgz3imtHgoKrWTV58bE=; b=Zav7BNFYoyWdk6fL7IUJYoKwnlrmOBmvlGGA+gYfnzXxS48o60c5I3WfG3cVjWqId2 67gdvKZQlMAwFmzzIK/kJE/qqO8he6eQ44HwjCm+f9afH79melxMA6KypWltQRjTz7jv ZWVcjl+cnrADUbYrwMWZlF7Jr6kJxwYBdFGWpYq/afnf+0+k+9dU4a5m4ysdW/KiNejU ObqsZVvf2xF+StSJioUuhBu/U+fq7wBofKesp0Qsdn68UxfW9PZUYvmuhwV1Q7hWWPY0 cvPgFGsEdpqUIfyZRft2HLRpU+lYOiU5Yze49U/GqmwUxnzXRsqDt34KHNA4Blb9SmuL ai4A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CMoWsR0b; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-39783-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-39783-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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b=il2xocr6d2EAfIJSuA+jq7AXxjJVxKiQDssQh6e5y9UBzQtxBPsk2hZPx1yzZyO+xZ VVWECv912+l5eZgVQqBzWKR6P0NJWK4O7eOjcxLcl9gZVOXwROd+NtIDOO28KCC6+f8D uNuogTSDBhiHtyn52AIwWxwWDuSxsUC1GCNLWeub6XVvZDGgGDCLfpu5vh86vs92FP1z y7/T+C+CFA/tv/DHZ11abH7cXpDPI0RLz7FYCYPo6Iv7YXhUX8tMPmG6zXUXMmSL7sht xoA6zmxzlTcRv1AKfb4BUm9xVGRsn0skFXsxOS2Fv5g3udBnCGULnZimciTlVRnBppy0 9r2w== X-Gm-Message-State: AOJu0Yw26gqvB+xVHXvdskiudFNTtX2HW5AQKkceZvhRmYy38y8p8Lc2 HUckN13qsg86IPfaudIlYPWlPf7BjZeA/UriSv0vk/WjnHiRn+ft1GKGvInlD8I= X-Received: by 2002:a1c:721a:0:b0:40e:a555:803d with SMTP id n26-20020a1c721a000000b0040ea555803dmr303589wmc.74.1706258464813; Fri, 26 Jan 2024 00:41:04 -0800 (PST) Received: from localhost ([102.140.209.237]) by smtp.gmail.com with ESMTPSA id o7-20020a5d6847000000b00339272c885csm750140wrw.87.2024.01.26.00.41.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 00:41:04 -0800 (PST) Date: Fri, 26 Jan 2024 11:41:01 +0300 From: Dan Carpenter To: Jingoo Han Cc: Gustavo Pimentel , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?q?Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org Subject: [PATCH v5 2/2] PCI: dwc: Cleanup in dw_pcie_ep_raise_msi_irq() Message-ID: <184097e0-c728-42c7-9e8a-556bd33fb612@moroto.mountain> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email haha only kidding X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789145066951663744 X-GMAIL-MSGID: 1789145066951663744 I recently changed the alignment code in dw_pcie_ep_raise_msix_irq(). The code in dw_pcie_ep_raise_msi_irq() is similar so update it to match as well, just for consistency. (No effect on runtime, just a cleanup). Signed-off-by: Dan Carpenter Reviewed-by: Niklas Cassel Reviewed-by: Ilpo Järvinen Reviewed-by: Manivannan Sadhasivam --- v5: no change to this one v4: style improvements v3: use ALIGN_DOWN() v2: new patch --- drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index d6b66597101e..9a437cfce073 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -483,9 +483,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, reg = ep_func->msi_cap + PCI_MSI_DATA_32; msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg); } - aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); - msg_addr = ((u64)msg_addr_upper) << 32 | - (msg_addr_lower & ~aligned_offset); + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower; + + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, epc->mem->window.page_size); if (ret)