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Thu, 25 Jan 2024 16:54:35 +0000 From: Ley Foon Tan To: Daniel Lezcano , Thomas Gleixner , Palmer Dabbelt , Paul Walmsley , Albert Ou Cc: atishp@rivosinc.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Ley Foon Tan Subject: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer initialization Date: Fri, 26 Jan 2024 00:54:16 +0800 Message-ID: <20240125165416.1987576-1-leyfoon.tan@starfivetech.com> X-Mailer: git-send-email 2.43.0 X-ClientProxiedBy: ZQ0PR01CA0028.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:2::18) To ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:f::12) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQZPR01MB0979:EE_|ZQZPR01MB1107:EE_ X-MS-Office365-Filtering-Correlation-Id: 8de8e369-dc9c-4cdd-d47c-08dc1dc64f4f X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tqFBeTKh5kcDmujekmXPv1UuY5/v5Xal6UZWKgtV+0SYo+BSHkkRev7SJ91kMzYJYQ1sYszZg0lvYVg6zJfpeZ//gknUXX6YnXcoRBOPEd/D+FoIiBwhV4WxNjnpWAIgnsmpWPx+XBurDwsIHY4kTfyGACMWARQIp0IU7v7zWHDgG9OY/041jPCVtZYTB7FlqxFng/zFT6tZ/uX0g7Ku0bQZ9Ej8mccAG7z/XRtvExNLal6uFmV6G6ei30IrLTWnOYuWHTfYyIpXHd7Kx8XR4zK2E8K147RVNfZZpHZTzZLI+qeVePRmUyakTox65TKR+jtu5cg9CCmsZONBMUK5cOHxjFzGZFVIjObh8/a3BDfvKLc6qOqaXwcm4sZIM9yUZrYAGFGMYZMcWu09Co0ApYsH6doV3Ldzyeq8YgI5M7jivYKbAkvYCVwaxJ6XjYHE2L7CJGeG2bLgved6zR0CT7UBK36EauEVCGxYBjjbYhC8DSVAegQSjuudKU2Wh73AY7Vttq01xXcrJLpSVbRWK/MQe3p5cteDPSNTJFugn1iw0kAbM6rOufSSDYhrLvd9 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn;PTR:;CAT:NONE;SFS:(13230031)(136003)(39830400003)(346002)(366004)(396003)(230922051799003)(451199024)(64100799003)(1800799012)(186009)(508600001)(41320700001)(66556008)(66476007)(1076003)(5660300002)(4744005)(66946007)(6666004)(8676002)(40180700001)(26005)(4326008)(8936002)(2616005)(110136005)(83380400001)(2906002)(40160700002)(38350700005)(36756003)(41300700001)(52116002)(86362001)(38100700002);DIR:OUT;SFP:1101; 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To prevent the timer interrupt from being triggered during timer initialization, clear the timer interrupt by writing stimecmp with a maximum value. Signed-off-by: Ley Foon Tan --- drivers/clocksource/timer-riscv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index e66dcbd66566..a75a74647344 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void) sched_clock_register(riscv_sched_clock, 64, riscv_timebase); + /* Clear timer interrupt */ + riscv_clock_event_stop(); + error = request_percpu_irq(riscv_clock_event_irq, riscv_timer_interrupt, "riscv-timer", &riscv_clock_event);