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Tue, 23 Jan 2024 16:39:08 -0800 (PST) Reply-To: Mingwei Zhang Date: Wed, 24 Jan 2024 00:38:56 +0000 In-Reply-To: <20240124003858.3954822-1-mizhang@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240124003858.3954822-1-mizhang@google.com> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog Message-ID: <20240124003858.3954822-2-mizhang@google.com> Subject: [PATCH 1/2] KVM: x86/pmu: Reset perf_capabilities in vcpu to 0 if PDCM is disabled From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: "H. Peter Anvin" , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Mingwei Zhang X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788930259409537139 X-GMAIL-MSGID: 1788930259409537139 Reset vcpu->arch.perf_capabilities to 0 if PDCM is disabled in guest cpuid. Without this, there is an issue in live migration. In particular, to migrate a VM with no PDCM enabled, VMM on the source is able to retrieve a non-zero value by reading the MSR_IA32_PERF_CAPABILITIES. However, VMM on the target is unable to set the value. This creates confusions on the user side. Fundamentally, it is because vcpu->arch.perf_capabilities as the cached value of MSR_IA32_PERF_CAPABILITIES is incorrect, and there is nothing wrong on the kvm_get_msr_common() which just reads vcpu->arch.perf_capabilities. Fix the issue by adding the reset code in kvm_vcpu_after_set_cpuid(), i.e. early in VM setup time. Cc: Aaron Lewis Signed-off-by: Mingwei Zhang --- arch/x86/kvm/cpuid.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index adba49afb5fe..416bee03c42a 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -369,6 +369,9 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu); + /* Reset MSR_IA32_PERF_CAPABILITIES guest value to 0 if PDCM is off. */ + if (!guest_cpuid_has(vcpu, X86_FEATURE_PDCM)) + vcpu->arch.perf_capabilities = 0; kvm_pmu_refresh(vcpu); vcpu->arch.cr4_guest_rsvd_bits = __cr4_reserved_bits(guest_cpuid_has, vcpu); From patchwork Wed Jan 24 00:38:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 191262 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2553:b0:103:945f:af90 with SMTP id p19csp692546dyi; Tue, 23 Jan 2024 16:40:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IHPBzwOfUc9e8l84D7cxkSz2j5GSR0zTSYJcDiGZSFP+vYglWbsd/IYBXNAGr/iGebZd7QA X-Received: by 2002:a05:6a20:619a:b0:19b:5b08:18de with SMTP id x26-20020a056a20619a00b0019b5b0818demr33171pzd.98.1706056838820; Tue, 23 Jan 2024 16:40:38 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706056838; cv=pass; d=google.com; s=arc-20160816; b=PkmVO83yvyNyEpmVe3A1NTEavu0jJCV3cf8KV1qgNMifsZyTcCs6E65i2GsSRpxPn0 IUcHYh4dSxw3b/JL07tWXB5JwCfHMQuXoKCut9tcctEkzGhhVBuQhu3X5R8ZCeXn+f9N Wr/JG5Pgw0+KnjUsZuxcBWAOQRklC6CKH+CafPf8VkTkzlEVsWHEYK++gV6GTvHtAl0/ WKbGhjryQC/bQ6sErUXPVfkqLg4Sm7dofxyiVH9nseTE8hQDpg0mKumxX2tDao5O5xFB hQWrh8Ht4VieFvVDU3g5KIX65RbN3vN14CSR8gUAaiNweqBXMKT9bg7jFIf3Lu/kto8b ZxPA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:from:subject:message-id:references:mime-version :list-unsubscribe:list-subscribe:list-id:precedence:in-reply-to:date :reply-to:dkim-signature; bh=FZPx6jaS+VlPs9U7Plzj144efeFD6kMtS2nhR6IMeJ0=; fh=BmxsMTAymmGF1UJR5MpB1hk/0oqfyaaP+WHwoCwyPO4=; b=woq3gVgV29wmUMrCFh1Ku5fHrspjyPg4AroaCmFalQ6ZWL24uB3DC4LKsbCh+PGMgR uqlJrrl7Jo++43GRYPqTBv1Gl+6b5clBes7IgY/yN6JMq9YQYdJS49B2sBmJ1uYROkHC GMLc0ZNe/crTHxu1LRyL9uKNqomYAG8nuf6oW4cOiLn9f7av6nmFERgx3OtTMJbmCrGD QBp1mgHXvGOY5e73H9HsM7rPR3PoFSTQkTdlTDSNBBqq4DpKXCSh3PLodZzTSE8fbDqu sFPWVdmuKdjTNVSKa5qWdKWigcGOl8hLhL7lBvaBbPPnCgYDedpto9T40B4TEJ/2Z/Il 7gXg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@google.com header.s=20230601 header.b=QZvNqtW1; arc=pass (i=1 spf=pass spfdomain=flex--mizhang.bounces.google.com dkim=pass dkdomain=google.com dmarc=pass fromdomain=google.com); spf=pass (google.com: domain of linux-kernel+bounces-36229-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-36229-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Tue, 23 Jan 2024 16:39:10 -0800 (PST) Reply-To: Mingwei Zhang Date: Wed, 24 Jan 2024 00:38:57 +0000 In-Reply-To: <20240124003858.3954822-1-mizhang@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240124003858.3954822-1-mizhang@google.com> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog Message-ID: <20240124003858.3954822-3-mizhang@google.com> Subject: [PATCH 2/2] KVM: x86/pmu: Remove vcpu_get_perf_capabilities() From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini Cc: "H. Peter Anvin" , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Mingwei Zhang X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788930255957130982 X-GMAIL-MSGID: 1788930255957130982 Remove vcpu_get_perf_capabilities() helper and directly use the vcpu->arch.perf_capabilities which now contains the true value of IA32_PERF_CAPABILITIES if exposed to guest (and 0 otherwise). This should slightly improve performance by avoiding the runtime check of X86_FEATURE_PDCM. Signed-off-by: Mingwei Zhang --- arch/x86/kvm/vmx/pmu_intel.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index a6216c874729..7cbee2d16ed9 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -158,17 +158,9 @@ static struct kvm_pmc *intel_rdpmc_ecx_to_pmc(struct kvm_vcpu *vcpu, return &counters[array_index_nospec(idx, num_counters)]; } -static inline u64 vcpu_get_perf_capabilities(struct kvm_vcpu *vcpu) -{ - if (!guest_cpuid_has(vcpu, X86_FEATURE_PDCM)) - return 0; - - return vcpu->arch.perf_capabilities; -} - static inline bool fw_writes_is_enabled(struct kvm_vcpu *vcpu) { - return (vcpu_get_perf_capabilities(vcpu) & PMU_CAP_FW_WRITES) != 0; + return (vcpu->arch.perf_capabilities & PMU_CAP_FW_WRITES) != 0; } static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr) @@ -207,13 +199,13 @@ static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr) case MSR_CORE_PERF_FIXED_CTR_CTRL: return kvm_pmu_has_perf_global_ctrl(pmu); case MSR_IA32_PEBS_ENABLE: - ret = vcpu_get_perf_capabilities(vcpu) & PERF_CAP_PEBS_FORMAT; + ret = vcpu->arch.perf_capabilities & PERF_CAP_PEBS_FORMAT; break; case MSR_IA32_DS_AREA: ret = guest_cpuid_has(vcpu, X86_FEATURE_DS); break; case MSR_PEBS_DATA_CFG: - perf_capabilities = vcpu_get_perf_capabilities(vcpu); + perf_capabilities = vcpu->arch.perf_capabilities; ret = (perf_capabilities & PERF_CAP_PEBS_BASELINE) && ((perf_capabilities & PERF_CAP_PEBS_FORMAT) > 3); break; @@ -577,7 +569,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters); - perf_capabilities = vcpu_get_perf_capabilities(vcpu); + perf_capabilities = vcpu->arch.perf_capabilities; if (cpuid_model_is_consistent(vcpu) && (perf_capabilities & PMU_CAP_LBR_FMT)) x86_perf_get_lbr(&lbr_desc->records);