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[178.235.179.218]) by smtp.gmail.com with ESMTPSA id k3-20020a170906a38300b00a298d735a1bsm13481349ejz.149.2024.01.22.03.57.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 03:57:20 -0800 (PST) From: Konrad Dybcio Date: Mon, 22 Jan 2024 12:57:12 +0100 Subject: [PATCH 1/2] pinctrl: qcom: Remove QDF2xxx support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-topic-qdf_cleanup_pinctrl-v1-1-0c619ea25091@linaro.org> References: <20240122-topic-qdf_cleanup_pinctrl-v1-0-0c619ea25091@linaro.org> In-Reply-To: <20240122-topic-qdf_cleanup_pinctrl-v1-0-0c619ea25091@linaro.org> To: Bjorn Andersson , Linus Walleij , Catalin Marinas , Will Deacon Cc: Marijn Suijten , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705924637; l=7491; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=YDsBO6NlVIzkOIpCUSsISVUb3FWsETMa1EY/y8dwxcY=; b=KLH5j9QK4ZCjO1SAIeKv8kJFuCyOVT4Vi5HorfdkwpiVG6cRQqbPrDJc6nunf+WBK50BKL0bY /9P/3TTgn01AMNdEdBCcNlTEO7yhTdzx8TM333fowy9cXEanZmHSDo3 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788794081300555202 X-GMAIL-MSGID: 1788794081300555202 This SoC family was destined for server use, featuring Qualcomm's very interesting Kryo cores (before "Kryo" became a marketing term for Arm cores with small modifications). It did however not leave the labs of Qualcomm and presumably some partners, nor was it ever productized. Remove this driver, as it seems to be long obsolete. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson --- drivers/pinctrl/qcom/Kconfig.msm | 7 -- drivers/pinctrl/qcom/Makefile | 1 - drivers/pinctrl/qcom/pinctrl-qdf2xxx.c | 164 --------------------------------- 3 files changed, 172 deletions(-) diff --git a/drivers/pinctrl/qcom/Kconfig.msm b/drivers/pinctrl/qcom/Kconfig.msm index 8fe459d082ed..57778590006f 100644 --- a/drivers/pinctrl/qcom/Kconfig.msm +++ b/drivers/pinctrl/qcom/Kconfig.msm @@ -182,13 +182,6 @@ config PINCTRL_QCS404 This is the pinctrl, pinmux, pinconf and gpiolib driver for the TLMM block found in the Qualcomm QCS404 platform. -config PINCTRL_QDF2XXX - tristate "Qualcomm Technologies QDF2xxx pin controller driver" - depends on ACPI - help - This is the GPIO driver for the TLMM block found on the - Qualcomm Technologies QDF2xxx SOCs. - config PINCTRL_QDU1000 tristate "Qualcomm Technologies Inc QDU1000/QRU1000 pin controller driver" depends on ARM64 || COMPILE_TEST diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index e2e76071d268..fa58af95a09d 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -23,7 +23,6 @@ obj-$(CONFIG_PINCTRL_MSM8996) += pinctrl-msm8996.o obj-$(CONFIG_PINCTRL_MSM8998) += pinctrl-msm8998.o obj-$(CONFIG_PINCTRL_QCM2290) += pinctrl-qcm2290.o obj-$(CONFIG_PINCTRL_QCS404) += pinctrl-qcs404.o -obj-$(CONFIG_PINCTRL_QDF2XXX) += pinctrl-qdf2xxx.o obj-$(CONFIG_PINCTRL_MDM9607) += pinctrl-mdm9607.o obj-$(CONFIG_PINCTRL_MDM9615) += pinctrl-mdm9615.o obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o diff --git a/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c b/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c deleted file mode 100644 index 4d2f6f495163..000000000000 --- a/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c +++ /dev/null @@ -1,164 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2015, The Linux Foundation. All rights reserved. - * - * GPIO and pin control functions on this SOC are handled by the "TLMM" - * device. The driver which controls this device is pinctrl-msm.c. Each - * SOC with a TLMM is expected to create a client driver that registers - * with pinctrl-msm.c. This means that all TLMM drivers are pin control - * drivers. - * - * This pin control driver is intended to be used only an ACPI-enabled - * system. As such, UEFI will handle all pin control configuration, so - * this driver does not provide pin control functions. It is effectively - * a GPIO-only driver. The alternative is to duplicate the GPIO code of - * pinctrl-msm.c into another driver. - */ - -#include -#include -#include -#include - -#include "pinctrl-msm.h" - -/* A maximum of 256 allows us to use a u8 array to hold the GPIO numbers */ -#define MAX_GPIOS 256 - -/* maximum size of each gpio name (enough room for "gpioXXX" + null) */ -#define NAME_SIZE 8 - -static int qdf2xxx_pinctrl_probe(struct platform_device *pdev) -{ - struct msm_pinctrl_soc_data *pinctrl; - struct pinctrl_pin_desc *pins; - struct msm_pingroup *groups; - char (*names)[NAME_SIZE]; - unsigned int i; - u32 num_gpios; - unsigned int avail_gpios; /* The number of GPIOs we support */ - u8 gpios[MAX_GPIOS]; /* An array of supported GPIOs */ - int ret; - - /* Query the number of GPIOs from ACPI */ - ret = device_property_read_u32(&pdev->dev, "num-gpios", &num_gpios); - if (ret < 0) { - dev_err(&pdev->dev, "missing 'num-gpios' property\n"); - return ret; - } - if (!num_gpios || num_gpios > MAX_GPIOS) { - dev_err(&pdev->dev, "invalid 'num-gpios' property\n"); - return -ENODEV; - } - - /* The number of GPIOs in the approved list */ - ret = device_property_count_u8(&pdev->dev, "gpios"); - if (ret < 0) { - dev_err(&pdev->dev, "missing 'gpios' property\n"); - return ret; - } - /* - * The number of available GPIOs should be non-zero, and no - * more than the total number of GPIOS. - */ - if (!ret || ret > num_gpios) { - dev_err(&pdev->dev, "invalid 'gpios' property\n"); - return -ENODEV; - } - avail_gpios = ret; - - ret = device_property_read_u8_array(&pdev->dev, "gpios", gpios, - avail_gpios); - if (ret < 0) { - dev_err(&pdev->dev, "could not read list of GPIOs\n"); - return ret; - } - - pinctrl = devm_kzalloc(&pdev->dev, sizeof(*pinctrl), GFP_KERNEL); - pins = devm_kcalloc(&pdev->dev, num_gpios, - sizeof(struct pinctrl_pin_desc), GFP_KERNEL); - groups = devm_kcalloc(&pdev->dev, num_gpios, - sizeof(struct msm_pingroup), GFP_KERNEL); - names = devm_kcalloc(&pdev->dev, avail_gpios, NAME_SIZE, GFP_KERNEL); - - if (!pinctrl || !pins || !groups || !names) - return -ENOMEM; - - /* - * Initialize the array. GPIOs not listed in the 'gpios' array - * still need a number, but nothing else. - */ - for (i = 0; i < num_gpios; i++) { - pins[i].number = i; - groups[i].grp.pins = &pins[i].number; - } - - /* Populate the entries that are meant to be exposed as GPIOs. */ - for (i = 0; i < avail_gpios; i++) { - unsigned int gpio = gpios[i]; - - groups[gpio].grp.npins = 1; - snprintf(names[i], NAME_SIZE, "gpio%u", gpio); - pins[gpio].name = names[i]; - groups[gpio].grp.name = names[i]; - - groups[gpio].ctl_reg = 0x10000 * gpio; - groups[gpio].io_reg = 0x04 + 0x10000 * gpio; - groups[gpio].intr_cfg_reg = 0x08 + 0x10000 * gpio; - groups[gpio].intr_status_reg = 0x0c + 0x10000 * gpio; - groups[gpio].intr_target_reg = 0x08 + 0x10000 * gpio; - - groups[gpio].mux_bit = 2; - groups[gpio].pull_bit = 0; - groups[gpio].drv_bit = 6; - groups[gpio].oe_bit = 9; - groups[gpio].in_bit = 0; - groups[gpio].out_bit = 1; - groups[gpio].intr_enable_bit = 0; - groups[gpio].intr_status_bit = 0; - groups[gpio].intr_target_bit = 5; - groups[gpio].intr_target_kpss_val = 1; - groups[gpio].intr_raw_status_bit = 4; - groups[gpio].intr_polarity_bit = 1; - groups[gpio].intr_detection_bit = 2; - groups[gpio].intr_detection_width = 2; - } - - pinctrl->pins = pins; - pinctrl->groups = groups; - pinctrl->npins = num_gpios; - pinctrl->ngroups = num_gpios; - pinctrl->ngpios = num_gpios; - - return msm_pinctrl_probe(pdev, pinctrl); -} - -static const struct acpi_device_id qdf2xxx_acpi_ids[] = { - {"QCOM8002"}, - {}, -}; -MODULE_DEVICE_TABLE(acpi, qdf2xxx_acpi_ids); - -static struct platform_driver qdf2xxx_pinctrl_driver = { - .driver = { - .name = "qdf2xxx-pinctrl", - .acpi_match_table = qdf2xxx_acpi_ids, - }, - .probe = qdf2xxx_pinctrl_probe, - .remove_new = msm_pinctrl_remove, -}; - -static int __init qdf2xxx_pinctrl_init(void) -{ - return platform_driver_register(&qdf2xxx_pinctrl_driver); -} -arch_initcall(qdf2xxx_pinctrl_init); - -static void __exit qdf2xxx_pinctrl_exit(void) -{ - platform_driver_unregister(&qdf2xxx_pinctrl_driver); -} -module_exit(qdf2xxx_pinctrl_exit); - -MODULE_DESCRIPTION("Qualcomm Technologies QDF2xxx pin control driver"); -MODULE_LICENSE("GPL v2"); From patchwork Mon Jan 22 11:57:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 190130 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2bc4:b0:101:a8e8:374 with SMTP id hx4csp2526048dyb; Mon, 22 Jan 2024 04:12:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IFl9rEKFJR1knW2msJxq6RmZwlO4rzvm7Uc7+NUJQa4bVKXWTGl63FpHDPqr4H4lxT0CkD2 X-Received: by 2002:a17:903:2450:b0:1d7:3d6d:9004 with SMTP id l16-20020a170903245000b001d73d6d9004mr1349756pls.47.1705925525469; Mon, 22 Jan 2024 04:12:05 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1705925525; cv=pass; d=google.com; s=arc-20160816; b=kFNf9GbgaLpr8JK0k72CvKy2uxQS3AE7QKb7jKsYbOk3HlucaMnq/Uw31yWjF3WkNo VtkxXkaVl8Y7Q7s2G7Cum2rIf2Z+Y8lkl6vnQfzxe7ymREfAXqaGoXyenVhAFtfJNmDr chXnkshCdWIpc8ujc8qHzxcNwmsqudoH8hHMPNA22va+oK2JyAcxGWyofNNUvgdHq3qO fJ2kBU/f0Mo6jFHgABCyDdsUndXdyM5GozPdF7ie24X7BJFk8h8ltmGratbJsA5zZxV9 sSwlqNludo2P2PHdR82MscZLsw53UtwLBOohbkZ16YbH8sUhdxR1D8MjjGAOUatW2Wzt Y/iQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=cxydUfSC9eRtB22KvfpOCkXdWNLtx7yPPDJ5CJF/vzw=; fh=w85rhqUngaG7sw/4S0H1AjzMTTgV0vf+yqd5cI6VlWs=; b=y/SflkCgS5NFbaqmq8qFYk/65REAj+qdm1+wsXMbcb/f7chfM7TNRE4mpbnKITQd6s VLfzbrQZ0ktbMLA9D2uk2kHpEwuzmDMmIPLX/Px4G6s1+4QHKkEmlfYm4Abnpx4m/vzg SJ5xypCvhMZwP8VXyhEqK8MLL5mwG/QeJOrtRwbZ756Fpm7UhJvcVEDzAJJCvZBMOw0y R0WNpE/xBFUOtM7QVBmwgyjkba+Uhc1dNNyrnhC+OF3Qt9EES0ktxBYmc8hfjrd3sgu0 gLSDlUgSZAyeoY5x4nl2X88EHbAj6iZJODSaP+GMFG0DNYMwmexIk8SbvXj6zibF/F8s cE9A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dPtrNM5n; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-32977-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-32977-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[178.235.179.218]) by smtp.gmail.com with ESMTPSA id k3-20020a170906a38300b00a298d735a1bsm13481349ejz.149.2024.01.22.03.57.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 03:57:22 -0800 (PST) From: Konrad Dybcio Date: Mon, 22 Jan 2024 12:57:13 +0100 Subject: [PATCH 2/2] arm64: defconfig: Remove QDF24XX pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-topic-qdf_cleanup_pinctrl-v1-2-0c619ea25091@linaro.org> References: <20240122-topic-qdf_cleanup_pinctrl-v1-0-0c619ea25091@linaro.org> In-Reply-To: <20240122-topic-qdf_cleanup_pinctrl-v1-0-0c619ea25091@linaro.org> To: Bjorn Andersson , Linus Walleij , Catalin Marinas , Will Deacon Cc: Marijn Suijten , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705924637; l=634; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PbWtnWRE8OdZobvCbQjeCjgGmP9VZZyrNRe7q9wSh4g=; b=yh6s7yqzGgsWuTz7YhKO+4IOkHzL8oa8CR/iRQiWeBUz9cTuDqdUiE+z0yQ0FDh0uOgtHLXtv jz9RsffyZV0AiAwvmzPQeu2HcaSNGCYa2YbZkm1BZC6JmX3tpC782Jm X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788792563568585924 X-GMAIL-MSGID: 1788792563568585924 The driver for is has been removed, clean up the config entry. Signed-off-by: Konrad Dybcio --- arch/arm64/configs/defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e6cf3e5d63c3..55b8dab100bd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -588,7 +588,6 @@ CONFIG_PINCTRL_MSM8996=y CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y -CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y CONFIG_PINCTRL_SC7180=y