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Acked-by: Conor Dooley Reviewed-by: Matthias Brugger Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml index a59d91243ac8..d4e187c78a0b 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml @@ -185,7 +185,10 @@ properties: 2 - used by mt2712 etc, revision 2 with following IPM rule; 101 - used by mt8183, specific 1.01; 102 - used by mt8192, specific 1.02; - enum: [1, 2, 101, 102] + 103 - used by mt8195, IP0, specific 1.03; + 105 - used by mt8195, IP2, specific 1.05; + 106 - used by mt8195, IP3, specific 1.06; + enum: [1, 2, 101, 102, 103, 105, 106] mediatek,u3p-dis-msk: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Mon Jan 22 11:18:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 190100 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2bc4:b0:101:a8e8:374 with SMTP id hx4csp2507210dyb; Mon, 22 Jan 2024 03:31:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IFT54hPwpGt9H7bUyioH+YZfAZE0QNhu6d6N+hHdZKTAqIDMBlllj/9IEG7BxoLXhYYCMRj X-Received: by 2002:a05:6402:1768:b0:55a:312c:43fc with SMTP id da8-20020a056402176800b0055a312c43fcmr1432386edb.43.1705923107170; Mon, 22 Jan 2024 03:31:47 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1705923107; cv=pass; d=google.com; s=arc-20160816; b=FNPPb2LeqveHGsbEUdN5G6kG6kc4PEsrrOredJjDdlkWLgrhPrae2MKhRY0qTuIzgi 1PbYxKP5vL50kUG0HAY3HSSPAjw1mZ0lsJ63KW+AqnSFVJfFudbrH3FyxFAJKYnBxGTl Nr40chy8WG49XigEPFc+P2b/qpjGJ7Geg/Sgxg0IN+75pvGqTqI+lB+v5Orp+ollihly MSrD8MpO73vLkYfJvYL04PpUMq4SHOauCOnXs4hNqiJNwrzChg+5HVNhcgrPqR+RTiTJ b0tiFClhGfQiFluQ686766iD6zS54Gvx3WXH3AaiBh3FaxUQfTSTg/nYOH76x/VTap33 QZVA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Cj5vqLy2Mm1agi07FqWAfFs3XdXdLngHyY/oGxD31ow=; fh=BeF0+c6bc9hQ/To0+sOxScVvLec/Ic/anJ9OS5JMNWs=; b=Ht4W3pzmcKykPb4pLU13XwCd/reYIAlz7O5Lh3C5VUDVxuibYD59k6VeSgQion7UKb cbPIh2ozBhGaDk/I+QOWGv7cTVHyjrFnFSeBg6QkhYknesI+HK6aS9jnjYZEMNT29HpV jDXdwCznXFdgFbGMak3VdnPG38UU1S8SBGwBeJf25U2yG2udHcx4WQJ2LZ3r/3mk7Kan CtYCmGOaG2UF/RU554T4xEVwmrJkxQpXDhg9eh9UV1J40NbH2QxGKudsTeZqw36jQUNW gk6R8DGNzRN7uVc5TASp/EhfX/Cs6ijxK371Pf3IzzJWur5GR4PMrT1WHfIY6CyQ01PS wtrQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=EsXWUxhC; arc=pass (i=1 spf=pass spfdomain=collabora.com dkim=pass dkdomain=collabora.com dmarc=pass fromdomain=collabora.com); spf=pass (google.com: domain of linux-kernel+bounces-32902-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-32902-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EsXWUxhCAXcW3y7Sq1MFm3r2eNNayJ5uy9un49YBXUtm3eRmuBrlWzz7zajHR4eWh Gf+fiB6nnAaxZ4C877H2YCsfaVSr4cvPZ2glF6pAr+mjgcZQxVaB0C7C3PWspaS0p3 ZWpjX7phl/702Ag6GrA4XuuXAEQ5eguxd7aOiavzcbMn4uiSkKAaq+EXWARelBsUz7 +bJtttcQxWrxL4N8cd9NOF9DekoeqJjqTW4MqzjcTZszoH9UuXw4xhTgqLboxquSU0 WrjuRA+Cq2iLKhGjloEwErEbzIyRJFnErKPXBs0L/tmXoemkZTjTZkVL8oUSrIYPFn 1zJSaXSJwfLuQ== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 566FA3781FE1; Mon, 22 Jan 2024 11:18:16 +0000 (UTC) From: AngeloGioacchino Del Regno To: chunfeng.yun@mediatek.com Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley Subject: [PATCH v2 2/2] usb: mtu3: Add MT8195 MTU3 ip-sleep wakeup support Date: Mon, 22 Jan 2024 12:18:09 +0100 Message-ID: <20240122111809.148546-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240122111809.148546-1-angelogioacchino.delregno@collabora.com> References: <20240122111809.148546-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788790027757273043 X-GMAIL-MSGID: 1788790027757273043 Add support for the ip-sleep wakeup functionality on the three MTU3 controllers found on the MT8195 SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- Changes in v2: - Dropped unused definition for WC0_IS_EN_P1_95 drivers/usb/mtu3/mtu3_host.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c index 9f2be22af844..7c657ea2dabd 100644 --- a/drivers/usb/mtu3/mtu3_host.c +++ b/drivers/usb/mtu3/mtu3_host.c @@ -34,6 +34,18 @@ #define WC0_SSUSB0_CDEN BIT(6) #define WC0_IS_SPM_EN BIT(1) +/* mt8195 */ +#define PERI_WK_CTRL0_8195 0x04 +#define WC0_IS_P_95 BIT(30) /* polarity */ +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) +#define WC0_IS_EN_P3_95 BIT(26) +#define WC0_IS_EN_P2_95 BIT(25) + +#define PERI_WK_CTRL1_8195 0x20 +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) +#define WC1_IS_P_95 BIT(12) +#define WC1_IS_EN_P0_95 BIT(6) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -44,6 +56,9 @@ enum ssusb_uwk_vers { SSUSB_UWK_V2, SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ SSUSB_UWK_V1_2, /* specific revision 1.02 */ + SSUSB_UWK_V1_3, /* mt8195 IP0 */ + SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ + SSUSB_UWK_V1_6, /* mt8195 IP3 */ }; /* @@ -70,6 +85,21 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable) msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; val = enable ? msk : 0; break; + case SSUSB_UWK_V1_3: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL1_8195; + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_5: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_6: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; + break; case SSUSB_UWK_V2: reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;