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Fri, 19 Jan 2024 10:06:46 +0000 From: Changhuang Liang To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jack Zhu , Changhuang Liang , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v1 1/2] dt-bindings: media: starfive: Match driver and yaml property names Date: Fri, 19 Jan 2024 02:06:38 -0800 Message-Id: <20240119100639.84029-2-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240119100639.84029-1-changhuang.liang@starfivetech.com> References: <20240119100639.84029-1-changhuang.liang@starfivetech.com> X-ClientProxiedBy: NT0PR01CA0021.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:c::9) To SHXPR01MB0671.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:25::10) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SHXPR01MB0671:EE_|SHXPR01MB0558:EE_ X-MS-Office365-Filtering-Correlation-Id: ee4da847-879f-432b-58e4-08dc18d65853 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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Reviewed-by: Hal Feng Reviewed-by: Jack Zhu Signed-off-by: Changhuang Liang --- .../bindings/media/starfive,jh7110-camss.yaml | 31 +++++-------------- 1 file changed, 8 insertions(+), 23 deletions(-) diff --git a/Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml b/Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml index c66586d90fa2..2504381058b3 100644 --- a/Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml +++ b/Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml @@ -4,14 +4,14 @@ $id: http://devicetree.org/schemas/media/starfive,jh7110-camss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Starfive SoC CAMSS ISP +title: StarFive SoC CAMSS ISP maintainers: - Jack Zhu - Changhuang Liang description: - The Starfive CAMSS ISP is a Camera interface for Starfive JH7110 SoC. It + The StarFive CAMSS ISP is a Camera interface for StarFive JH7110 SoC. It consists of a VIN controller (Video In Controller, a top-level control unit) and an ISP. @@ -28,26 +28,21 @@ properties: - const: isp clocks: - maxItems: 7 + maxItems: 3 clock-names: items: - - const: apb_func - const: wrapper_clk_c - - const: dvp_inv - - const: axiwr - - const: mipi_rx0_pxl - const: ispcore_2x - const: isp_axi resets: - maxItems: 6 + maxItems: 5 reset-names: items: - const: wrapper_p - const: wrapper_c - - const: axird - const: axiwr - const: isp_top_n - const: isp_top_axi @@ -57,7 +52,7 @@ properties: - description: JH7110 ISP Power Domain Switch Controller. interrupts: - maxItems: 4 + maxItems: 3 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -125,34 +120,24 @@ examples: reg = <0x19840000 0x10000>, <0x19870000 0x30000>; reg-names = "syscon", "isp"; - clocks = <&ispcrg 0>, - <&ispcrg 13>, - <&ispcrg 2>, - <&ispcrg 12>, - <&ispcrg 1>, + clocks = <&ispcrg 13>, <&syscrg 51>, <&syscrg 52>; - clock-names = "apb_func", - "wrapper_clk_c", - "dvp_inv", - "axiwr", - "mipi_rx0_pxl", + clock-names = "wrapper_clk_c", "ispcore_2x", "isp_axi"; resets = <&ispcrg 0>, <&ispcrg 1>, - <&ispcrg 10>, <&ispcrg 11>, <&syscrg 41>, <&syscrg 42>; reset-names = "wrapper_p", "wrapper_c", - "axird", "axiwr", "isp_top_n", "isp_top_axi"; power-domains = <&pwrc 5>; - interrupts = <92>, <87>, <88>, <90>; + interrupts = <92>, <87>, <90>; ports { #address-cells = <1>; From patchwork Fri Jan 19 10:06:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Changhuang Liang X-Patchwork-Id: 189486 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2bc4:b0:101:a8e8:374 with SMTP id hx4csp913354dyb; Fri, 19 Jan 2024 02:22:57 -0800 (PST) X-Google-Smtp-Source: AGHT+IGOLQ4y9B/Yqnzaliy+vCl4gCxeHAQOBUmOPWe1TbbIuCuyQ5JSi7OCOWnrwZBuJJPGWcu1 X-Received: by 2002:aa7:8893:0:b0:6db:ac96:f530 with SMTP id z19-20020aa78893000000b006dbac96f530mr1143562pfe.24.1705659777185; Fri, 19 Jan 2024 02:22:57 -0800 (PST) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Fri, 19 Jan 2024 10:06:47 +0000 From: Changhuang Liang To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jack Zhu , Changhuang Liang , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add camera subsystem nodes Date: Fri, 19 Jan 2024 02:06:39 -0800 Message-Id: <20240119100639.84029-3-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240119100639.84029-1-changhuang.liang@starfivetech.com> References: <20240119100639.84029-1-changhuang.liang@starfivetech.com> X-ClientProxiedBy: NT0PR01CA0021.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:c::9) To SHXPR01MB0671.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:25::10) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SHXPR01MB0671:EE_|SHXPR01MB0558:EE_ X-MS-Office365-Filtering-Correlation-Id: fd94a6bb-5837-4038-29ee-08dc18d658c8 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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They contain the imx219, dphy-rx, csi2rx, camss node. Signed-off-by: Changhuang Liang --- .../jh7110-starfive-visionfive-2.dtsi | 103 ++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 60 ++++++++++ 2 files changed, 163 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index b89e9791efa7..e0027bb379ef 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -30,6 +30,37 @@ cpus { timebase-frequency = <4000000>; }; + imx219_clk: imx219-clock { + compatible = "fixed-clock"; + clock-output-names = "imx219_clk"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + + imx219_vana_2v8: 2p8v { + compatible = "regulator-fixed"; + regulator-name = "camera_vana"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + imx219_vdig_1v8: 1p8v { + compatible = "regulator-fixed"; + regulator-name = "camera_vdig"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + imx219_vddl_1v2: 1p2v { + compatible = "regulator-fixed"; + regulator-name = "camera_vddl"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0x1 0x0>; @@ -125,6 +156,59 @@ &tdm_ext { clock-frequency = <49152000>; }; +&camss { + assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, + <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; + assigned-clock-rates = <49500000>, <198000000>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + camss_from_csi2rx: endpoint { + remote-endpoint = <&csi2rx_to_camss>; + }; + }; + }; +}; + +&csi2rx { + assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; + assigned-clock-rates = <297000000>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csi2rx_from_imx219: endpoint { + remote-endpoint = <&imx219_to_csi2rx>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + + csi2rx_to_camss: endpoint { + remote-endpoint = <&camss_from_csi2rx>; + }; + }; + }; +}; + &gmac0 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; @@ -228,6 +312,25 @@ &i2c6 { pinctrl-names = "default"; pinctrl-0 = <&i2c6_pins>; status = "okay"; + + imx219: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&imx219_clk>; + reset-gpios = <&sysgpio 18 GPIO_ACTIVE_HIGH>; + VANA-supply = <&imx219_vana_2v8>; + VDIG-supply = <&imx219_vdig_1v8>; + VDDL-supply = <&imx219_vddl_1v2>; + + port { + imx219_to_csi2rx: endpoint { + remote-endpoint = <&csi2rx_from_imx219>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; }; &i2srx { diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 45213cdf50dc..b4d1564c123c 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1104,6 +1104,32 @@ pwrc: power-controller@17030000 { #power-domain-cells = <1>; }; + csi2rx: csi@19800000 { + compatible = "starfive,jh7110-csi2rx", "cdns,csi2rx"; + reg = <0x0 0x19800000 0x0 0x10000>; + clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>, + <&ispcrg JH7110_ISPCLK_VIN_APB>, + <&ispcrg JH7110_ISPCLK_VIN_PIXEL_IF0>, + <&ispcrg JH7110_ISPCLK_VIN_PIXEL_IF1>, + <&ispcrg JH7110_ISPCLK_VIN_PIXEL_IF2>, + <&ispcrg JH7110_ISPCLK_VIN_PIXEL_IF3>; + clock-names = "sys_clk", "p_clk", + "pixel_if0_clk", "pixel_if1_clk", + "pixel_if2_clk", "pixel_if3_clk"; + resets = <&ispcrg JH7110_ISPRST_VIN_SYS>, + <&ispcrg JH7110_ISPRST_VIN_APB>, + <&ispcrg JH7110_ISPRST_VIN_PIXEL_IF0>, + <&ispcrg JH7110_ISPRST_VIN_PIXEL_IF1>, + <&ispcrg JH7110_ISPRST_VIN_PIXEL_IF2>, + <&ispcrg JH7110_ISPRST_VIN_PIXEL_IF3>; + reset-names = "sys", "reg_bank", + "pixel_if0", "pixel_if1", + "pixel_if2", "pixel_if3"; + phys = <&csi_phy>; + phy-names = "dphy"; + status = "disabled"; + }; + ispcrg: clock-controller@19810000 { compatible = "starfive,jh7110-ispcrg"; reg = <0x0 0x19810000 0x0 0x10000>; @@ -1121,6 +1147,40 @@ ispcrg: clock-controller@19810000 { power-domains = <&pwrc JH7110_PD_ISP>; }; + csi_phy: phy@19820000 { + compatible = "starfive,jh7110-dphy-rx"; + reg = <0x0 0x19820000 0x0 0x10000>; + clocks = <&ispcrg JH7110_ISPCLK_M31DPHY_CFG_IN>, + <&ispcrg JH7110_ISPCLK_M31DPHY_REF_IN>, + <&ispcrg JH7110_ISPCLK_M31DPHY_TX_ESC_LAN0>; + clock-names = "cfg", "ref", "tx"; + resets = <&ispcrg JH7110_ISPRST_M31DPHY_HW>, + <&ispcrg JH7110_ISPRST_M31DPHY_B09_AON>; + power-domains = <&aon_syscon JH7110_AON_PD_DPHY_RX>; + #phy-cells = <0>; + }; + + camss: isp@19840000 { + compatible = "starfive,jh7110-camss"; + reg = <0x0 0x19840000 0x0 0x10000>, + <0x0 0x19870000 0x0 0x30000>; + reg-names = "syscon", "isp"; + clocks = <&ispcrg JH7110_ISPCLK_ISPV2_TOP_WRAPPER_C>, + <&syscrg JH7110_SYSCLK_ISP_TOP_CORE>, + <&syscrg JH7110_SYSCLK_ISP_TOP_AXI>; + clock-names = "wrapper_clk_c", "ispcore_2x", "isp_axi"; + resets = <&ispcrg JH7110_ISPRST_ISPV2_TOP_WRAPPER_P>, + <&ispcrg JH7110_ISPRST_ISPV2_TOP_WRAPPER_C>, + <&ispcrg JH7110_ISPRST_VIN_P_AXI_WR>, + <&syscrg JH7110_SYSRST_ISP_TOP>, + <&syscrg JH7110_SYSRST_ISP_TOP_AXI>; + reset-names = "wrapper_p", "wrapper_c", "axiwr", + "isp_top_n", "isp_top_axi"; + power-domains = <&pwrc JH7110_PD_ISP>; + interrupts = <92>, <87>, <90>; + status = "disabled"; + }; + voutcrg: clock-controller@295c0000 { compatible = "starfive,jh7110-voutcrg"; reg = <0x0 0x295c0000 0x0 0x10000>;