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bh=tdl2s+9NwYcKnnAd00gG4XMdcYjPnAG0lfCcq8Er7PA=; b=E/z0jsuuIFyYPcf/aCIg7WpYaVR75G8fu5swmU9FVJc6wB1VSEFWmGY+OaT43lyYri4Ud1 tD3ocGYjvL1q2JAA== From: "tip-bot2 for Inochi Amaoto" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/core] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs Cc: Inochi Amaoto , Guo Ren , Conor Dooley , Daniel Lezcano , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: =?utf-8?q?=3CIA1PR20MB49531ED1BCC00D6B265C2D10BB86A=40IA1PR20MB?= =?utf-8?q?4953=2Enamprd20=2Eprod=2Eoutlook=2Ecom=3E?= References: =?utf-8?q?=3CIA1PR20MB49531ED1BCC00D6B265C2D10BB86A=40IA1PR20MB4?= =?utf-8?q?953=2Enamprd20=2Eprod=2Eoutlook=2Ecom=3E?= Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170560584017.398.2135823212972486075.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784344475962166848 X-GMAIL-MSGID: 1788457450089239533 The following commit has been merged into the timers/core branch of tip: Commit-ID: b91cf01cf3e63a627b3b65f4284dcf9a4deb80f9 Gitweb: https://git.kernel.org/tip/b91cf01cf3e63a627b3b65f4284dcf9a4deb80f9 Author: Inochi Amaoto AuthorDate: Mon, 04 Dec 2023 17:51:08 +08:00 Committer: Daniel Lezcano CommitterDate: Wed, 27 Dec 2023 15:37:11 +01:00 dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs The timer registers of aclint don't follow the clint layout and can be mapped on any different offset. As sg2042 uses separated timer and mswi for its clint, it should follow the aclint spec and have separated registers. The previous patch introduced a new type of T-HEAD aclint timer which has clint timer layout. Although it has the clint timer layout, it should follow the aclint spec and uses the separated mtime and mtimecmp regs. So a ABI change is needed to make the timer fit the aclint spec. To make T-HEAD aclint timer more closer to the aclint spec, use regs-names to represent the mtimecmp register, which can avoid hack for unsupport mtime register of T-HEAD aclint timer. Also, as T-HEAD aclint only supports mtimecmp, it is unnecessary to implement the whole aclint spec. To make this binding T-HEAD specific, only add reg-name for existed register. For details, see the discussion in the last link. Signed-off-by: Inochi Amaoto Fixes: 4734449f7311 ("dt-bindings: timer: Add Sophgo sg2042 CLINT timer") Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005693.html Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc Link: https://lore.kernel.org/all/IA1PR20MB4953F9D77FFC76A9D236922DBBB6A@IA1PR20MB4953.namprd20.prod.outlook.com/ Acked-by: Guo Ren Acked-by: Conor Dooley Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/IA1PR20MB49531ED1BCC00D6B265C2D10BB86A@IA1PR20MB4953.namprd20.prod.outlook.com --- Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml index fbd2356..2e92bcd 100644 --- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml +++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml @@ -17,7 +17,12 @@ properties: - const: thead,c900-aclint-mtimer reg: - maxItems: 1 + items: + - description: MTIMECMP Registers + + reg-names: + items: + - const: mtimecmp interrupts-extended: minItems: 1 @@ -28,6 +33,7 @@ additionalProperties: false required: - compatible - reg + - reg-names - interrupts-extended examples: @@ -39,5 +45,6 @@ examples: <&cpu3intc 7>, <&cpu4intc 7>; reg = <0xac000000 0x00010000>; + reg-names = "mtimecmp"; }; ...