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Wed, 17 Jan 2024 22:02:35 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40HM2YgR023236 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 17 Jan 2024 22:02:34 GMT Received: from hu-apinski-lv.qualcomm.com (10.49.16.6) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 17 Jan 2024 14:02:34 -0800 From: Andrew Pinski To: CC: Andrew Pinski Subject: [COMMITTEDv2] aarch64: Fix aarch64_ldp_reg_operand predicate not to allow all subreg [PR113221] Date: Wed, 17 Jan 2024 14:02:21 -0800 Message-ID: <20240117220221.493015-1-quic_apinski@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: d2yJPAWbrc40dSkDjPmpboxsym2PsOGp X-Proofpoint-ORIG-GUID: d2yJPAWbrc40dSkDjPmpboxsym2PsOGp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_12,2024-01-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 adultscore=0 mlxlogscore=398 clxscore=1015 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401170157 X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788306739739677243 X-GMAIL-MSGID: 1788376771548818261 So the problem here is that aarch64_ldp_reg_operand will all subreg even subreg of lo_sum. When LRA tries to fix that up, all things break. So the fix is to change the check to only allow reg and subreg of regs. Note the tendancy here is to use register_operand but that checks the mode of the register but we need to allow a mismatch modes for this predicate for now. Committed as approved. Built and tested for aarch64-linux-gnu with no regressions (Also tested with the LD/ST pair pass back on). PR target/113221 gcc/ChangeLog: * config/aarch64/predicates.md (aarch64_ldp_reg_operand): For subreg, only allow REG operands instead of allowing all. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr113221-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/predicates.md | 6 +++++- gcc/testsuite/gcc.c-torture/compile/pr113221-1.c | 12 ++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr113221-1.c diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 8a204e48bb5..b895f5dcb86 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -313,7 +313,11 @@ (define_predicate "pmode_plus_operator" (define_special_predicate "aarch64_ldp_reg_operand" (and - (match_code "reg,subreg") + (ior + (match_code "reg") + (and + (match_code "subreg") + (match_test "REG_P (SUBREG_REG (op))"))) (match_test "aarch64_ldpstp_operand_mode_p (GET_MODE (op))") (ior (match_test "mode == VOIDmode") diff --git a/gcc/testsuite/gcc.c-torture/compile/pr113221-1.c b/gcc/testsuite/gcc.c-torture/compile/pr113221-1.c new file mode 100644 index 00000000000..942fa5eea88 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr113221-1.c @@ -0,0 +1,12 @@ +/* { dg-options "-fno-move-loop-invariants -funroll-all-loops" } */ +/* PR target/113221 */ +/* This used to ICE after the `load/store pair fusion pass` was added + due to the predicate aarch64_ldp_reg_operand allowing too much. */ + + +void bar(); +void foo(int* b) { + for (;;) + *b++ = (__SIZE_TYPE__)bar; +} +