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Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Pavel Machek , Sunil V L Subject: [PATCH v2 -next 1/3] cpuidle: RISC-V: Move few functions to arch/riscv Date: Mon, 15 Jan 2024 15:40:54 +0530 Message-Id: <20240115101056.429471-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115101056.429471-1-sunilvl@ventanamicro.com> References: <20240115101056.429471-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788150814935660387 X-GMAIL-MSGID: 1788150814935660387 To support ACPI Low Power Idle (LPI), few functions are required which are currently static functions in the DT based cpuidle driver. Hence, move them under arch/riscv so that ACPI driver also can use them. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- arch/riscv/include/asm/suspend.h | 3 ++ arch/riscv/kernel/suspend.c | 47 +++++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-riscv-sbi.c | 41 +------------------------ 3 files changed, 51 insertions(+), 40 deletions(-) diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h index 02f87867389a..5c7df5ab7a16 100644 --- a/arch/riscv/include/asm/suspend.h +++ b/arch/riscv/include/asm/suspend.h @@ -55,4 +55,7 @@ int hibernate_resume_nonboot_cpu_disable(void); asmlinkage void hibernate_restore_image(unsigned long resume_satp, unsigned long satp_temp, unsigned long cpu_resume); asmlinkage int hibernate_core_restore_code(void); +bool is_sbi_hsm_supported(void); +bool sbi_suspend_state_is_valid(u32 state); +int sbi_suspend(u32 state); #endif diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c index 239509367e42..a3b2e7e16a98 100644 --- a/arch/riscv/kernel/suspend.c +++ b/arch/riscv/kernel/suspend.c @@ -128,4 +128,51 @@ static int __init sbi_system_suspend_init(void) } arch_initcall(sbi_system_suspend_init); + +static int sbi_suspend_finisher(unsigned long suspend_type, + unsigned long resume_addr, + unsigned long opaque) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, + suspend_type, resume_addr, opaque, 0, 0, 0); + + return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; +} + +int sbi_suspend(u32 state) +{ + if (state & SBI_HSM_SUSP_NON_RET_BIT) + return cpu_suspend(state, sbi_suspend_finisher); + else + return sbi_suspend_finisher(state, 0, 0); +} + +bool sbi_suspend_state_is_valid(u32 state) +{ + if (state > SBI_HSM_SUSPEND_RET_DEFAULT && + state < SBI_HSM_SUSPEND_RET_PLATFORM) + return false; + if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && + state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) + return false; + return true; +} + +bool is_sbi_hsm_supported(void) +{ + /* + * The SBI HSM suspend function is only available when: + * 1) SBI version is 0.3 or higher + * 2) SBI HSM extension is available + */ + if (sbi_spec_version < sbi_mk_version(0, 3) || + !sbi_probe_extension(SBI_EXT_HSM)) { + pr_info("HSM suspend not available\n"); + return false; + } + + return true; +} #endif /* CONFIG_RISCV_SBI */ diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c index e8094fc92491..a7f06242f67b 100644 --- a/drivers/cpuidle/cpuidle-riscv-sbi.c +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c @@ -73,26 +73,6 @@ static inline bool sbi_is_domain_state_available(void) return data->available; } -static int sbi_suspend_finisher(unsigned long suspend_type, - unsigned long resume_addr, - unsigned long opaque) -{ - struct sbiret ret; - - ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, - suspend_type, resume_addr, opaque, 0, 0, 0); - - return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; -} - -static int sbi_suspend(u32 state) -{ - if (state & SBI_HSM_SUSP_NON_RET_BIT) - return cpu_suspend(state, sbi_suspend_finisher); - else - return sbi_suspend_finisher(state, 0, 0); -} - static __cpuidle int sbi_cpuidle_enter_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { @@ -206,17 +186,6 @@ static const struct of_device_id sbi_cpuidle_state_match[] = { { }, }; -static bool sbi_suspend_state_is_valid(u32 state) -{ - if (state > SBI_HSM_SUSPEND_RET_DEFAULT && - state < SBI_HSM_SUSPEND_RET_PLATFORM) - return false; - if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && - state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) - return false; - return true; -} - static int sbi_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "riscv,sbi-suspend-param", state); @@ -607,16 +576,8 @@ static int __init sbi_cpuidle_init(void) int ret; struct platform_device *pdev; - /* - * The SBI HSM suspend function is only available when: - * 1) SBI version is 0.3 or higher - * 2) SBI HSM extension is available - */ - if ((sbi_spec_version < sbi_mk_version(0, 3)) || - !sbi_probe_extension(SBI_EXT_HSM)) { - pr_info("HSM suspend not available\n"); + if (!is_sbi_hsm_supported()) return 0; - } ret = platform_driver_register(&sbi_cpuidle_driver); if (ret) From patchwork Mon Jan 15 10:10:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 188101 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2614:b0:101:6a76:bbe3 with SMTP id mm20csp1610123dyc; Mon, 15 Jan 2024 02:12:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IHv6pWwEr4pnb6n7qMvlM1P/ccspbExRtH23xBbttqteMwL8MbSaCuJ28B9LGm6mWZ/o2l4 X-Received: by 2002:a17:907:c70b:b0:a2c:c556:bd3d with SMTP id ty11-20020a170907c70b00b00a2cc556bd3dmr2574023ejc.151.1705313525203; Mon, 15 Jan 2024 02:12:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705313525; cv=none; d=google.com; s=arc-20160816; b=LPmG/oGhYAIqRhi1wjjk6J2Ok7EF22CXRJ1xuLYM/Bb1M8BMVECjzVh/1Sm66Mv13Z LDczsXgVsYyVSDun93hXwoLCX8ny/o60YA7pkj5+K4Ng6O/cH0oFQvhtMsvPwKebNJT+ LhOTGYWzv0iwMQDJ2/IvS8BBoSq1Iwx7TA2nE3vGdKz9bEIprZIOFIajB9FpiroYVlVo jPqWhDPiJROO4Z62s6wJsxyw+fPzgLc9PNkYVE/XwGIlbQr6aofBjofm2KdIZ9k+tNF3 hAJJ7R/9ggXQTlikgUxcGk3oXhMc4FEhWOxVsq7Aj0jDU0jisrXN7yxJwdaSZD4rEGgp L6jQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=FKR76xvkppExc7Ae5ic+6mPrVpT9dqve2Cn1Oe/qHYw=; fh=FKC/h5VVoA65vzO0ouUOa33iBRZCVTrZz9+QoLDKUqs=; b=rzXMzmDjkzVyXd5ZTI6C7y54G/LwlaNmvJwvPKOTKCRStd073pwpGQLifkqEYdXj4d sQTWQEyX0l5Ab3uFE3MAgwAnoJcSb9yYSH1iP39pXfVMKxRoUZtnvGOp8INrVOQDePlI pq1XlFxPyD2CxxANQ0MvZcxUbYIGnT6RwbQ0mDEQL+s2YDqACK6Twu/UWX/5aL+ghpDQ mkW3v0sn1LAehWKppzrRvRm4swEaf7z5WXpxUBdpo8Um15xqA4yCeRVhj3uqhW3uy7EF g2KnvrsGdm6GtKBke6CR9CDuCo2Csq2u9qye2gBYwkVK54tt6ggGFc3mMkW5rIGO43cj 9h0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=prIktfAD; spf=pass (google.com: domain of linux-kernel+bounces-25862-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-25862-ouuuleilei=gmail.com@vger.kernel.org" Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Pavel Machek , Sunil V L Subject: [PATCH v2 -next 2/3] ACPI: RISC-V: Add LPI driver Date: Mon, 15 Jan 2024 15:40:55 +0530 Message-Id: <20240115101056.429471-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115101056.429471-1-sunilvl@ventanamicro.com> References: <20240115101056.429471-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788150834992973615 X-GMAIL-MSGID: 1788150834992973615 Enable Low Power Idle (LPI) based cpuidle driver for RISC-V platforms. It depends on SBI HSM calls for idle state transitions. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- drivers/acpi/riscv/Makefile | 3 +- drivers/acpi/riscv/cpuidle.c | 81 ++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+), 1 deletion(-) create mode 100644 drivers/acpi/riscv/cpuidle.c diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index 8b3b126e0b94..7309d92dd477 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += rhct.o +obj-y += rhct.o +obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o diff --git a/drivers/acpi/riscv/cpuidle.c b/drivers/acpi/riscv/cpuidle.c new file mode 100644 index 000000000000..052ec3942902 --- /dev/null +++ b/drivers/acpi/riscv/cpuidle.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RISCV_FFH_LPI_TYPE_MASK GENMASK_ULL(63, 60) +#define RISCV_FFH_LPI_RSVD_MASK GENMASK_ULL(59, 32) + +#define RISCV_FFH_LPI_TYPE_SBI BIT_ULL(60) + +static int acpi_cpu_init_idle(unsigned int cpu) +{ + int i; + struct acpi_lpi_state *lpi; + struct acpi_processor *pr = per_cpu(processors, cpu); + + if (unlikely(!pr || !pr->flags.has_lpi)) + return -EINVAL; + + if (!is_sbi_hsm_supported()) + return -ENODEV; + + if (pr->power.count <= 1) + return -ENODEV; + + for (i = 1; i < pr->power.count; i++) { + u32 state; + + lpi = &pr->power.lpi_states[i]; + + /* + * Validate Entry Method as per FFH spec. + * bits[63:60] should be 0x1 + * bits[59:32] should be 0x0 + * bits[31:0] represent a SBI power_state + */ + if (((lpi->address & RISCV_FFH_LPI_TYPE_MASK) != RISCV_FFH_LPI_TYPE_SBI) || + (lpi->address & RISCV_FFH_LPI_RSVD_MASK)) { + pr_warn("Invalid LPI entry method %#llx\n", lpi->address); + return -EINVAL; + } + + state = lpi->address; + if (!sbi_suspend_state_is_valid(state)) { + pr_warn("Invalid SBI power state %#x\n", state); + return -EINVAL; + } + } + + return 0; +} + +int acpi_processor_ffh_lpi_probe(unsigned int cpu) +{ + return acpi_cpu_init_idle(cpu); +} + +int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) +{ + u32 state = lpi->address; + + if (state & SBI_HSM_SUSP_NON_RET_BIT) + return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, + lpi->index, + state); + else + return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(sbi_suspend, + lpi->index, + state); +} From patchwork Mon Jan 15 10:10:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 188102 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:693c:2614:b0:101:6a76:bbe3 with SMTP id mm20csp1610261dyc; Mon, 15 Jan 2024 02:12:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IED3X5BqkSZFRXyNOmvLl2KrHgkBuC0AeV6t8aidG1ZHwERttsRflOxeKfZb2cRYZbhZWsq X-Received: by 2002:a05:620a:1485:b0:783:25b7:aeec with SMTP id w5-20020a05620a148500b0078325b7aeecmr6617166qkj.5.1705313541426; Mon, 15 Jan 2024 02:12:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705313541; cv=none; d=google.com; s=arc-20160816; b=JOXo6I/50Hu3y2oXaeUjxu3XCV+M4pjv/+Ie4+FIteodS966uukrVSfDPClBfzNTSj AyZDJ/yOIyhscuPSqK65WVL9WU5tssSegelQQnSTtM2GEHj2Rks4OFtRVN/fMM4bj6FY 4SlQOL48OCTAJX1hvc8riwY0xBR8CZEET/QP2w+ONJ+069CscATPjtWxJyfsx1M83XSF 6jgrRsdDlW5u/jIwpQaAU9J2/T+2JgjEYCkSbwLNYZTaefVEMJkWJRAjt4agUfywPYDg oqOEkC+rPAJOfJgoI/VfS3GmI3g/9urcQwl0xAF2MezRVfmIiUVFr7hUxCXXwirX43xN Ikhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=QtA1yi7bJhENd0OSwZZPO3/DRQ+e8frz78vUteV9MTU=; fh=FKC/h5VVoA65vzO0ouUOa33iBRZCVTrZz9+QoLDKUqs=; b=b+33SovZk64aFFd4qG4g7bzhWSypAP8StJnuWPTbOoeQ8EdzeBQr1I9tuV4xynKdia xsUunu1Arg6HL7NQ+w6jVJufFrMKEXkphc8rs6s9YvgEVAA+6YW+pI2dj4wNYFxKq+HV FjybFCHWUIl/LEmV+rUi/oAI2LPpvK5NJd8awmx5PMXGbx1peBlw6/oGjAkEjR5kYpJz 1UU/x++CN2ATa1F8nnlPKo8rGdsee2NVAlSCVU+TL5/LS82Ow9uuKMS6AYmGEq+PjGix GE7mdnytpCNasH1Up/uv9hbycLj9Lgv/EKCxDtsoLZu+LSJ9S/vLXpjbCpaTE/GYPcxD GpSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=bZKZ5RwK; spf=pass (google.com: domain of linux-kernel+bounces-25863-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-25863-ouuuleilei=gmail.com@vger.kernel.org" Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Pavel Machek , Sunil V L Subject: [PATCH v2 -next 3/3] ACPI: Enable ACPI_PROCESSOR for RISC-V Date: Mon, 15 Jan 2024 15:40:56 +0530 Message-Id: <20240115101056.429471-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115101056.429471-1-sunilvl@ventanamicro.com> References: <20240115101056.429471-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788150851855477576 X-GMAIL-MSGID: 1788150851855477576 The ACPI processor driver is not currently enabled for RISC-V. This is required to enable CPU related functionalities like LPI and CPPC. Hence, enable ACPI_PROCESSOR for RISC-V. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- drivers/acpi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index f819e760ff19..9a920752171c 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -282,7 +282,7 @@ config ACPI_CPPC_LIB config ACPI_PROCESSOR tristate "Processor" - depends on X86 || ARM64 || LOONGARCH + depends on X86 || ARM64 || LOONGARCH || RISCV select ACPI_PROCESSOR_IDLE select ACPI_CPU_FREQ_PSS if X86 || LOONGARCH select THERMAL