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X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787808901194859859 X-GMAIL-MSGID: 1787808901194859859 This adds a new @subsubsection "AVR Internal Options" in "AVR Options". "Internal" options are options that are not supposed to be set by the user, but are solely required to ship information from device-specs to the compiler proper. (Without device-specs, non of these options would be needed because then all information would be available in the compiler proper.) Johann --- AVR: invoke.texi: Put internal options in their own @subsubsection. gcc/ * doc/invoke.texi (AVR Options): Move -mrmw, -mn-flash, -mshort-calls and -msp8 to... (AVR Internaö Options): ...this new @subsubsection. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index c1d01d32c1d..c1bb54b4109 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -23695,11 +23695,6 @@ Do not save registers in @code{main}. The effect is the same like attaching attribute @ref{AVR Function Attributes,,@code{OS_task}} to @code{main}. It is activated per default if optimization is on. -@opindex mn-flash -@item -mn-flash=@var{num} -Assume that the flash memory has a size of -@var{num} times 64@tie{}KiB. - @opindex mno-interrupts @item -mno-interrupts Generated code is not compatible with hardware interrupts. @@ -23721,35 +23716,6 @@ differ from instructions in the assembler code. Relaxing must be turned on if linker stubs are needed, see the section on @code{EIND} and linker stubs below. -@opindex mrmw -@item -mrmw -Assume that the device supports the Read-Modify-Write -instructions @code{XCH}, @code{LAC}, @code{LAS} and @code{LAT}. - -@opindex mshort-calls -@item -mshort-calls - -Assume that @code{RJMP} and @code{RCALL} can target the whole -program memory. - -This option is used internally for multilib selection. It is -not an optimization option, and you don't need to set it by hand. - -@opindex msp8 -@item -msp8 -Treat the stack pointer register as an 8-bit register, -i.e.@: assume the high byte of the stack pointer is zero. -In general, you don't need to set this option by hand. - -This option is used internally by the compiler to select and -build multilibs for architectures @code{avr2} and @code{avr25}. -These architectures mix devices with and without @code{SPH}. -For any setting other than @option{-mmcu=avr2} or @option{-mmcu=avr25} -the compiler driver adds or removes this option from the compiler -proper's command line, because the compiler then knows if the device -or architecture has an 8-bit stack pointer and thus no @code{SPH} -register or not. - @opindex mstrict-X @item -mstrict-X Use address register @code{X} in a way proposed by the hardware. This means @@ -24179,6 +24145,45 @@ Reflects the @code{--with-libf7=@{libgcc|math|math-symbols@}} @end table +@subsubsection AVR Internal Options +The following options are used internally by the compiler and to communicate +between device specs files and the compiler proper. You don't need to set these +options by hand, in particular they are not optimization options. +Using these options in the wrong way may lead to sub-optimal or wrong code. +They are documented for completeness, and in order to get a better +understanding of +@w{@uref{https://gcc.gnu.org/wiki/avr-gcc#spec-files,device specs}} +files. + +@table @gcctabopt + +@opindex mn-flash +@item -mn-flash=@var{num} +Assume that the flash memory has a size of @var{num} times 64@tie{}KiB. +This determines which @code{__flash@var{N}} address spaces are available. + +@opindex mrmw +@item -mrmw +Assume that the device supports the Read-Modify-Write +instructions @code{XCH}, @code{LAC}, @code{LAS} and @code{LAT}. + +@opindex mshort-calls +@item -mshort-calls + +Assume that @code{RJMP} and @code{RCALL} can target the whole +program memory. This option is used for multilib generation and selection +for the devices from architecture @code{avrxmega3}. + +@opindex msp8 +@item -msp8 +Treat the stack pointer register as an 8-bit register, +i.e.@: assume the high byte of the stack pointer is zero. +This option is used by the compiler to select and +build multilibs for architectures @code{avr2} and @code{avr25}. +These architectures mix devices with and without @code{SPH}. + +@end table + @node Blackfin Options @subsection Blackfin Options @cindex Blackfin Options