From patchwork Mon Nov 14 01:40:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19503 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913301wru; Sun, 13 Nov 2022 17:50:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf4F63BI2/t5W2FGqE4DKtFJq/9KwAmowZITGNc8K+aRHwu2pJ/2p16wmndD7mZg2CTxakXq X-Received: by 2002:a17:907:20d1:b0:78d:554f:fb16 with SMTP id qq17-20020a17090720d100b0078d554ffb16mr8804815ejb.151.1668390653936; Sun, 13 Nov 2022 17:50:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390653; cv=none; d=google.com; s=arc-20160816; b=rHM734OnRFThv7O7BLCWOH8IE5eb4AaeL7qXQ1l4N5iuopRPXFk/DGyE9Nqft5q+3k ebN4rrTwqB5T/q21A37urBLFM2Eqb2mOiMMSonimemZbaCa1SPUqT0RMstlOX3i33H4h lKKu/ZhQ/LHrtP0dLyfeS1VP2bOmmgVNWnw2qW8VnWgf1UEheCxxoDxD56ndt5UxDflx 2TlpjR4iVT9kftDNyLWt1M3AtmWP5Xs4ukOEWHFP8XDEUYZx7OB86li/oLOrCDK4pUsS SjwTCHfMLKv11Uca5UdK7scOjIziZlS9jeetPb43mEwEsWiawK2FhwOUvG1iiFlo/7ew mVrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rGiYbjeU1wqcn69qKo3PasmSGG/WasVZjOLW3LXW3pg=; b=QffBUTRJlIVNqq/IrVxuuJoWGrTb46anTMFJoOy/qJSa4Emw7h2itLiFkzC4jegzOw cb+C8EHidf29ViKh+sELwygeKTOBM5XMFHg88K9nVRMJbatbdhjKisDtrkfZJOUFktcb Nbpbo0/H0SAK/TV6T2z0s/GIiFlcAZM3hZNcvMUFjSFJvhMc3CX/RCprX5G/Av55Gpka Sx3hZPqCyUwTaLXJabeEn8+WSvxXainVki2in79lupTxSVHlRHgXeQFWFnoOVWzJ2+Yq xQIWMdIISa/gf2FBQrxgJ+ilp5VDl2m9elxUEZT7NphfQLc+0f1/U55wesWtyu2KEW5V r38g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=nBXe9Mw8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ga7-20020a1709070c0700b0078a19032c70si9059843ejc.334.2022.11.13.17.50.30; Sun, 13 Nov 2022 17:50:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=nBXe9Mw8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235697AbiKNBr4 (ORCPT + 99 others); Sun, 13 Nov 2022 20:47:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235694AbiKNBrv (ORCPT ); Sun, 13 Nov 2022 20:47:51 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFDE5DF7C for ; Sun, 13 Nov 2022 17:47:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390469; x=1699926469; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IyTuYPrNYIXcLY03KDjNi2jgFamisN6EaEiSZ9Xh4MM=; b=nBXe9Mw82gWlB0AEFHpToihDRjTZNgFgfQisZVIz9UPEeQh2k2J6Ilpu FvvtszNXDHDV6WqpWwrpVT29yB6Lo4UWog21l2+NmvF/pVdY4nmJIlo0J /tp8MaMAWqI6oDde/J1S5oBQVjCEF4q3DreLrUngkzuSCeuN0FLBCcrNI 7JLhT5bLH55OZzc3VF/leXGw8da5CUHHATNjFK46944+MBFxMy3rGqCMU DTE0n4ABif9IGSWWCY5rzIF1PRIz5XfZqVEroV+HtER5tLjpCJ41zFC9e fUdgCmNMB58QzV1LYgrz+nnUwT48olHv7CbdDml1ICdBd+vftGA34vp/K g==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006683" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006683" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124199" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124199" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:47 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 1/7] iommu/vt-d: Allocate pasid table in device probe path Date: Mon, 14 Nov 2022 09:40:43 +0800 Message-Id: <20221114014049.3959-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434397847414749?= X-GMAIL-MSGID: =?utf-8?q?1749434397847414749?= Whether or not a domain is attached to the device, the pasid table should always be valid as long as it has been probed. This moves the pasid table allocation from the domain attaching device path to device probe path and frees it in the device release path. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f298e51d5aa6..bc42a2c84e2a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2477,13 +2477,6 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) /* PASID table is mandatory for a PCI device in scalable mode. */ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { - ret = intel_pasid_alloc_table(dev); - if (ret) { - dev_err(dev, "PASID table allocation failed\n"); - dmar_remove_one_dev_info(dev); - return ret; - } - /* Setup the PASID entry for requests without PASID: */ if (hw_pass_through && domain_type_is_si(domain)) ret = intel_pasid_setup_pass_through(iommu, domain, @@ -4108,7 +4101,6 @@ static void dmar_remove_one_dev_info(struct device *dev) iommu_disable_dev_iotlb(info); domain_context_clear(info); - intel_pasid_free_table(info->dev); } spin_lock_irqsave(&domain->lock, flags); @@ -4466,6 +4458,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) struct device_domain_info *info; struct intel_iommu *iommu; u8 bus, devfn; + int ret; iommu = device_to_iommu(dev, &bus, &devfn); if (!iommu || !iommu->iommu.ops) @@ -4509,6 +4502,16 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) dev_iommu_priv_set(dev, info); + if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { + ret = intel_pasid_alloc_table(dev); + if (ret) { + dev_err(dev, "PASID table allocation failed\n"); + dev_iommu_priv_set(dev, NULL); + kfree(info); + return ERR_PTR(ret); + } + } + return &iommu->iommu; } @@ -4517,6 +4520,7 @@ static void intel_iommu_release_device(struct device *dev) struct device_domain_info *info = dev_iommu_priv_get(dev); dmar_remove_one_dev_info(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); From patchwork Mon Nov 14 01:40:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19500 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1912988wru; Sun, 13 Nov 2022 17:49:44 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Lc+XtKCwNvVy+Ao7APbkBVJOV+1fNvsxGWgReCWNz4a3ytuaWWFtd1CYCgPxdLC0vqbZy X-Received: by 2002:a17:907:110d:b0:7a9:6107:572a with SMTP id qu13-20020a170907110d00b007a96107572amr8971526ejb.729.1668390584011; Sun, 13 Nov 2022 17:49:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390584; cv=none; d=google.com; s=arc-20160816; b=0I48DnbIEB6FdwhkKu5mpEsm1HekbmavQhluofUXRRm9rmb45bI2D5nh/A2on06Oa2 aU6kiJRpEguPy9M48CGOcw/NJW7r7lduydKnraKin0fdWFfBkhDxdwVVi9A3+izC3PvP b1pyApGY5P9eV0utDoL9ITcB2C/zW8xQDVq3sRmSfHQTqmhJ0nrHwCwrfD8fifhJzJmY ztrNU+E6V4cdDOFMceLBAaE8mh/IMcKBRyFN3PssbkUcX3YPPZ9sbCHp3m2q4MM2FpOm KZ8HUg2SPZwYeYU3rzkLPmnav6QkaEfnqCph0MakjyieOHYoMNKX7b7zhzu8Y5PdOXr0 10BA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=atbQ4D46TR5gbspAkoeRP+L2FElPZsU6Hux5U2N9SE4=; b=c9jFBTiytOSd7mKmiFpNTwqjJCwijJ6LgolwCNfC6Z4uEDvWdgM76X0FEhI7chm2Mv qm8/iBNaHc57ja3/SJlr8wFtuJdpieI8tLyH+A0eB1kzcbvyYagy+invJB8YsNTFZmHH EX3ZI6dDb8o17y4xCT/bP8XsY2u9KNaJy6j4iWb03gIaUHZga4rZ2FqylaKezivMkuyI jqo2+uaG9EcQBFaLKawavs/++OuVaZK+Xrlhy2cpav25MTBWOEQii5SwyZRZ/xHPbuXr 4f/nwn+MW0iYrVfqXpDX1UQQHaPu9DOnr+ZzgJV6N2Hn5oS9SNUFbW9mD98NjOgqGtXP fKIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Mf4GdQbu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i10-20020a0564020f0a00b004622a17f12bsi7549756eda.259.2022.11.13.17.49.20; Sun, 13 Nov 2022 17:49:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Mf4GdQbu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235720AbiKNBsE (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235712AbiKNBry (ORCPT ); Sun, 13 Nov 2022 20:47:54 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF17ADF99 for ; Sun, 13 Nov 2022 17:47:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390472; x=1699926472; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7aamF6wGSE378rpzekeRabhg3g404C8LbAS2Hr4cz0g=; b=Mf4GdQbulA6M59HtXAZTbaqR8JCIqPg2Wa6D86Mg/vUmy1ImJST3JqEF 2AJguVdmpJmiyDhWEZaXXG3ZZxgjTPD5U/SX9murcKuviE1sySHvj4rmy BN0+Wa4QqVuCJbfS0PAEyAlltljMLV1C51R0ROLaH9ZE/8KamYvzG4c2B KlLCYRWIXkbZ4ctwtpEUEFG5zqx0qLSUUoMydl3O5Z1CpuW25k2DaGceV QopnrHHvFLLE6qL5YIqSUZ9WSWQh6oULr7J+JqtVEd/elXu+7LDZTeiVk EokazkPVhB2kTRy+7HInVEjsuW5pmyxedGi7hMKsbaqiunp5L7GDoKWjJ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006687" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006687" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124208" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124208" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:49 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 2/7] iommu/vt-d: Add device_block_translation() helper Date: Mon, 14 Nov 2022 09:40:44 +0800 Message-Id: <20221114014049.3959-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434325177642880?= X-GMAIL-MSGID: =?utf-8?q?1749434325177642880?= If domain attaching to device fails, the IOMMU driver should bring the device to blocking DMA state. The upper layer is expected to recover it by attaching a new domain. Use device_block_translation() in the error path of dev_attach to make the behavior specific. The difference between device_block_translation() and the previous dmar_remove_one_dev_info() is that, in the scalable mode, it is the RID2PASID entry instead of context entry being cleared. As a result, enabling PCI capabilities is moved up. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 44 ++++++++++++++++++++++++++++++++----- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index bc42a2c84e2a..16eeff2f7e19 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -277,7 +277,7 @@ static LIST_HEAD(dmar_satc_units); #define for_each_rmrr_units(rmrr) \ list_for_each_entry(rmrr, &dmar_rmrr_units, list) -static void dmar_remove_one_dev_info(struct device *dev); +static void device_block_translation(struct device *dev); int dmar_disabled = !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm = IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON); @@ -1402,7 +1402,7 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; - if (!info || !dev_is_pci(info->dev)) + if (!dev_is_pci(info->dev)) return; pdev = to_pci_dev(info->dev); @@ -2047,7 +2047,6 @@ static int domain_context_mapping_one(struct dmar_domain *domain, } else { iommu_flush_write_buffer(iommu); } - iommu_enable_pci_caps(info); ret = 0; @@ -2489,7 +2488,7 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) dev, PASID_RID2PASID); if (ret) { dev_err(dev, "Setup RID2PASID failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } } @@ -2497,10 +2496,12 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) ret = domain_context_mapping(domain, dev); if (ret) { dev_err(dev, "Domain context map failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } + iommu_enable_pci_caps(info); + return 0; } @@ -4111,6 +4112,37 @@ static void dmar_remove_one_dev_info(struct device *dev) info->domain = NULL; } +/* + * Clear the page table pointer in context or pasid table entries so that + * all DMA requests without PASID from the device are blocked. If the page + * table has been set, clean up the data structures. + */ +static void device_block_translation(struct device *dev) +{ + struct device_domain_info *info = dev_iommu_priv_get(dev); + struct intel_iommu *iommu = info->iommu; + unsigned long flags; + + iommu_disable_dev_iotlb(info); + if (!dev_is_real_dma_subdevice(dev)) { + if (sm_supported(iommu)) + intel_pasid_tear_down_entry(iommu, dev, + PASID_RID2PASID, false); + else + domain_context_clear(info); + } + + if (!info->domain) + return; + + spin_lock_irqsave(&info->domain->lock, flags); + list_del(&info->link); + spin_unlock_irqrestore(&info->domain->lock, flags); + + domain_detach_iommu(info->domain, iommu); + info->domain = NULL; +} + static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; @@ -4232,7 +4264,7 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, struct device_domain_info *info = dev_iommu_priv_get(dev); if (info->domain) - dmar_remove_one_dev_info(dev); + device_block_translation(dev); } ret = prepare_domain_attach_device(domain, dev); From patchwork Mon Nov 14 01:40:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19501 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913104wru; Sun, 13 Nov 2022 17:50:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf4chDejxG4maRmsb3hIQYThVehUehDyZ3F6AX5xmeyFFG3e+3w7Pf2U28FnsRZKTMWm3cmk X-Received: by 2002:a17:906:349b:b0:7a1:e4c2:fb0b with SMTP id g27-20020a170906349b00b007a1e4c2fb0bmr8822837ejb.464.1668390608773; Sun, 13 Nov 2022 17:50:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390608; cv=none; d=google.com; s=arc-20160816; b=v93ePd57i/yPKsEblYRHLMF3B0U4m/f/1bzApjpQ0DXpe/kIUYWC4DP+jbvb8GqoNw iTX9snW4lqJQwNge2i3+vIi/LhDQkToL6kGBO/GtfPmrUms16x8Fc+fBTi/yc2aOU6P1 CrKOraD9vgnGyFWFqGNNHFxt1nQvRIHD4jMOvDDra5s+z9ubNwEZf9TfKvP/WEwRLQJH 3xD6LO4plpJ+5sx56V/7rXfQnMVBWhzzg12/o4kd9T0fpt/kS4CCPQSXdv15bceDhaFc 24csVZAghbF3nsZ4ccfG77Rz4HOhI/waoJ5iQ/wZR3kQkWkM5Uqk87aA+x7PVyPBvFeD 0q2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qeRHppzz5rxNIY2Tw7Vs5udNbROzZIWPjQi9lWE9BjU=; b=lZ+Kr/8HiNSvNAPKtNMNeQViN6ti/NiBlXI8S6KWIooCCW/z0H+Z24yj7oIhRoplo8 vBeVqDkoU8YbLIz3L2e2REpoYc2n+X9c8O+oRvevUUxh6N7ZEgRaMVeBuQ+LDhK7U9dT ESC4R7LnMNaaKH0ePcIz/GZM55WmCU8bpJ5XC6mxRvK56Vn+wrIehdvZypCbQFcYMLeO X/4X3SSb8H3ZVahj4A+J0GltaeHjPDZnQGVBCHhC1u0upm4XOuhm1cr7VFvomOTCn0pg fO6xM/it/7pJo30KhmO3GErpzNBwr+8vC4qXLrPZROg49puxjySu2DFVwLfKO4OzQNg0 baHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=AsfhpGOY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hc16-20020a170907169000b0078db371355esi1362726ejc.987.2022.11.13.17.49.45; Sun, 13 Nov 2022 17:50:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=AsfhpGOY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235564AbiKNBsM (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235700AbiKNBr4 (ORCPT ); Sun, 13 Nov 2022 20:47:56 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBEE5DFAD for ; Sun, 13 Nov 2022 17:47:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390474; x=1699926474; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sNLRuDFy+mxQWPGwH2w3Z3rqtpY2BnCQzmJS+aDcxsw=; b=AsfhpGOYNa+FITrMxBlsfe27F/Jg4UJt3j4mU36quohdO7sOw8eqT52i Ep+QMNGAWx/EimV57qx+ZH4qCivrCKj8lWbln4f5Pnm8VO0A9HB3FlUMq wso0dI9JjHrd0vdfDRBszqRdqfQ503j+v7yZsCCW2CBvvoNPqKdJ2blFo zNBFVv4mI7jiIvs4hmWKBzbnIgKX5HAr5ZkYCmcYmz+UajDnmR5ZyO8bU k+W+VoA5+Nkzor/S6gPcSy58fA7SypMGHaZVltKm3pmSUGzxJxreKJjWV 5zuRjPTGRACxgY9knA3huCdKuhFNUYb0peXY2mDGYgFqhrN3Tp3vmo+4v A==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006688" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006688" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124214" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124214" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:52 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 3/7] iommu/vt-d: Add blocking domain support Date: Mon, 14 Nov 2022 09:40:45 +0800 Message-Id: <20221114014049.3959-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434350720621111?= X-GMAIL-MSGID: =?utf-8?q?1749434350720621111?= The Intel IOMMU hardwares support blocking DMA transactions by clearing the translation table entries. This implements a real blocking domain to avoid using an empty UNMANAGED domain. The detach_dev callback of the domain ops is not used in any path. Remove it to avoid dead code as well. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 16eeff2f7e19..3d3fa182fcb1 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -278,6 +278,7 @@ static LIST_HEAD(dmar_satc_units); list_for_each_entry(rmrr, &dmar_rmrr_units, list) static void device_block_translation(struct device *dev); +static void intel_iommu_domain_free(struct iommu_domain *domain); int dmar_disabled = !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm = IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON); @@ -4164,12 +4165,28 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width) return 0; } +static int blocking_domain_attach_dev(struct iommu_domain *domain, + struct device *dev) +{ + device_block_translation(dev); + return 0; +} + +static struct iommu_domain blocking_domain = { + .ops = &(const struct iommu_domain_ops) { + .attach_dev = blocking_domain_attach_dev, + .free = intel_iommu_domain_free + } +}; + static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; switch (type) { + case IOMMU_DOMAIN_BLOCKED: + return &blocking_domain; case IOMMU_DOMAIN_DMA: case IOMMU_DOMAIN_DMA_FQ: case IOMMU_DOMAIN_UNMANAGED: @@ -4204,7 +4221,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) static void intel_iommu_domain_free(struct iommu_domain *domain) { - if (domain != &si_domain->domain) + if (domain != &si_domain->domain && domain != &blocking_domain) domain_exit(to_dmar_domain(domain)); } @@ -4274,12 +4291,6 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, return domain_add_dev_info(to_dmar_domain(domain), dev); } -static void intel_iommu_detach_device(struct iommu_domain *domain, - struct device *dev) -{ - dmar_remove_one_dev_info(dev); -} - static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot, gfp_t gfp) @@ -4787,7 +4798,6 @@ const struct iommu_ops intel_iommu_ops = { #endif .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = intel_iommu_attach_device, - .detach_dev = intel_iommu_detach_device, .map_pages = intel_iommu_map_pages, .unmap_pages = intel_iommu_unmap_pages, .iotlb_sync_map = intel_iommu_iotlb_sync_map, From patchwork Mon Nov 14 01:40:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19502 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913133wru; Sun, 13 Nov 2022 17:50:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf7QzrY1STLIeMHo8g8THxsfuJ+QwAft2oSPoqdR6HChysuJ7xcFuwWgNEaKksgNomw+zI8y X-Received: by 2002:a05:6402:2070:b0:461:8692:2787 with SMTP id bd16-20020a056402207000b0046186922787mr9584357edb.199.1668390614741; Sun, 13 Nov 2022 17:50:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390614; cv=none; d=google.com; s=arc-20160816; b=EDdIqJU4XRhkHdA6/XICsDE14jDtpyLWTaX6U+45CcWkwsKgYqK37D43ab44mNjJ2V ntPnuDMEClU9LXm88f5/iaT5vG2KcOaPO6z9zE3rf27CzyV50dJUH+e7U01huUO5sEc/ /OJgfnuXf4aNveEMtFkD1TzNpQh27eH2EMlRFtCwajRei8zcpHbz0ALFi+CDZS2FWLV4 3QCzdCcQ3x4kEVnCJQXFPMCe5IL50KWdIuPLVcrj5biXHQQWH5cTTCZPhjAMTvr7skjI avi+f9NKxfy+nZUzb/s2L3hxEmwt0MbVjaJRZtvYUI7b0EyJgXKkAd+bQLWmD9hg9sOq Lv8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+LQJgBsi2FNAsgMuUHEg0heW1WdgpMLtfw/b/XVzgho=; b=pvoXeCFUjYZtiOFpMLmfJl6SbwSfR5ZCXNdvCzEUwMg4mhfrR2crPEr/iEZiLoatnz ligLaZ493hc9zQmQUI2SNyAZJnOaie4kj9NdM+BRR+pm/l2rzWl+bxglY2SfzDkcaKIb lctRkDf6vN8SyFB+7pJ5k4+V0EQksgitie3ElCylkTfv8GjQFqvt0y/HF+Ao1lShfwhC PZLlE7WoXXYylK1ypT1vUi9bJdLaoy8g0nJg71KwZhjCWa6cY7T3PbshWgE9LcgT/Ud+ HJVHVOjm9SmgIP6oCL0NgVaygPEr+8IPsgpCtXCuYzD4cWUzM6GVg28xTjygLM1HPl9a +3jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=hAOb7q5i; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i37-20020a0564020f2500b004589ea2d983si7747100eda.287.2022.11.13.17.49.51; Sun, 13 Nov 2022 17:50:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=hAOb7q5i; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235600AbiKNBsQ (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235706AbiKNBsC (ORCPT ); Sun, 13 Nov 2022 20:48:02 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26540DFC3 for ; Sun, 13 Nov 2022 17:47:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390477; x=1699926477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2i7NS4jJ8/ISC5Wd85I3fce+lIQh/XAYJASCa5qbM8k=; b=hAOb7q5i/q19ZW8Bw+QvnCjUHXbaDEY1kmdPySjhyJJTzZ14MEslADqM 0jUAU0KauyAmHABR/IiG6bza46v9nnrqkE1kMEQFBKwn/4R5MjKTukJV8 sPi4RF8ZFT00oUs9GDfviULJ8MXTZTGVIPr8p345MXhbR0xEIwW1F1zRE UIHb+34PjMkEOsTpXrokhgrIGYs8VgJsyQhAwaRkcaWqAG9BZcIkcHyla s7aR+okYyfuCtka7pcPS5GBj7FPD9cJwF1cN6TluGpKV+W+tSuqkMUv0J cmkUGAt9rJbIeD9T6bGd4aMF9IBJcjOpwRwI1FU5pWGa5+Iw46YY90/b3 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006690" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006690" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124225" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124225" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:54 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 4/7] iommu/vt-d: Fold dmar_remove_one_dev_info() into its caller Date: Mon, 14 Nov 2022 09:40:46 +0800 Message-Id: <20221114014049.3959-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434357080938620?= X-GMAIL-MSGID: =?utf-8?q?1749434357080938620?= Fold dmar_remove_one_dev_info() into intel_iommu_release_device() which is its only caller. Replace most of the code with device_block_translation() to make the code neat and tidy. Rename iommu_disable_dev_iotlb() to iommu_disable_pci_caps() to pair with iommu_enable_pci_caps(). Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 3d3fa182fcb1..f165e0d37bab 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1443,7 +1443,7 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) } } -static void iommu_disable_dev_iotlb(struct device_domain_info *info) +static void iommu_disable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; @@ -4089,30 +4089,6 @@ static void domain_context_clear(struct device_domain_info *info) &domain_context_clear_one_cb, info); } -static void dmar_remove_one_dev_info(struct device *dev) -{ - struct device_domain_info *info = dev_iommu_priv_get(dev); - struct dmar_domain *domain = info->domain; - struct intel_iommu *iommu = info->iommu; - unsigned long flags; - - if (!dev_is_real_dma_subdevice(info->dev)) { - if (dev_is_pci(info->dev) && sm_supported(iommu)) - intel_pasid_tear_down_entry(iommu, info->dev, - PASID_RID2PASID, false); - - iommu_disable_dev_iotlb(info); - domain_context_clear(info); - } - - spin_lock_irqsave(&domain->lock, flags); - list_del(&info->link); - spin_unlock_irqrestore(&domain->lock, flags); - - domain_detach_iommu(domain, iommu); - info->domain = NULL; -} - /* * Clear the page table pointer in context or pasid table entries so that * all DMA requests without PASID from the device are blocked. If the page @@ -4124,7 +4100,7 @@ static void device_block_translation(struct device *dev) struct intel_iommu *iommu = info->iommu; unsigned long flags; - iommu_disable_dev_iotlb(info); + iommu_disable_pci_caps(info); if (!dev_is_real_dma_subdevice(dev)) { if (sm_supported(iommu)) intel_pasid_tear_down_entry(iommu, dev, @@ -4562,7 +4538,10 @@ static void intel_iommu_release_device(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); - dmar_remove_one_dev_info(dev); + iommu_disable_pci_caps(info); + domain_context_clear(info); + device_block_translation(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); From patchwork Mon Nov 14 01:40:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19504 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913509wru; Sun, 13 Nov 2022 17:51:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf5PvlLvxlXCy28usrlpR9WAOzVHd+EYsab8dYlJzC0CqXR6yrzIpQkyZnnFx7WwV3uEmCIC X-Received: by 2002:a17:906:2f90:b0:7a5:7c1c:cc5c with SMTP id w16-20020a1709062f9000b007a57c1ccc5cmr8887048eji.644.1668390701398; Sun, 13 Nov 2022 17:51:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390701; cv=none; d=google.com; s=arc-20160816; b=MF9LTPur0dQXMl3FPARxFwt8Ev5u/q1boEMQvPn/e1vtc20DSXwFWxvPS6rTV9gOvm BtTSJo8Ha31Zm09rppayefi9VzUC74S/dzav6XpkjE97W0XupcheEjixinKktXlR5BUA +9PFC9p6F5Hvf57onbHwwgyQp7PKKebLPNx5Vn/TZN04FEhvJXNQEIcmXiEsJPxFQEti Di+MWdowJTQl3m07rzBw62RvAUpLECGnfhigh+OYFuzhhR0OcZmy88Y7qzuksN8hMhNT PWhJvE1xtqTZYczVQ/Pxu+sGORETmVdiM7JgKWzQh9jEXJ/WP8jKqo1zkbwuseQeNmDw e8IA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=E0D8vL3u/MuhsC5zgSW0awxMlsEXAgwE+lARnPbRU3c=; b=aGNZyL4Td1YGH5zqGYMIcWOCUyuIfBAThnPys0RyuoUZx2OdrPKFbkTN8Me6PnlwRT BTazxxFbyGixfDskRMUvvsU31TN/rkHkJDn+S0nYW19P0nvpJJ6V7/MUxnPrup4ZnPI0 qr+XcCinelzcpNAqETZ1hv2vyEkI8dTSrnYQ6CRV+J4xB74JPL+GaNL+4I+nKJeikqoY 8pQXmpJgocQo7zUEhip0lbKRodkfaeljmgfpZvHPnpMwQsnM467cRtDyhVIx7JU737m3 VhOdCJ1TYQXN2uRitMUtHX1ov951oTSj91VAjlrTZ2voI6DUkS4vYDEtoF4Amqide94m oc7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=nFxYEGGB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mp41-20020a1709071b2900b0078cffe5dcdesi9408304ejc.451.2022.11.13.17.51.17; Sun, 13 Nov 2022 17:51:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=nFxYEGGB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235440AbiKNBsT (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235719AbiKNBsC (ORCPT ); Sun, 13 Nov 2022 20:48:02 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA94EDFD5 for ; Sun, 13 Nov 2022 17:47:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390479; x=1699926479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j140O/WHBMrsJSHsHEaF6cUi5s3fzlbz0+OwH/+tCb0=; b=nFxYEGGBHsthMlH49Eg2yJ9H9XBTMAd5rQXZBxJO2ZlQrc6gsz7dVA1H sRqv5o8VBNtwNnTw3rbXSUB+buA4Zmj9MaDq/6LjoR3v7AckVFUZ3GI31 MvKKVzdYZJwTnIEaKuIkExZ08qt1uoNcUWWTdy6A+WNCtvj+LOjY6J+j1 NMUOCJ/tWDtyqhbPJgryofQB58IcrYkct0G223Cm1XwGbNuBpX4i6navY V8ZX1I/GLjROhEFNjSjrnn3C0u21n+UlGv4tUpcJYyguWzQPNlGlXnz7u SnDYcnxV81QoX6jlHijDpU5ncwbD2EJhrxtCHrKA6L+ee2WTNG+ZlAbhF Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006695" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006695" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:47:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124231" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124231" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:57 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 5/7] iommu/vt-d: Rename domain_add_dev_info() Date: Mon, 14 Nov 2022 09:40:47 +0800 Message-Id: <20221114014049.3959-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434448276594143?= X-GMAIL-MSGID: =?utf-8?q?1749434448276594143?= dmar_domain_attach_device() is more meaningful according to what this helper does. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f165e0d37bab..6a2a77fce0f8 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2455,7 +2455,8 @@ static int __init si_domain_init(int hw) return 0; } -static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) +static int dmar_domain_attach_device(struct dmar_domain *domain, + struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu; @@ -4264,7 +4265,7 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, if (ret) return ret; - return domain_add_dev_info(to_dmar_domain(domain), dev); + return dmar_domain_attach_device(to_dmar_domain(domain), dev); } static int intel_iommu_map(struct iommu_domain *domain, From patchwork Mon Nov 14 01:40:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19505 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913552wru; Sun, 13 Nov 2022 17:51:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf5KQOzEbd6aXtFk6//P9q9JQS9uuHVcQqhGaB6U6shMjA/FRtOAU9M5guk5zx5oCil210Py X-Received: by 2002:a05:6402:1bdc:b0:463:7312:a94 with SMTP id ch28-20020a0564021bdc00b0046373120a94mr9833204edb.178.1668390714624; Sun, 13 Nov 2022 17:51:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390714; cv=none; d=google.com; s=arc-20160816; b=OXU5w0GoXxwz5OV7mVSUA3YNyvLeZa9tg/dcAt/CnT52BXi27kBELodZ4TMo3y2FNa aY/OTyZkAOQCIKVv3GzzQXu5SPvJjp3FCkyi23dWDP7hMxkDWXqc9c8QGXR+wySA1GUf NUYzaI2eyyOVJfjYs/QafAb5QPfA7pgkudI5u5Zoi2DaPWGzo09xQ+VPl/vcQCKyHyHE Wt5QCCbjP64XN3OvHR3Mgk+DA5eWBhsVsy/PJsNPaKMyrFntIVzZscneXpHc2BCtb/8Y +To5EH3XEb8ak8+LnSLisWC061HUrLXTQL5UyQiQz9mv0S10kvsoDXfUl8ajGJOVyTFT sVRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=awBXebv6+a6i594ZMDIrMtOU8NkpWqHcSKQWropRysk=; b=zj8oGO30PsTta4lCVYV7HTprX+AeexDi+/c6qwIW8P1xYhFEULaC0FaDlivmlnUH5n nDo6f+xj9gpjTqRe2Vv1ZDfxam/tr3wClS/csjU2wwNsNd/nPiTKF5Bhx6T5YN5IW3mZ MDfLn3BbIBodgp2/JvIiH+cfJ4Dx3bxx/oAsrmtMLkgdFdeDTSSIQ/iwydSoFvW9hDG+ z7nYKkivx2is5RRATxCzPjqPppV9YL4T+zNsf6cR/MlpLg0cH/7u4egNmEZcEvWgW8VD 5fXpgVZmetoVwuWA5typHVtXOTmI4wpRt3MS/ALyBoco6XYtDLJaGNmZqyp5YOwZE+3f HJkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UzxnfhdI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a509f0d000000b0045c3f6ad4b0si1058097edf.484.2022.11.13.17.51.31; Sun, 13 Nov 2022 17:51:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UzxnfhdI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235640AbiKNBsX (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234264AbiKNBsF (ORCPT ); Sun, 13 Nov 2022 20:48:05 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D69ADFE8 for ; Sun, 13 Nov 2022 17:48:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390482; x=1699926482; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wb1pQx3gsfHkkziEvcEAu8qE9SzfW0QUG/+y6jvyTe0=; b=UzxnfhdICCJ6EzJgQVqF3yLtKV0KXgLWjW/tS741W6VCUKBCkoBV+LZp H3of70JFbDO18AMeF0J4l5xQumsoPtbCJP/ACNgI6DMkGU+lHCSIkXEzV 94o6OZmZf7CBLnvNX9s2CSraGreVzaOem5Dg08/oigvo92OA8hHjluLVP r3KQGO61qeTrVY2fGuCMPjK0fZhoA+FX3sIuIHqTc5fh9UgiEmOuZLcQ0 lKtPBZeYEd8YNq4ufPRyScggMhoF1DrgsttRQIQSb8bV7P7bH/zwx9MYq egrDOzniQR3LGHaCoalflQOoZd/ratVdjUskLBkaCEjGivdAj9SJQNGnv g==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006699" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006699" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:48:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124247" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124247" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:47:59 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 6/7] iommu/vt-d: Remove unnecessary domain_context_mapped() Date: Mon, 14 Nov 2022 09:40:48 +0800 Message-Id: <20221114014049.3959-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434462091044909?= X-GMAIL-MSGID: =?utf-8?q?1749434462091044909?= The device_domain_info::domain accurately records the domain attached to the device. It is unnecessary to check whether the context is present in the attach_dev path. Remove it to make the code neat. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 47 +++---------------------------------- 1 file changed, 3 insertions(+), 44 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6a2a77fce0f8..83d941b792f2 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -780,19 +780,6 @@ static void domain_flush_cache(struct dmar_domain *domain, clflush_cache_range(addr, size); } -static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 devfn) -{ - struct context_entry *context; - int ret = 0; - - spin_lock(&iommu->lock); - context = iommu_context_addr(iommu, bus, devfn, 0); - if (context) - ret = context_present(context); - spin_unlock(&iommu->lock); - return ret; -} - static void free_context_table(struct intel_iommu *iommu) { struct context_entry *context; @@ -2099,30 +2086,6 @@ domain_context_mapping(struct dmar_domain *domain, struct device *dev) &domain_context_mapping_cb, &data); } -static int domain_context_mapped_cb(struct pci_dev *pdev, - u16 alias, void *opaque) -{ - struct intel_iommu *iommu = opaque; - - return !device_context_mapped(iommu, PCI_BUS_NUM(alias), alias & 0xff); -} - -static int domain_context_mapped(struct device *dev) -{ - struct intel_iommu *iommu; - u8 bus, devfn; - - iommu = device_to_iommu(dev, &bus, &devfn); - if (!iommu) - return -ENODEV; - - if (!dev_is_pci(dev)) - return device_context_mapped(iommu, bus, devfn); - - return !pci_for_each_dma_alias(to_pci_dev(dev), - domain_context_mapped_cb, iommu); -} - /* Returns a number of VTD pages, but aligned to MM page size */ static inline unsigned long aligned_nrpages(unsigned long host_addr, size_t size) @@ -4245,6 +4208,7 @@ static int prepare_domain_attach_device(struct iommu_domain *domain, static int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { + struct device_domain_info *info = dev_iommu_priv_get(dev); int ret; if (domain->type == IOMMU_DOMAIN_UNMANAGED && @@ -4253,13 +4217,8 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, return -EPERM; } - /* normally dev is not mapped */ - if (unlikely(domain_context_mapped(dev))) { - struct device_domain_info *info = dev_iommu_priv_get(dev); - - if (info->domain) - device_block_translation(dev); - } + if (info->domain) + device_block_translation(dev); ret = prepare_domain_attach_device(domain, dev); if (ret) From patchwork Mon Nov 14 01:40:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 19506 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp1913573wru; Sun, 13 Nov 2022 17:52:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf78Vz4E/mwKP70pON/11HwJJnjdZC2IXEEajuxD+IeACw4CbjwOP4CS319mcX5W4Q1/kFaE X-Received: by 2002:a05:6402:194b:b0:461:7a9d:c2ee with SMTP id f11-20020a056402194b00b004617a9dc2eemr9750962edz.36.1668390720378; Sun, 13 Nov 2022 17:52:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668390720; cv=none; d=google.com; s=arc-20160816; b=dGJt9bBT0eAiO2Ac2zVd4sS1AcXWHbILbGKKvfun24JW7c5pJLVB1wWCAINouQ0Zo+ NRT1uctuzOUBUaecSFaPskwOQ+8/OlxWXbgvbJ/iftOJjd+yyt4XHTU7lzJaNrIeZE3N vE6Omhcxi55IDxoU5SK3zk5SSUpR5a/coxMrZ6kZ6mYLGFZ/MG2fx7oUqg1qs1axEujT nH9PsefqXXHsbCCgzgzzWogP50BVADyyzXDuQoSMzKbRH+OabxaWQ6RN9+EE2ETyiE2k pj4CprOxSPqlqw9CJvxejR1h3FND7YpJdtkrnnlZGGE3XNKvjtGjQLpohI5pTLNs/2wM eDSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2sQJWgdv/VDA4msT53Xk1z7hnKJCnqGZLYcYvW7b3W8=; b=Q4b9Y4x+eHI2Zbs8NuTT7oqzytcndmNE5KJJdhvFfILOxYE7qEga93hMHXtKVDilIv SP84xwfGeSh4wm80EULUKSjrbfTZnlI4+Wx1l59F9KbqIFEiDceTSGr32SQ9Do2kQ+lP R9RufAcJjiscyfybfBWK0iJRPEk5MDvBImPeHXIV19AsGoDzPTDjFv26ZvjhrlYuPScK 49VKFFRdD6KuK2dZC88Z0TebGYXeqPPMiCInNylw9uk4CpuplJMKyEkjkZaj49gTiKau k7B8UxVgS+NJmT5RCo1934/jAQIOtmJAFe3fk0LB2g1bOAfmzBOnBfbSCy+gzg/Todg9 XWfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=edadGNb3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h4-20020aa7c604000000b004615bea1d62si6327143edq.472.2022.11.13.17.51.36; Sun, 13 Nov 2022 17:52:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=edadGNb3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235716AbiKNBsi (ORCPT + 99 others); Sun, 13 Nov 2022 20:48:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235715AbiKNBsP (ORCPT ); Sun, 13 Nov 2022 20:48:15 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18043DFC3 for ; Sun, 13 Nov 2022 17:48:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668390485; x=1699926485; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bkg2QOYq9dFPTr9pKF9x/c3y14FfEeHXLWjnD4WbICM=; b=edadGNb3lJvGp8e1R9uBiJ5lo/TNPFd7H++EWZ+ejcKXkp4x4DILcAE/ HfLdwYtLZtjhuwk/0w6azKmqT2z1jfTf1zcL+E4jYROZJqryVgNfw1TBj M4LBoV4DzGDbF6OKHo4FhNPYmxlZIvp5wWmu/yi8AN0yGEB1OMa4jTndS EiPHSBTDa6RPQ009ehstQ+7CtO3Lz37mWZ5LXc9/MaGKcOj0laNen4wD8 rmrQV0ae3FRNQJrXWvo82QDkK2D9Fs0fEDfC8UaLahtp9dXXoqU/QfPQA ciVUjZ29qQ3WWChxxzpuDaQgDn58pgG33lT5pJyQkfTFnofdpRO5aMH6M g==; X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="313006703" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="313006703" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2022 17:48:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10530"; a="707124274" X-IronPort-AV: E=Sophos;i="5.96,161,1665471600"; d="scan'208";a="707124274" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga004.fm.intel.com with ESMTP; 13 Nov 2022 17:48:01 -0800 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 7/7] iommu/vt-d: Use real field for indication of first level Date: Mon, 14 Nov 2022 09:40:49 +0800 Message-Id: <20221114014049.3959-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221114014049.3959-1-baolu.lu@linux.intel.com> References: <20221114014049.3959-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749434467949153971?= X-GMAIL-MSGID: =?utf-8?q?1749434467949153971?= The dmar_domain uses bit field members to indicate the behaviors. Add a bit field for using first level and remove the flags member to avoid duplication. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.h | 15 +++++---------- drivers/iommu/intel/iommu.c | 25 ++++++++++--------------- 2 files changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 251a609fdce3..7b7234689cb4 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -515,14 +515,6 @@ struct context_entry { u64 hi; }; -/* - * When VT-d works in the scalable mode, it allows DMA translation to - * happen through either first level or second level page table. This - * bit marks that the DMA translation for the domain goes through the - * first level page table, otherwise, it goes through the second level. - */ -#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) - struct iommu_domain_info { struct intel_iommu *iommu; unsigned int refcnt; /* Refcount of devices per iommu */ @@ -539,6 +531,11 @@ struct dmar_domain { u8 iommu_coherency: 1; /* indicate coherency of iommu access */ u8 force_snooping : 1; /* Create IOPTEs with snoop control */ u8 set_pte_snp:1; + u8 use_first_level:1; /* DMA translation for the domain goes + * through the first level page table, + * otherwise, goes through the second + * level. + */ spinlock_t lock; /* Protect device tracking lists */ struct list_head devices; /* all devices' list */ @@ -548,8 +545,6 @@ struct dmar_domain { /* adjusted guest address width, 0 is level 2 30-bit */ int agaw; - - int flags; /* flags to find out type of domain */ int iommu_superpage;/* Level of superpages supported: 0 == 4KiB (no superpages), 1 == 2MiB, 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 83d941b792f2..2e6829da460a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -383,11 +383,6 @@ static inline int domain_type_is_si(struct dmar_domain *domain) return domain->domain.type == IOMMU_DOMAIN_IDENTITY; } -static inline bool domain_use_first_level(struct dmar_domain *domain) -{ - return domain->flags & DOMAIN_FLAG_USE_FIRST_LEVEL; -} - static inline int domain_pfn_supported(struct dmar_domain *domain, unsigned long pfn) { @@ -501,7 +496,7 @@ static int domain_update_iommu_superpage(struct dmar_domain *domain, rcu_read_lock(); for_each_active_iommu(iommu, drhd) { if (iommu != skip) { - if (domain && domain_use_first_level(domain)) { + if (domain && domain->use_first_level) { if (!cap_fl1gp_support(iommu->cap)) mask = 0x1; } else { @@ -579,7 +574,7 @@ static void domain_update_iommu_cap(struct dmar_domain *domain) * paging and 57-bits with 5-level paging). Hence, skip bit * [N-1]. */ - if (domain_use_first_level(domain)) + if (domain->use_first_level) domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw - 1); else domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw); @@ -947,7 +942,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US; if (iommu_is_dma_domain(&domain->domain)) pteval |= DMA_FL_PTE_ACCESS; @@ -1500,7 +1495,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, if (ih) ih = 1 << 6; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, pages, ih); } else { unsigned long bitmask = aligned_pages - 1; @@ -1554,7 +1549,7 @@ static inline void __mapping_notify_one(struct intel_iommu *iommu, * It's a non-present to present mapping. Only flush if caching mode * and second level. */ - if (cap_caching_mode(iommu->cap) && !domain_use_first_level(domain)) + if (cap_caching_mode(iommu->cap) && !domain->use_first_level) iommu_flush_iotlb_psi(iommu, domain, pfn, pages, 0, 1); else iommu_flush_write_buffer(iommu); @@ -1570,7 +1565,7 @@ static void intel_flush_iotlb_all(struct iommu_domain *domain) struct intel_iommu *iommu = info->iommu; u16 did = domain_id_iommu(dmar_domain, iommu); - if (domain_use_first_level(dmar_domain)) + if (dmar_domain->use_first_level) qi_flush_piotlb(iommu, did, PASID_RID2PASID, 0, -1, 0); else iommu->flush.flush_iotlb(iommu, did, 0, 0, @@ -1743,7 +1738,7 @@ static struct dmar_domain *alloc_domain(unsigned int type) domain->nid = NUMA_NO_NODE; if (first_level_by_default(type)) - domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; + domain->use_first_level = true; domain->has_iotlb_device = false; INIT_LIST_HEAD(&domain->devices); spin_lock_init(&domain->lock); @@ -2175,7 +2170,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); attr |= DMA_FL_PTE_PRESENT; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS; if (prot & DMA_PTE_WRITE) attr |= DMA_FL_PTE_DIRTY; @@ -2445,7 +2440,7 @@ static int dmar_domain_attach_device(struct dmar_domain *domain, if (hw_pass_through && domain_type_is_si(domain)) ret = intel_pasid_setup_pass_through(iommu, domain, dev, PASID_RID2PASID); - else if (domain_use_first_level(domain)) + else if (domain->use_first_level) ret = domain_setup_first_level(iommu, domain, dev, PASID_RID2PASID); else @@ -4388,7 +4383,7 @@ static void domain_set_force_snooping(struct dmar_domain *domain) * Second level page table supports per-PTE snoop control. The * iommu_map() interface will handle this by setting SNP bit. */ - if (!domain_use_first_level(domain)) { + if (!domain->use_first_level) { domain->set_pte_snp = true; return; }