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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:09 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/13] spi: add core support for controllers with offload capabilities Date: Wed, 10 Jan 2024 13:49:42 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-1-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734382919484178 X-GMAIL-MSGID: 1787734382919484178 This adds a feature for specialized SPI controllers that can record a series of SPI transfers, including tx data, cs assertions, delays, etc. and then play them back using a hardware trigger without CPU intervention. The intended use case for this is with the AXI SPI Engine to capture data from ADCs at high rates (MSPS) with a stable sample period. Most of the implementation is controller-specific and will be handled by drivers that implement the offload_ops callbacks. The API follows a prepare/enable pattern that should be familiar to users of the clk subsystem. Consumers of this API will make calls similar to this: /* in probe() */ offload = spi_offload_get(spi, 0); ... /* in some setup function */ ret = spi_offload_prepare(offload, xfers, ARRAY_SIZE(xfers)); ... /* in some enable function */ ret = spi_offload_enable(offload); ... /* in corresponding disable function */ spi_offload_disable(offload); ... /* in corresponding teardown function */ spi_offload_unprepare(offload); ... Signed-off-by: David Lechner --- drivers/spi/spi.c | 39 +++++++++++++++ include/linux/spi/spi.h | 123 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 162 insertions(+) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index a4b8c07c5951..f1d66b5d5491 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -3057,6 +3057,13 @@ static int spi_controller_check_ops(struct spi_controller *ctlr) } } + if (ctlr->offload_ops && !(ctlr->offload_ops->get && + ctlr->offload_ops->prepare && + ctlr->offload_ops->unprepare && + ctlr->offload_ops->enable && + ctlr->offload_ops->disable)) + return -EINVAL; + return 0; } @@ -4448,6 +4455,38 @@ int spi_write_then_read(struct spi_device *spi, } EXPORT_SYMBOL_GPL(spi_write_then_read); +/** + * spi_offload_prepare - prepare offload hardware for a transfer + * @offload: The offload instance. + * @spi: The spi device to use for the transfers. + * @xfers: The transfers to be executed. + * @num_xfers: The number of transfers. + * + * Records a series of transfers to be executed later by the offload hardware + * trigger. + * + * Return: 0 on success, else a negative error code. + */ +int spi_offload_prepare(struct spi_offload *offload, struct spi_device *spi, + struct spi_transfer *xfers, unsigned int num_xfers) +{ + struct spi_controller *ctlr = offload->controller; + struct spi_message msg; + int ret; + + spi_message_init_with_transfers(&msg, xfers, num_xfers); + + ret = __spi_validate(spi, &msg); + if (ret) + return ret; + + msg.spi = spi; + ret = ctlr->offload_ops->prepare(offload, &msg); + + return ret; +} +EXPORT_SYMBOL_GPL(spi_offload_prepare); + /*-------------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_OF_DYNAMIC) diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 5d65a6273dcf..f116dfc1d52c 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -28,6 +28,8 @@ struct spi_transfer; struct spi_controller_mem_ops; struct spi_controller_mem_caps; struct spi_message; +struct spi_controller_offload_ops; +struct spi_offload; /* * INTERFACES between SPI master-side drivers and SPI slave protocol handlers, @@ -713,6 +715,9 @@ struct spi_controller { const struct spi_controller_mem_ops *mem_ops; const struct spi_controller_mem_caps *mem_caps; + /* Operations for controllers with offload support. */ + const struct spi_controller_offload_ops *offload_ops; + /* GPIO chip select */ struct gpio_desc **cs_gpiods; bool use_gpio_descriptors; @@ -1505,6 +1510,124 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) /*---------------------------------------------------------------------------*/ +/* + * Offloading support. + * + * Some SPI controllers support offloading of SPI transfers. Essentially, + * this allows the SPI controller to record SPI transfers and then play them + * back later via a hardware trigger. + */ + +/** + * SPI_OFFLOAD_RX - placeholder for indicating read transfers for offloads + * + * Assign xfer->rx_buf to this value for any read transfer passed to + * spi_offload_prepare(). This will act as a flag to indicate to the offload + * that it should do something with the data read during this transfer. What + * that something can be is determined by the specific hardware, e.g. it could + * be piped to DMA or a DSP, etc. + */ +#define SPI_OFFLOAD_RX_SENTINEL ((void *)1) + +/** + * struct spi_controller_offload_ops - callbacks for offload support + * + * Drivers for hardware with offload support need to implement all of these + * callbacks. + */ +struct spi_controller_offload_ops { + /** + * @get: Callback to get the offload assigned to the given SPI device. + * Index is an index in the offloads array fwnode property of the device. + * Implementations must return the pointer to the device or a negative + * error code (return -ENODEV rather than NULL if no matching device). + */ + struct spi_offload *(*get)(struct spi_device *spi, unsigned int index); + /** + * @prepare: Callback to prepare the offload for the given SPI message. + * @msg and any of its members (including any xfer->tx_buf) is not + * guaranteed to be valid beyond the lifetime of this call. + */ + int (*prepare)(struct spi_offload *offload, struct spi_message *msg); + /** + * @unprepare: Callback to release any resources used by prepare(). + */ + void (*unprepare)(struct spi_offload *offload); + /** + * @enable: Callback to enable the offload. + */ + int (*enable)(struct spi_offload *offload); + /** + * @disable: Callback to disable the offload. + */ + void (*disable)(struct spi_offload *offload); +}; + +/** struct spi_offload - offload handle */ +struct spi_offload { + /** @controller: The associated SPI controller. */ + struct spi_controller *controller; + /** @dev: The device associated with the offload instance. */ + struct device *dev; + /** @priv: Private instance data used by the SPI controller. */ + void *priv; +}; + +/** + * spi_offload_get - gets an offload assigned to the given SPI device + * @spi: SPI device. + * @index: Index of the offload in the SPI device's fwnode int array. + * + * The lifetime of the returned offload is tied to the struct spi_controller + * instance. Since @spi owns a reference to the controller, most consumers + * should not have to do anything extra. But if the offload is passed somewhere + * outside of the control of the SPI device driver, then an additional reference + * to the controller must be made. + * + * Return: Pointer to the offload handle or negative error code. + */ +static inline struct spi_offload *spi_offload_get(struct spi_device *spi, + unsigned int index) +{ + if (!spi->controller->offload_ops) + return ERR_PTR(-EOPNOTSUPP); + + return spi->controller->offload_ops->get(spi, index); +} + +int spi_offload_prepare(struct spi_offload *offload, struct spi_device *spi, + struct spi_transfer *xfers, unsigned int num_xfers); + +/** + * spi_offload_unprepare - releases any resources used by spi_offload_prepare() + * @offload: The offload instance. + */ +static inline void spi_offload_unprepare(struct spi_offload *offload) +{ + offload->controller->offload_ops->unprepare(offload); +} + +/** + * spi_offload_enable - enables the offload + * @offload: The offload instance. + * Return: 0 on success or negative error code. + */ +static inline int spi_offload_enable(struct spi_offload *offload) +{ + return offload->controller->offload_ops->enable(offload); +} + +/** + * spi_offload_disable - disables the offload + * @offload: The offload instance. + */ +static inline void spi_offload_disable(struct spi_offload *offload) +{ + offload->controller->offload_ops->disable(offload); +} + +/*---------------------------------------------------------------------------*/ + /* * INTERFACE between board init code and SPI infrastructure. * From patchwork Wed Jan 10 19:49:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187024 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019164dyi; Wed, 10 Jan 2024 11:52:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IGAfMwSFgQqLH0U8qKYTVwkckONKje//FIgaXYYlCECDZK9MaL6RgtBZ3U8P53eUOToss7O X-Received: by 2002:a17:902:7803:b0:1d5:36a5:6c33 with SMTP id p3-20020a170902780300b001d536a56c33mr40327pll.121.1704916341348; Wed, 10 Jan 2024 11:52:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916341; cv=none; d=google.com; s=arc-20160816; b=XNOuTP82Uod63gHFlsjs1G72ZGCrksuy/M0pItRU/B+4wI+PvPbswU3fZkbKKSDTH1 2NZTHnTSS3aK3smlph3LfgSl7wjZj1uwUiQovMJ6h4Ro0jl2PXIAjzXP5bGemiwY/9va N+1+MmMKn0NsWmtIzjZlXroo2E6aAo5wBqfkY1Yf8P1VYiHw2NqarLqJmFggkRIHgt51 FZyWzHWqIfhAcOjMPpMZywt7SLbXF7Omiwe8n5soi0MIS2pDojcEaaZiZR+RG9iToAVI Tu/Kfiiq5618tQLu421mgIrsbNfwFChUhVQp6F4D/DR8uFQb8JD4UYsgxiRp2Yd0PDRK hERw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=8tQFXGB0UBE3yQVmYcImKXXjk/ehD/gF98AYs7jrXzE=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=Ob9iJfhBsoc7O8fCtztVP6j5y7sc7UYQXk2LbqUXa6rORkXwGwZmjrsSB/JDAAEwbX Nk8Yuz+HBDthDZoRz+qP0Fn3SQJZnLa02hRKqkorGU4ZKjW7ePYxSai+jENoDIhNSNqv RktgYq+bp5fDtStb4ECpy04pAjftHXWlMhRueLXwb2B1klGTp+ACqaa+PqtrA9yG8GBQ 3M6eoCr6RLScfgXK3PRkYzyuijU5GshkuQSs19gviA3qtwI3TMdNboZlAbeOvSu9GI0o EumV8ly/PgABnJklL19Q0Ds0hBjbj5lGgvJ2cjtBs7+2DExWXrJySKHxIKPNy/xNQXUT gL0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b="yKV/+Qfr"; spf=pass (google.com: domain of linux-kernel+bounces-22672-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22672-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:10 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/13] scripts: dtc: checks: don't warn on SPI non-peripheral child nodes Date: Wed, 10 Jan 2024 13:49:43 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-2-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734357568066700 X-GMAIL-MSGID: 1787734357568066700 According to the spi-controller.yaml bindings, SPI peripheral child nodes match the pattern "^.*@[0-9a-f]+$". A SPI controller binding may require a child object node that is not a peripheral. For example, the adi,axi-spi-engine binding requires an "offloads" child node that is not a peripheral but rather a part of the controller itself. By checking for '@' in the node name, we can avoids a warnings like: Warning (spi_bus_reg): /example-0/spi@44a00000/offloads: missing or empty reg property for a binding like: spi { ... offloads { offload@0 { ... }; ... }; peripheral@0 { ... }; }; Signed-off-by: David Lechner --- scripts/dtc/checks.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index 9f31d2607182..5af68642f231 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -1144,6 +1144,10 @@ static void check_spi_bus_reg(struct check *c, struct dt_info *dti, struct node if (!node->parent || (node->parent->bus != &spi_bus)) return; + /* only nodes with '@' in name are SPI devices */ + if (!strchr(unitname, '@')) + return; + if (get_property(node->parent, "spi-slave")) return; From patchwork Wed Jan 10 19:49:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187026 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019344dyi; Wed, 10 Jan 2024 11:52:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IEMzP7XHsn5SwVsXzdJ/NAwtYzaab3BIWjNA74iPh9VJBiXdUQbkbsP+RQF6EjkpPzl3gQ4 X-Received: by 2002:a05:6402:1848:b0:556:f865:3ece with SMTP id v8-20020a056402184800b00556f8653ecemr1183edy.50.1704916370303; Wed, 10 Jan 2024 11:52:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916370; cv=none; d=google.com; s=arc-20160816; b=BWYQBL+HB0ARxX52cVavSg6fkaojrjxEofjiHIjaAgFIhxzkhnfSbC34g4fGfuqD5/ FRWVI7pLlbz99OLsCKL7iz3jvGC/j2+TiyLXzdzvg8GBDWyF3Ptleep09wOZN6O0hDtQ R0zOEqyrEU8zfxf0RV+icMqrVhuzZbRHVC0EV7VakYf99e6KMP/OrK+9woTv/l13aFQx k7Ea4TEC402dD1l2oEPwSwGfkD2OHtt2j0x9iuOdZ7NyyUdSYLcOkqBoO/imiQUl5ofX 15xsyLM9ElxNrjFXITE0EOSj3MXX+8fuI5rDr0/jZf5qR6lME6pS2fyGoJgMEP/8+sve v35A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=QGJNLPLyI0esp3kiyP6ekV4MJE/CQ1txcBdZozy1qY4=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=fQXODN5T/IcHb48l69glHz49JmJmDo/MaqRkF37kargXIjm1oKwbVLO3Gsw7Kvua1a SStE8XAEHIUd6rITqIzv0IWc5XltGY0k06L6evoXvFVEw9GYl3k3F2jOXWxwuSf8utSN gcjJh+DuQaOox/zm0hxrjbSq+DjR2wc34rCBWsk4LyzD8/ycG0I6+un7CFojnz3f0aCy idshod+TZW285AAv6Kn9mHZ1Wn1wMI+3PtBUFzLLrwWavZD43R/vaEy+kTqUGCnuHXEb fDZgAtSimNa+VEWuT55h4Pv1Z1Qt4kqofxa1hDcM9yOgmNAtOXDwDCCxJttwjDJOJc2p 2HPg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=YdUX1Pq7; spf=pass (google.com: domain of linux-kernel+bounces-22674-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22674-ouuuleilei=gmail.com@vger.kernel.org" Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:11 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/13] spi: do not attempt to register DT nodes without @ in name Date: Wed, 10 Jan 2024 13:49:44 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-3-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734387785734402 X-GMAIL-MSGID: 1787734387785734402 In the DT bindings for SPI devices, it is specified that peripheral nodes have the @ character in the node name. A SPI controller may need to create bindings with child nodes that are not peripherals. For example, the AXI SPI Engine bindings will use an "offloads" child node to describe what is connected to the offload interfaces of the SPI controller. Without this change, the SPI controller would attempt to register all child nodes as SPI devices. After this change, only nodes with '@' in the name will be registered as SPI devices. Signed-off-by: David Lechner --- drivers/spi/spi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index f1d66b5d5491..5be5e654284c 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2379,7 +2379,9 @@ static void of_register_spi_devices(struct spi_controller *ctlr) struct device_node *nc; for_each_available_child_of_node(ctlr->dev.of_node, nc) { - if (of_node_test_and_set_flag(nc, OF_POPULATED)) + /* Only nodes with '@' in the name are peripheral nodes. */ + if (of_node_test_and_set_flag(nc, OF_POPULATED) || + !strchr(kbasename(nc->full_name), '@')) continue; spi = of_register_spi_device(ctlr, nc); if (IS_ERR(spi)) { From patchwork Wed Jan 10 19:49:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187027 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019569dyi; Wed, 10 Jan 2024 11:53:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IFoWmR1EHyEGEtGNZ1oEMHdZpl/mbNej4Kw8Y/mFqOcQLVzEoykp1BelpEqjSM83eiVXqJI X-Received: by 2002:a17:90b:4a47:b0:28d:b4c4:577e with SMTP id lb7-20020a17090b4a4700b0028db4c4577emr21161pjb.59.1704916410512; Wed, 10 Jan 2024 11:53:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916410; cv=none; d=google.com; s=arc-20160816; b=Ycex80rqn04SCrQHL6cw9ITwidThNY3XhgzQS1O0q7qx82iDC+zN6smexj7i48Wmf/ vjojQSvgoPygiF/SrKZZr3AqY83sgb8u9G8mmnIilozXMeqOchJwKbgYPzmNSvQM3XBj JvOBAKnRpVXgMjgl7yhdLM3UhZQteQj+V3tZqqN7ApA05bFzmrWks0zYNFfafcw2ABC2 VqCuzW0s8iV9yuOY6tvqBSqkLrg403aQ6vRM3B6sK+2dPM3jJVwJu6Q17OeX6RZ9U4rL L7pRjiTIEdK/YJ6CEtzhNfq/lXVlpjPanpUEdeqWbpPLckCj1FotArpT7tF3muc7xr8U 97dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=BxwuK84w923F+g+Vt8AcwM39UH7HsN98gaGyRuSrYT0=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=NfjaQOog/jx47HAh7lhyrdm/Yk8RfOlfRbpz3/OevNyX/8JBG2RbScW8+JCfwkdZYz orLgCI62mA4MH6dBgw3PwCOABDnCfeTba5lfdVhRyuABouIn0vWfvoyBRNXuVWS+k8fE ojHj9MjMMjJC2PtSCkxsHnVe8unWcgCnMCJ97VGk6T4cesMqvfYICarNIGN6BRvgx4+C 9xb0a7AbSYpVd5o2Cxjfg5epW5gT4G6qs6laW7WHaaJywQju2Ojz7iu+rblvVipLfQRl yaBS+mmw5ybmx7dhmtj4IJaeW+2g7PFGgEfXnAirP6AdDISrDAi0dXzp7GqnLL7VJc5S QrdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=nooHw6Bw; spf=pass (google.com: domain of linux-kernel+bounces-22675-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22675-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:12 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/13] spi: dt-bindings: adi,axi-spi-engine: add offload bindings Date: Wed, 10 Jan 2024 13:49:45 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-4-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734429998104885 X-GMAIL-MSGID: 1787734429998104885 The ADI AXI SPI Engine driver supports offloading SPI transfers to hardware. This is essentially a feature that allows recording an arbitrary sequence of SPI transfers and then playing them back with no CPU intervention via a hardware trigger. This adds the bindings for this feature. Each SPI Engine instance can have from 0 to 32 offload instances. Each offload instance has a trigger input and a data stream output. As an example, this could be used with an ADC SPI peripheral. In this case the trigger is connected to a PWM/clock to determine the sampling rate for the ADC and the output stream is connected to a DMA channel to pipe the sample data to memory. SPI peripherals act as consumers of the offload instances. Typically, one SPI peripheral will be connected to one offload instance. But to make the bindings future-proof, the property is an array. Signed-off-by: David Lechner --- .../spi/adi,axi-spi-engine-peripheral-props.yaml | 24 +++++++++++ .../bindings/spi/adi,axi-spi-engine.yaml | 49 +++++++++++++++++++++- .../bindings/spi/spi-peripheral-props.yaml | 1 + 3 files changed, 73 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine-peripheral-props.yaml new file mode 100644 index 000000000000..19b685fc3b39 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine-peripheral-props.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/adi,axi-spi-engine-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral properties for Analog Devices AXI SPI Engine Controller + +maintainers: + - Michael Hennerich + - Nuno Sá + +properties: + adi,offloads: + description: + List of AXI SPI Engine offload instances assigned to this peripheral. + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 32 + items: + items: + - minimum: 0 + maximum: 31 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml index d48faa42d025..69f3261bab47 100644 --- a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml +++ b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml @@ -21,6 +21,23 @@ maintainers: allOf: - $ref: /schemas/spi/spi-controller.yaml# +$defs: + offload: + description: + Describes the connections of the trigger input and the data output stream + of one or more offload instances. + + properties: + reg: + description: + Index of the offload instance. + items: + - minimum: 0 + maximum: 31 + + required: + - reg + properties: compatible: const: adi,axi-spi-engine-1.00.a @@ -41,6 +58,22 @@ properties: - const: s_axi_aclk - const: spi_clk + offloads: + type: object + description: Zero or more offloads supported by the controller. + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^offload@[0-8a-f]+$": + type: object + $ref: '#/$defs/offload' + required: - compatible - reg @@ -62,5 +95,19 @@ examples: #address-cells = <1>; #size-cells = <0>; - /* SPI devices */ + offloads { + #address-cells = <1>; + #size-cells = <0>; + + offload@0 { + compatible = "adi,example-offload"; + reg = <0>; + }; + }; + + adc@0 { + compatible = "adi,example-adc"; + reg = <0>; + adi,offloads = <0>; + }; }; diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 1c8e71c18234..7beb5a3798a5 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -132,6 +132,7 @@ properties: # The controller specific properties go here. allOf: + - $ref: adi,axi-spi-engine-peripheral-props.yaml# - $ref: arm,pl022-peripheral-props.yaml# - $ref: cdns,qspi-nor-peripheral-props.yaml# - $ref: samsung,spi-peripheral-props.yaml# From patchwork Wed Jan 10 19:49:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019991dyi; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:13 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 05/13] spi: axi-spi-engine: add SPI offload support Date: Wed, 10 Jan 2024 13:49:46 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-5-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734495505532470 X-GMAIL-MSGID: 1787734495505532470 This adds an implementation of the SPI offload_ops to the AXI SPI Engine driver to provide offload support. Offload lookup is done by device property lookup. SPI Engine commands and tx data are recorded by writing to offload-specific FIFOs in the SPI Engine hardware. Co-developed-by: Lars-Peter Clausen Signed-off-by: Lars-Peter Clausen Signed-off-by: David Lechner --- drivers/spi/spi-axi-spi-engine.c | 270 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 270 insertions(+) diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c index 58280dd1c901..1d7ddc867b50 100644 --- a/drivers/spi/spi-axi-spi-engine.c +++ b/drivers/spi/spi-axi-spi-engine.c @@ -2,9 +2,11 @@ /* * SPI-Engine SPI controller driver * Copyright 2015 Analog Devices Inc. + * Copyright 2023 BayLibre, SAS * Author: Lars-Peter Clausen */ +#include #include #include #include @@ -38,11 +40,22 @@ #define SPI_ENGINE_REG_SDI_DATA_FIFO 0xe8 #define SPI_ENGINE_REG_SDI_DATA_FIFO_PEEK 0xec +#define SPI_ENGINE_MAX_NUM_OFFLOADS 32 + +#define SPI_ENGINE_REG_OFFLOAD_CTRL(x) (0x100 + (SPI_ENGINE_MAX_NUM_OFFLOADS * x)) +#define SPI_ENGINE_REG_OFFLOAD_STATUS(x) (0x104 + (SPI_ENGINE_MAX_NUM_OFFLOADS * x)) +#define SPI_ENGINE_REG_OFFLOAD_RESET(x) (0x108 + (SPI_ENGINE_MAX_NUM_OFFLOADS * x)) +#define SPI_ENGINE_REG_OFFLOAD_CMD_FIFO(x) (0x110 + (SPI_ENGINE_MAX_NUM_OFFLOADS * x)) +#define SPI_ENGINE_REG_OFFLOAD_SDO_FIFO(x) (0x114 + (SPI_ENGINE_MAX_NUM_OFFLOADS * x)) + #define SPI_ENGINE_INT_CMD_ALMOST_EMPTY BIT(0) #define SPI_ENGINE_INT_SDO_ALMOST_EMPTY BIT(1) #define SPI_ENGINE_INT_SDI_ALMOST_FULL BIT(2) #define SPI_ENGINE_INT_SYNC BIT(3) +#define SPI_ENGINE_OFFLOAD_CTRL_ENABLE BIT(0) +#define SPI_ENGINE_OFFLOAD_STATUS_ENABLED BIT(0) + #define SPI_ENGINE_CONFIG_CPHA BIT(0) #define SPI_ENGINE_CONFIG_CPOL BIT(1) #define SPI_ENGINE_CONFIG_3WIRE BIT(2) @@ -76,6 +89,10 @@ #define SPI_ENGINE_CMD_SYNC(id) \ SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, SPI_ENGINE_MISC_SYNC, (id)) +/* default sizes - can be changed when SPI Engine firmware is compiled */ +#define SPI_ENGINE_OFFLOAD_CMD_FIFO_SIZE 16 +#define SPI_ENGINE_OFFLOAD_SDO_FIFO_SIZE 16 + struct spi_engine_program { unsigned int length; uint16_t instructions[]; @@ -107,6 +124,10 @@ struct spi_engine_message_state { u8 sync_id; }; +struct spi_engine_offload { + unsigned int index; +}; + struct spi_engine { struct clk *clk; struct clk *ref_clk; @@ -119,6 +140,9 @@ struct spi_engine { struct spi_controller *controller; unsigned int int_enable; + + struct spi_offload offloads[SPI_ENGINE_MAX_NUM_OFFLOADS]; + struct spi_engine_offload offload_priv[SPI_ENGINE_MAX_NUM_OFFLOADS]; }; static void spi_engine_program_add_cmd(struct spi_engine_program *p, @@ -603,6 +627,239 @@ static int spi_engine_transfer_one_message(struct spi_controller *host, return 0; } +static struct spi_offload *spi_engine_offload_get(struct spi_device *spi, + unsigned int index) +{ + struct spi_controller *host = spi->controller; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); + struct spi_offload *offload; + u32 vals[SPI_ENGINE_MAX_NUM_OFFLOADS]; + int ret; + + /* Use the adi,offloads array to find the offload at index. */ + + if (index >= ARRAY_SIZE(vals)) + return ERR_PTR(-EINVAL); + + ret = device_property_read_u32_array(&spi->dev, "adi,offloads", vals, + index + 1); + if (ret < 0) + return ERR_PTR(ret); + + if (vals[index] >= SPI_ENGINE_MAX_NUM_OFFLOADS) + return ERR_PTR(-EINVAL); + + offload = &spi_engine->offloads[vals[index]]; + + return offload; +} + +static int spi_engine_offload_prepare(struct spi_offload *offload, + struct spi_message *msg) +{ + struct spi_controller *host = offload->controller; + struct spi_engine_offload *priv = offload->priv; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); + struct spi_engine_program p_dry, *p __free(kfree) = NULL; + struct spi_transfer *xfer; + void __iomem *cmd_addr; + void __iomem *sdo_addr; + size_t tx_word_count = 0; + unsigned int i; + + /* count total number of tx words in message */ + list_for_each_entry(xfer, &msg->transfers, transfer_list) { + if (!xfer->tx_buf) + continue; + + if (xfer->bits_per_word <= 8) + tx_word_count += xfer->len; + else if (xfer->bits_per_word <= 16) + tx_word_count += xfer->len / 2; + else + tx_word_count += xfer->len / 4; + } + + /* REVISIT: could get actual size from devicetree if needed */ + if (tx_word_count > SPI_ENGINE_OFFLOAD_SDO_FIFO_SIZE) + return -EINVAL; + + spi_engine_precompile_message(msg); + + /* dry run to get length */ + p_dry.length = 0; + spi_engine_compile_message(msg, true, &p_dry); + + /* REVISIT: could get actual size from devicetree if needed */ + if (p_dry.length > SPI_ENGINE_OFFLOAD_CMD_FIFO_SIZE) + return -EINVAL; + + p = kzalloc(sizeof(*p) + sizeof(*p->instructions) * p_dry.length, GFP_KERNEL); + if (!p) + return -ENOMEM; + + spi_engine_compile_message(msg, false, p); + + cmd_addr = spi_engine->base + SPI_ENGINE_REG_OFFLOAD_CMD_FIFO(priv->index); + sdo_addr = spi_engine->base + SPI_ENGINE_REG_OFFLOAD_SDO_FIFO(priv->index); + + list_for_each_entry(xfer, &msg->transfers, transfer_list) { + if (!xfer->tx_buf) + continue; + + if (xfer->bits_per_word <= 8) { + const u8 *buf = xfer->tx_buf; + + for (i = 0; i < xfer->len; i++) + writel_relaxed(buf[i], sdo_addr); + } else if (xfer->bits_per_word <= 16) { + const u16 *buf = xfer->tx_buf; + + for (i = 0; i < xfer->len / 2; i++) + writel_relaxed(buf[i], sdo_addr); + } else { + const u32 *buf = xfer->tx_buf; + + for (i = 0; i < xfer->len / 4; i++) + writel_relaxed(buf[i], sdo_addr); + } + } + + for (i = 0; i < p->length; i++) + writel_relaxed(p->instructions[i], cmd_addr); + + return 0; +} + +static void spi_engine_offload_unprepare(struct spi_offload *offload) +{ + struct spi_controller *host = offload->controller; + struct spi_engine_offload *priv = offload->priv; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); + + writel_relaxed(1, spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_RESET(priv->index)); + writel_relaxed(0, spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_RESET(priv->index)); +} + +static int spi_engine_offload_enable(struct spi_offload *offload) +{ + struct spi_controller *host = offload->controller; + struct spi_engine_offload *priv = offload->priv; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); + unsigned int reg; + + reg = readl_relaxed(spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_CTRL(priv->index)); + reg |= SPI_ENGINE_OFFLOAD_CTRL_ENABLE; + writel_relaxed(reg, spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_CTRL(priv->index)); + + return 0; +} + +static void spi_engine_offload_disable(struct spi_offload *offload) +{ + struct spi_controller *host = offload->controller; + struct spi_engine_offload *priv = offload->priv; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); + unsigned int reg; + + reg = readl_relaxed(spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_CTRL(priv->index)); + reg &= ~SPI_ENGINE_OFFLOAD_CTRL_ENABLE; + writel_relaxed(reg, spi_engine->base + + SPI_ENGINE_REG_OFFLOAD_CTRL(priv->index)); +} + +static const struct spi_controller_offload_ops spi_engine_offload_ops = { + .get = spi_engine_offload_get, + .prepare = spi_engine_offload_prepare, + .unprepare = spi_engine_offload_unprepare, + .enable = spi_engine_offload_enable, + .disable = spi_engine_offload_disable, +}; + +static void spi_engine_offload_release(void *p) +{ + struct spi_offload *offload = p; + struct platform_device *pdev = container_of(offload->dev, + struct platform_device, dev); + + offload->dev = NULL; + platform_device_unregister(pdev); +} + +/** + * devm_spi_engine_register_offload() - Registers platform device for offload. + * + * @dev: The parent platform device node. + * @offload: The offload firmware node. + * + * Return: 0 on success, negative error code otherwise. + */ +static int devm_spi_engine_register_offload(struct device *dev, + struct spi_engine *spi_engine, + struct fwnode_handle *fwnode) +{ + struct platform_device_info pdevinfo = { + .parent = dev, + .name = "offload", + .fwnode = fwnode, + }; + struct platform_device *pdev; + struct spi_offload *offload; + u32 index; + int ret; + + ret = fwnode_property_read_u32(fwnode, "reg", &index); + if (ret) + return ret; + + if (index >= SPI_ENGINE_MAX_NUM_OFFLOADS) + return -EINVAL; + + pdevinfo.id = index; + + pdev = platform_device_register_full(&pdevinfo); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + offload = &spi_engine->offloads[index]; + offload->dev = &pdev->dev; + + return devm_add_action_or_reset(dev, spi_engine_offload_release, offload); +} + +/** + * spi_engine_offload_populate() - Registers platform device for each offload instance. + * @host: The SPI controller. + * @spi_engine: The SPI engine. + * @dev: The parent platform device. + */ +static void spi_engine_offload_populate(struct spi_controller *host, + struct spi_engine *spi_engine, + struct device *dev) +{ + struct fwnode_handle *offloads; + struct fwnode_handle *child; + int ret; + + /* offloads are optional */ + offloads = device_get_named_child_node(dev, "offloads"); + if (!offloads) + return; + + fwnode_for_each_available_child_node(offloads, child) { + ret = devm_spi_engine_register_offload(dev, spi_engine, child); + if (ret) + dev_warn(dev, "failed to register offload: %d\n", ret); + } + + fwnode_handle_put(offloads); +} + static void spi_engine_timeout(struct timer_list *timer) { struct spi_engine *spi_engine = from_timer(spi_engine, timer, watchdog_timer); @@ -633,6 +890,7 @@ static int spi_engine_probe(struct platform_device *pdev) unsigned int version; int irq; int ret; + int i; irq = platform_get_irq(pdev, 0); if (irq < 0) @@ -670,6 +928,15 @@ static int spi_engine_probe(struct platform_device *pdev) return -ENODEV; } + for (i = 0; i < SPI_ENGINE_MAX_NUM_OFFLOADS; i++) { + struct spi_engine_offload *priv = &spi_engine->offload_priv[i]; + struct spi_offload *offload = &spi_engine->offloads[i]; + + priv->index = i; + offload->controller = host; + offload->priv = priv; + } + writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_RESET); writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); @@ -692,6 +959,7 @@ static int spi_engine_probe(struct platform_device *pdev) host->prepare_message = spi_engine_prepare_message; host->unprepare_message = spi_engine_unprepare_message; host->num_chipselect = 8; + host->offload_ops = &spi_engine_offload_ops; if (host->max_speed_hz == 0) return dev_err_probe(&pdev->dev, -EINVAL, "spi_clk rate is 0"); @@ -702,6 +970,8 @@ static int spi_engine_probe(struct platform_device *pdev) platform_set_drvdata(pdev, host); + spi_engine_offload_populate(host, spi_engine, &pdev->dev); + return 0; } From patchwork Wed Jan 10 19:49:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187028 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019803dyi; Wed, 10 Jan 2024 11:54:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IGUtwdS4CaDTdzfAIEG9C9Ks2DzuRKMEX3JncqXY8E1Ca/C5O6TZop9PawhlVqFIxv881kB X-Received: by 2002:a17:90a:d190:b0:28b:f377:6688 with SMTP id fu16-20020a17090ad19000b0028bf3776688mr38563pjb.2.1704916449306; Wed, 10 Jan 2024 11:54:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916449; cv=none; d=google.com; s=arc-20160816; b=erTahBXRIHOHzIdCjeTI1EF6G7Ec1QlZCdblONW261CSlO6xGSd16wMFmasS6Wtn4i rNeJToFxcnqW6JfXv0ieCwF3l3nVwxto4017K+G/uzPt9AoBIeLwKdw+xGZFJVO/3spi QcP0ZFe0o/nBiFzcRCUnvXoCuWOndnNMSdSp9MfxahBAEhwydFrzqaLiF69JqrERrDtg L7JYRJX/R1BjcS0VTXq13Y0bfUxYzJwZImK3N+oM9vH8b91z0wMoKy57BUwKO7QRftL7 milFuAqH54MV8rbS4k54gBFJ7J7FkZni8IDCXnY2l1P+ELaS2u1E2kSt98O6dw6Ywxr7 tahw== ARC-Message-Signature: i=1; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:14 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/13] iio: buffer: add hardware triggered buffer support Date: Wed, 10 Jan 2024 13:49:47 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-6-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734470968296419 X-GMAIL-MSGID: 1787734470968296419 This adds a new mode INDIO_HW_BUFFER_TRIGGERED to the IIO subsystem. This mode is essentially the hardware version of INDIO_BUFFER_TRIGGERED where the trigger has the semantics of INDIO_HARDWARE_TRIGGERED and the buffer has the semantics of INDIO_BUFFER_HARDWARE. So basically INDIO_HW_BUFFER_TRIGGERED is the same as INDIO_BUFFER_HARDWARE except that it also enables the trigger when the buffer is enabled. Signed-off-by: David Lechner --- drivers/iio/industrialio-buffer.c | 43 ++++++++++++++++++++++++++++++++++++--- include/linux/iio/iio.h | 16 ++++++++++++--- 2 files changed, 53 insertions(+), 6 deletions(-) diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c index 176d31d9f9d8..ffee3043c65a 100644 --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c @@ -27,6 +27,7 @@ #include #include #include +#include static const char * const iio_endian_prefix[] = { [IIO_BE] = "be", @@ -867,8 +868,17 @@ static int iio_verify_update(struct iio_dev *indio_dev, insert_buffer->watermark); } - /* Definitely possible for devices to support both of these. */ - if ((modes & INDIO_BUFFER_TRIGGERED) && indio_dev->trig) { + /* Definitely possible for devices to support all of these. */ + if (modes & INDIO_HW_BUFFER_TRIGGERED) { + /* + * Keep things simple for now and only allow a single buffer to + * be connected in hardware mode. + */ + if (insert_buffer && !list_empty(&iio_dev_opaque->buffer_list)) + return -EINVAL; + config->mode = INDIO_HW_BUFFER_TRIGGERED; + strict_scanmask = true; + } else if ((modes & INDIO_BUFFER_TRIGGERED) && indio_dev->trig) { config->mode = INDIO_BUFFER_TRIGGERED; } else if (modes & INDIO_BUFFER_HARDWARE) { /* @@ -1107,11 +1117,21 @@ static int iio_enable_buffers(struct iio_dev *indio_dev, } } + if (iio_dev_opaque->currentmode == INDIO_HW_BUFFER_TRIGGERED) { + struct iio_trigger *trig = indio_dev->trig; + + if (trig->ops && trig->ops->set_trigger_state) { + ret = trig->ops->set_trigger_state(trig, true); + if (ret) + goto err_disable_buffers; + } + } + if (iio_dev_opaque->currentmode == INDIO_BUFFER_TRIGGERED) { ret = iio_trigger_attach_poll_func(indio_dev->trig, indio_dev->pollfunc); if (ret) - goto err_disable_buffers; + goto err_disable_hw_trigger; } if (indio_dev->setup_ops->postenable) { @@ -1130,6 +1150,16 @@ static int iio_enable_buffers(struct iio_dev *indio_dev, iio_trigger_detach_poll_func(indio_dev->trig, indio_dev->pollfunc); } +err_disable_hw_trigger: + if (iio_dev_opaque->currentmode == INDIO_HW_BUFFER_TRIGGERED) { + struct iio_trigger *trig = indio_dev->trig; + + if (trig->ops && trig->ops->set_trigger_state) { + ret = trig->ops->set_trigger_state(trig, false); + if (ret) + return ret; + } + } err_disable_buffers: buffer = list_prepare_entry(tmp, &iio_dev_opaque->buffer_list, buffer_list); list_for_each_entry_continue_reverse(buffer, &iio_dev_opaque->buffer_list, @@ -1174,6 +1204,13 @@ static int iio_disable_buffers(struct iio_dev *indio_dev) indio_dev->pollfunc); } + if (iio_dev_opaque->currentmode == INDIO_HW_BUFFER_TRIGGERED) { + struct iio_trigger *trig = indio_dev->trig; + + if (trig->ops && trig->ops->set_trigger_state) + trig->ops->set_trigger_state(trig, false); + } + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { ret2 = iio_buffer_disable(buffer, indio_dev); if (ret2 && !ret) diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h index d0ce3b71106a..16f62bd38041 100644 --- a/include/linux/iio/iio.h +++ b/include/linux/iio/iio.h @@ -366,6 +366,11 @@ s64 iio_get_time_ns(const struct iio_dev *indio_dev); * they must be managed by the core, but without the entire interrupts/poll * functions burden. Interrupts are irrelevant as the data flow is hardware * mediated and distributed. + * @INDIO_HW_BUFFER_TRIGGERED: Very unusual mode. + * This is similar to INDIO_BUFFER_TRIGGERED but everything is done in hardware + * therefore there are no poll functions attached. It also implies the semantics + * of both INDIO_HARDWARE_TRIGGERED for the trigger and INDIO_BUFFER_HARDWARE + * for the buffer. */ #define INDIO_DIRECT_MODE 0x01 #define INDIO_BUFFER_TRIGGERED 0x02 @@ -373,14 +378,19 @@ s64 iio_get_time_ns(const struct iio_dev *indio_dev); #define INDIO_BUFFER_HARDWARE 0x08 #define INDIO_EVENT_TRIGGERED 0x10 #define INDIO_HARDWARE_TRIGGERED 0x20 +#define INDIO_HW_BUFFER_TRIGGERED 0x40 -#define INDIO_ALL_BUFFER_MODES \ - (INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE | INDIO_BUFFER_SOFTWARE) +#define INDIO_ALL_BUFFER_MODES \ + (INDIO_BUFFER_TRIGGERED \ + | INDIO_BUFFER_HARDWARE \ + | INDIO_BUFFER_SOFTWARE \ + | INDIO_HW_BUFFER_TRIGGERED) #define INDIO_ALL_TRIGGERED_MODES \ (INDIO_BUFFER_TRIGGERED \ | INDIO_EVENT_TRIGGERED \ - | INDIO_HARDWARE_TRIGGERED) + | INDIO_HARDWARE_TRIGGERED \ + | INDIO_HW_BUFFER_TRIGGERED) #define INDIO_MAX_RAW_ELEMENTS 4 From patchwork Wed Jan 10 19:49:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187033 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1020091dyi; Wed, 10 Jan 2024 11:54:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IGcL/rTuIKn105LUdyF00d15X5/ll1fEqpjLuW1xsgAjPFjmyhy80rVzR8II8hqhw5aDI8E X-Received: by 2002:a17:90a:130f:b0:28d:746c:df2e with SMTP id h15-20020a17090a130f00b0028d746cdf2emr35770pja.11.1704916489446; Wed, 10 Jan 2024 11:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916489; cv=none; d=google.com; s=arc-20160816; b=a0xOezkgVSkVs5lJMzbe8NH5LeLG6yDn6X4rVTrKR6cVW6jv/kmr9w9IohKzBunRjZ 0v/lo31glvvcdl7im1K6TmRBhCB9Na/F3Plt4OKIiUF6hWpJy1v2a0j4ODvYFAux9vjB laHHn2AfLmfoGIgQp1CFmARR/0ezEo1Vh0xq/QqtGnhawfz1DEsiKJZRCX6Vzit4TIHg 0F3xLRN9HhI2KrkTgEcY4dza66omfMTKrduRLxdkGd68uHaG+5B69HHETOPv8YFGR4H1 NHvpfaYeCMNEmS5FiQJ7UAWZ1/jCNlmYDxKaqs9aZFekHt2Vmgjullc0D17YoHrw+QKT WFCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Y7PWqKKUmIJfOHhEo7bhsOSHT+T28MHjs59pcUd3qYA=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=fzszEK5ZxT1ixnQVCKk5FfQK9xUj7j2a3ScG0W5NtQDXsa5tYEdD1atIXboUsteFH+ mVb5SsNeI5weyKkiGY3UguuQ78dTt3pfAxI/RO2DEHqYmBzfKEUyv6clSs0m4k5aX8R3 fvsSdNmeZ9veWgHl43hnbsfe9MYwQIalJicnU1Dn50uuEYcx5Q9J5luzXyw7MQ4/VvO6 AyYpe4xvwjkVDWmwRG0WOaJgwZ24szc2mkhSK91+uVPEc10WAh3OVtTv8kpQxs0mTfBd rAGEQ/H/iDjlMfdphr+AXiMSoZFNmiHpEiskN5Nt0Wk/i1HNFCgImS34QZF4/P3kFy8x P2ww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=t5cFwVVr; spf=pass (google.com: domain of linux-kernel+bounces-22679-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22679-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:16 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/13] iio: buffer: add new hardware triggered buffer driver Date: Wed, 10 Jan 2024 13:49:49 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-8-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734512930880799 X-GMAIL-MSGID: 1787734512930880799 This adds a new hardware triggered buffer driver for the IIO subsystem. This driver is intended to be used by IIO device drivers that have a hardware buffer that is triggered by a hardware signal. It is expected that components such as those providing a backend via the IIO backend framework will provide the actual implementation of this functionality by registering a matching device on the auxiliary bus. The auxiliary bus was chosen since it allows us to make use of existing kernel infrastructure instead of implementing our own registration and lookup system. Signed-off-by: David Lechner --- Documentation/driver-api/driver-model/devres.rst | 1 + drivers/iio/buffer/Kconfig | 7 ++ drivers/iio/buffer/Makefile | 1 + .../iio/buffer/industrialio-hw-triggered-buffer.c | 104 +++++++++++++++++++++ include/linux/iio/hw_triggered_buffer.h | 14 +++ include/linux/iio/hw_triggered_buffer_impl.h | 16 ++++ 6 files changed, 143 insertions(+) diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index c5f99d834ec5..b23d4a2b68a6 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -296,6 +296,7 @@ IIO devm_iio_channel_get() devm_iio_channel_get_all() devm_iio_hw_consumer_alloc() + devm_iio_hw_triggered_buffer_setup() devm_fwnode_iio_channel_get_by_name() INPUT diff --git a/drivers/iio/buffer/Kconfig b/drivers/iio/buffer/Kconfig index 047b931591a9..925c5bf074bc 100644 --- a/drivers/iio/buffer/Kconfig +++ b/drivers/iio/buffer/Kconfig @@ -53,3 +53,10 @@ config IIO_TRIGGERED_BUFFER select IIO_KFIFO_BUF help Provides helper functions for setting up triggered buffers. + +config IIO_HW_TRIGGERED_BUFFER + tristate "Industrial I/O hardware triggered buffer support" + select AUXILIARY_BUS + select IIO_TRIGGER + help + Provides helper functions for setting up hardware triggered buffers. diff --git a/drivers/iio/buffer/Makefile b/drivers/iio/buffer/Makefile index 1403eb2f9409..d1142bb20f61 100644 --- a/drivers/iio/buffer/Makefile +++ b/drivers/iio/buffer/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_IIO_BUFFER_DMA) += industrialio-buffer-dma.o obj-$(CONFIG_IIO_BUFFER_DMAENGINE) += industrialio-buffer-dmaengine.o obj-$(CONFIG_IIO_BUFFER_HW_CONSUMER) += industrialio-hw-consumer.o obj-$(CONFIG_IIO_TRIGGERED_BUFFER) += industrialio-triggered-buffer.o +obj-$(CONFIG_IIO_HW_TRIGGERED_BUFFER) += industrialio-hw-triggered-buffer.o obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o diff --git a/drivers/iio/buffer/industrialio-hw-triggered-buffer.c b/drivers/iio/buffer/industrialio-hw-triggered-buffer.c new file mode 100644 index 000000000000..7a8a71066b0e --- /dev/null +++ b/drivers/iio/buffer/industrialio-hw-triggered-buffer.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024 Analog Devices, Inc. + * Copyright (c) 2024 BayLibre, SAS + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int iio_hw_triggered_buffer_match(struct device *dev, const void *match) +{ + return dev->parent == match; +} + +static struct iio_hw_triggered_buffer_device +*iio_hw_trigger_buffer_get(struct device *match) +{ + struct auxiliary_device *adev; + + adev = auxiliary_find_device(NULL, match, iio_hw_triggered_buffer_match); + if (!adev) + return ERR_PTR(-ENOENT); + + return container_of(adev, struct iio_hw_triggered_buffer_device, adev); +} + +static void iio_hw_trigger_buffer_put(void *dev) +{ + put_device(dev); +} + +/** + * devm_iio_hw_triggered_buffer_setup - Setup a hardware triggered buffer + * @dev: Device for devm management + * @indio_dev: An unconfigured/partially configured IIO device struct + * @match: Device for matching the auxiliary bus device that provides the + * interface to the hardware triggered buffer + * @ops: Buffer setup functions to use for this IIO device + * + * Return: 0 on success, negative error code on failure. + * + * This function will search all registered hardware triggered buffers for one + * that matches the given indio_dev. If found, it will be used to setup both + * the trigger and the buffer on the indio_dev. + */ +int devm_iio_hw_triggered_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + struct device *match, + const struct iio_buffer_setup_ops *ops) +{ + struct iio_hw_triggered_buffer_device *hw; + int ret; + + hw = iio_hw_trigger_buffer_get(match); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + ret = devm_add_action_or_reset(dev, iio_hw_trigger_buffer_put, &hw->adev.dev); + if (ret) + return ret; + + indio_dev->modes |= INDIO_HW_BUFFER_TRIGGERED; + indio_dev->trig = iio_trigger_get(hw->trig); + indio_dev->setup_ops = ops; + + return iio_device_attach_buffer(indio_dev, hw->buffer); +} +EXPORT_SYMBOL_GPL(devm_iio_hw_triggered_buffer_setup); + +static int iio_hw_trigger_buffer_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct iio_hw_triggered_buffer_device *hw = + container_of(adev, struct iio_hw_triggered_buffer_device, adev); + + if (!hw->buffer || !hw->trig) + return -EINVAL; + + return 0; +} + +static const struct auxiliary_device_id iio_hw_trigger_buffer_id_table[] = { + { } +}; +MODULE_DEVICE_TABLE(auxiliary, iio_hw_trigger_buffer_id_table); + +static struct auxiliary_driver iio_hw_trigger_buffer_driver = { + .driver = { + .name = "iio-hw-triggered-buffer", + }, + .probe = iio_hw_trigger_buffer_probe, + .id_table = iio_hw_trigger_buffer_id_table, +}; +module_auxiliary_driver(iio_hw_trigger_buffer_driver); + +MODULE_AUTHOR("David Lechner "); +MODULE_DESCRIPTION("IIO helper functions for setting up hardware triggered buffers"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/iio/hw_triggered_buffer.h b/include/linux/iio/hw_triggered_buffer.h new file mode 100644 index 000000000000..6bd8035f1b92 --- /dev/null +++ b/include/linux/iio/hw_triggered_buffer.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_IIO_HW_TRIGGEREDED_BUFFER_H_ +#define _LINUX_IIO_HW_TRIGGEREDED_BUFFER_H_ + +struct device; +struct iio_dev; +struct iio_buffer_setup_ops; + +int devm_iio_hw_triggered_buffer_setup(struct device *dev, + struct iio_dev *indio_dev, + struct device *match, + const struct iio_buffer_setup_ops *ops); + +#endif /* _LINUX_IIO_HW_TRIGGEREDED_BUFFER_H_ */ diff --git a/include/linux/iio/hw_triggered_buffer_impl.h b/include/linux/iio/hw_triggered_buffer_impl.h new file mode 100644 index 000000000000..d9a3ad2c8c24 --- /dev/null +++ b/include/linux/iio/hw_triggered_buffer_impl.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_IIO_HW_TRIGGEREDED_BUFFER_IMPL_H_ +#define _LINUX_IIO_HW_TRIGGEREDED_BUFFER_IMPL_H_ + +#include + +struct iio_buffer; +struct iio_trigger; + +struct iio_hw_triggered_buffer_device { + struct auxiliary_device adev; + struct iio_buffer *buffer; + struct iio_trigger *trig; +}; + +#endif /* _LINUX_IIO_HW_TRIGGEREDED_BUFFER_IMPL_H_ */ From patchwork Wed Jan 10 19:49:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187029 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019937dyi; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:17 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/13] bus: auxiliary: increase AUXILIARY_NAME_SIZE Date: Wed, 10 Jan 2024 13:49:50 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-9-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734490157212879 X-GMAIL-MSGID: 1787734490157212879 The auxiliary bus uses names in the form of "module_name.device_name" for matching devices to drivers. Since the module name is the actual module name, it can be quite long which doesn't leave enough room for the device name. This patch increases the size AUXILIARY_NAME_SIZE to 64 to allow for both a ~32 character module name and a ~32 character device name. Signed-off-by: David Lechner --- include/linux/mod_devicetable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index f458469c5ce5..4bd2d20067b6 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -861,7 +861,7 @@ struct mhi_device_id { kernel_ulong_t driver_data; }; -#define AUXILIARY_NAME_SIZE 32 +#define AUXILIARY_NAME_SIZE 64 #define AUXILIARY_MODULE_PREFIX "auxiliary:" struct auxiliary_device_id { From patchwork Wed Jan 10 19:49:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187030 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019954dyi; Wed, 10 Jan 2024 11:54:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IHOKF1i2QLrQ7DTNVJ1dTNonDxq3f9JlXQFxE+QVtlNrjDgRYdPgWenUIBZKcehmZY9YCtL X-Received: by 2002:a05:620a:240c:b0:783:3276:ea74 with SMTP id d12-20020a05620a240c00b007833276ea74mr183991qkn.149.1704916469370; Wed, 10 Jan 2024 11:54:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916469; cv=none; d=google.com; s=arc-20160816; b=iCgpV4jRcpHiHrBqG0UKOgcs/J6cBH0/ejZBHUodMZOUswxgfe1ua3UAjQtO3P6yaI r+D1ZzES/vVUHijscVFGNaXEC8dVv+8pvudPwwRMFknUfrF5BV+yry5gAR4kfPFhrcF7 2UDLRwXAayJIJNiopkwkisZJ83uyvq2s1JPWXnUrj2cMi6XZ89Gd80f/sCormASMQqrK NYQdXJRfgg5c10/z9il3+/H3FfjDju+gQDTb6YNgrEeo2vbc5XrD9IbdIbbuI5SIhPI8 CcWDypu6jXddrg58OB+q4awNjCTA12nP2ta7yeNhhbIDyzvZHIhLPYKBcV12wWqDLY1e DIEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=WoFvxKWdDooo1qSzC88EM9Nr4w+h9Vd46EFkbYPsSPw=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=hkTTh5SHEpHTJrSjZjLnC6bGOZFQdwMUKc/8l69Z4eFDCqy6vPJrAO5xLiui+VcUah J7RH/LZMAZb9UsDC+UHHIDTUp6SGcHTl/2iX56Bg2yqbQty0D+0o2k4lgnhrCN5IAlxG MgA9qMaTo+tYTQFmU1u4ClA/DGIDcmmyCybTUFs37ogNtMjY8fCEHwWtsZ+UORoj69do NnvlHbYr0dtxL5sDlHlZWuTpTLDLUVF8zXFSnaYsL8o2KnOTfPYP3+B0qp1GhimpkXNx HI3OEi678EEAnZA+MzmUMBB+IlznOzybqS9bei1xJiz5RHQUJds7LFixFSZgqLs2mVID ZxSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=DYtCGZ85; spf=pass (google.com: domain of linux-kernel+bounces-22681-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22681-ouuuleilei=gmail.com@vger.kernel.org" Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:18 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/13] iio: buffer: dmaengine: export devm_iio_dmaengine_buffer_alloc() Date: Wed, 10 Jan 2024 13:49:51 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-10-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734491847045851 X-GMAIL-MSGID: 1787734491847045851 This changes devm_iio_dmaengine_buffer_alloc() to an exported symbol. This will be used by drivers that need to allocate a DMA buffer without attaching it to an IIO device. Signed-off-by: David Lechner --- Documentation/driver-api/driver-model/devres.rst | 1 + drivers/iio/buffer/Kconfig | 14 +++++++------- drivers/iio/buffer/industrialio-buffer-dmaengine.c | 3 ++- include/linux/iio/buffer-dmaengine.h | 2 ++ 4 files changed, 12 insertions(+), 8 deletions(-) diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index b23d4a2b68a6..60e4b7ba38e5 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -285,6 +285,7 @@ I2C IIO devm_iio_device_alloc() devm_iio_device_register() + devm_iio_dmaengine_buffer_alloc() devm_iio_dmaengine_buffer_setup() devm_iio_kfifo_buffer_setup() devm_iio_kfifo_buffer_setup_ext() diff --git a/drivers/iio/buffer/Kconfig b/drivers/iio/buffer/Kconfig index 925c5bf074bc..27d82fb4bc4d 100644 --- a/drivers/iio/buffer/Kconfig +++ b/drivers/iio/buffer/Kconfig @@ -40,6 +40,13 @@ config IIO_BUFFER_HW_CONSUMER Should be selected by drivers that want to use the generic Hw consumer interface. +config IIO_HW_TRIGGERED_BUFFER + tristate "Industrial I/O hardware triggered buffer support" + select AUXILIARY_BUS + select IIO_TRIGGER + help + Provides helper functions for setting up hardware triggered buffers. + config IIO_KFIFO_BUF tristate "Industrial I/O buffering based on kfifo" help @@ -53,10 +60,3 @@ config IIO_TRIGGERED_BUFFER select IIO_KFIFO_BUF help Provides helper functions for setting up triggered buffers. - -config IIO_HW_TRIGGERED_BUFFER - tristate "Industrial I/O hardware triggered buffer support" - select AUXILIARY_BUS - select IIO_TRIGGER - help - Provides helper functions for setting up hardware triggered buffers. diff --git a/drivers/iio/buffer/industrialio-buffer-dmaengine.c b/drivers/iio/buffer/industrialio-buffer-dmaengine.c index c67ddf963bfb..03225939f223 100644 --- a/drivers/iio/buffer/industrialio-buffer-dmaengine.c +++ b/drivers/iio/buffer/industrialio-buffer-dmaengine.c @@ -244,7 +244,7 @@ static void __devm_iio_dmaengine_buffer_free(void *buffer) * * The buffer will be automatically de-allocated once the device gets destroyed. */ -static struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, +struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, const char *channel) { struct iio_buffer *buffer; @@ -261,6 +261,7 @@ static struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, return buffer; } +EXPORT_SYMBOL_GPL(devm_iio_dmaengine_buffer_alloc); /** * devm_iio_dmaengine_buffer_setup() - Setup a DMA buffer for an IIO device diff --git a/include/linux/iio/buffer-dmaengine.h b/include/linux/iio/buffer-dmaengine.h index 5c355be89814..3ac616ddf5b9 100644 --- a/include/linux/iio/buffer-dmaengine.h +++ b/include/linux/iio/buffer-dmaengine.h @@ -10,6 +10,8 @@ struct iio_dev; struct device; +struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, + const char *channel); int devm_iio_dmaengine_buffer_setup(struct device *dev, struct iio_dev *indio_dev, const char *channel); From patchwork Wed Jan 10 19:49:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187031 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1019965dyi; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:19 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/13] dt-bindings: iio: offload: add binding for PWM/DMA triggered buffer Date: Wed, 10 Jan 2024 13:49:52 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-11-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734492408983728 X-GMAIL-MSGID: 1787734492408983728 This adds a new binding for a PWM trigger and DMA data output connected to an SPI controller offload instance. Signed-off-by: David Lechner --- .../adi,spi-offload-pwm-trigger-dma-buffer.yaml | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml b/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml new file mode 100644 index 000000000000..748cfab19eff --- /dev/null +++ b/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SPI Offload with PWM Trigger and DMA Buffer Data Output + +maintainers: + - Michael Hennerich + - Nuno Sá + +description: | + This binding describes the connection of a PWM device to the trigger input + and a DMA channel to the output data stream of a SPI Offload instance. + + https://wiki.analog.com/resources/fpga/peripherals/spi_engine/offload + https://wiki.analog.com/resources/fpga/peripherals/spi_engine/tutorial + +$ref: /schemas/spi/adi,axi-spi-engine.yaml#/$defs/offload + +properties: + compatible: + const: adi,spi-offload-pwm-trigger-dma-buffer + + reg: + maxItems: 1 + + pwms: + maxItems: 1 + + dmas: + maxItems: 1 + +required: + - compatible + - pwms + - dmas + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + offloads { + #address-cells = <1>; + #size-cells = <0>; + + offload@0 { + compatible = "adi,spi-offload-pwm-trigger-dma-buffer"; + reg = <0>; + pwms = <&pwm 0>; + dmas = <&dma 0>; + }; + }; + }; From patchwork Wed Jan 10 19:49:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187034 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1020217dyi; Wed, 10 Jan 2024 11:55:12 -0800 (PST) X-Google-Smtp-Source: AGHT+IEDgJcRoM0X/C0TcUgQOiYqCHwQY3P/aMZnlfJcXZ/52CnwVKhGb7xBPavNAzmqo5E5sCpQ X-Received: by 2002:a05:6a20:734f:b0:19a:4551:460d with SMTP id v15-20020a056a20734f00b0019a4551460dmr187575pzc.6.1704916512166; Wed, 10 Jan 2024 11:55:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704916512; cv=none; d=google.com; s=arc-20160816; b=kaZbhuA+sXa3jfMUwfeR1bZRtleR2SPgE48UckZ36XGNuwFMteIo+JR7nccHdMYScw DA9a3gGQpUMgILi+ShHGpjUr4g7UlhVRGBK2SCT9ICE/dbxhVU18Yxlh9XX0WufoREW9 llVi6Uo6aB/NEublr769JwfCH9471BAfvTBwjETc52zOYyFz8/auF+XRGCKFCp53Dd7p OMDPbdwBTI79fWcMKJdD7Bznhz3PRhEaFqCbAroYZ3aQV+oNuArTQAXmOt7QVSuMLKou SweiFErHDX4c9nZ9y0f+4H6aNRFFpMc6Wu91rGGscC35DzPmvClp2QhZqYtwBxbhWCr/ Pqtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=EAfisbraTIzPK5DNS+hXkieTeMFvO6LSXMmUPvgA/Yc=; fh=cIqT9NcZdjUqupo3CRF2zie7E78k65IMo1it3Fi0alA=; b=uJX0Okw1XPxK9z1LpMQPr4vdwBQLEL8A3vqt3g7yP4SWqF53RBaYnZyONWVihyB3TU EcdH9C4wtjJFCejhoZUYBEatk73JLOLNufYjh9HMgh7xGUWPxc25Kfck2XSF4w5AHpCa XRtSXdNp1BSxKbfqyvE0JP1Z2lK6Ux8ZyTnkjNZJEes1ET4Gy9MFAJLqxNUVVpLokdi2 nK26u7T2DlOF72KaE44w02SXZ2ZA9v0QyDA/hQhwXovU5Rg434eucFx8AIMQ6XAuLoQC arRi5i+lO5+mpRrWQIpmrw64R56mxwFLvaWLv6vZcIjTdP3qgW4RxarFkcpJVkJe1FXJ npfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=cbfW3zrC; spf=pass (google.com: domain of linux-kernel+bounces-22683-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22683-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:20 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/13] iio: offload: add new PWM triggered DMA buffer driver Date: Wed, 10 Jan 2024 13:49:53 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-12-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734536572575986 X-GMAIL-MSGID: 1787734536572575986 This adds a new driver for handling SPI offloading using a PWM as the trigger and DMA for the received data. This will be used by ADCs in conjunction with SPI controllers with offloading support to be able to sample at high rates without CPU intervention. Signed-off-by: David Lechner --- drivers/iio/Kconfig | 1 + drivers/iio/Makefile | 1 + .../iio/buffer/industrialio-hw-triggered-buffer.c | 1 + drivers/iio/offload/Kconfig | 21 ++ drivers/iio/offload/Makefile | 2 + drivers/iio/offload/iio-pwm-triggered-dma-buffer.c | 212 +++++++++++++++++++++ 6 files changed, 238 insertions(+) diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig index 52eb46ef84c1..56738282d82f 100644 --- a/drivers/iio/Kconfig +++ b/drivers/iio/Kconfig @@ -90,6 +90,7 @@ source "drivers/iio/imu/Kconfig" source "drivers/iio/light/Kconfig" source "drivers/iio/magnetometer/Kconfig" source "drivers/iio/multiplexer/Kconfig" +source "drivers/iio/offload/Kconfig" source "drivers/iio/orientation/Kconfig" source "drivers/iio/test/Kconfig" if IIO_TRIGGER diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile index 9622347a1c1b..20acf5e1a4a7 100644 --- a/drivers/iio/Makefile +++ b/drivers/iio/Makefile @@ -34,6 +34,7 @@ obj-y += imu/ obj-y += light/ obj-y += magnetometer/ obj-y += multiplexer/ +obj-y += offload/ obj-y += orientation/ obj-y += position/ obj-y += potentiometer/ diff --git a/drivers/iio/buffer/industrialio-hw-triggered-buffer.c b/drivers/iio/buffer/industrialio-hw-triggered-buffer.c index 7a8a71066b0e..a2fae6059616 100644 --- a/drivers/iio/buffer/industrialio-hw-triggered-buffer.c +++ b/drivers/iio/buffer/industrialio-hw-triggered-buffer.c @@ -86,6 +86,7 @@ static int iio_hw_trigger_buffer_probe(struct auxiliary_device *adev, } static const struct auxiliary_device_id iio_hw_trigger_buffer_id_table[] = { + { .name = "pwm-triggered-dma-buffer.triggered-buffer" }, { } }; MODULE_DEVICE_TABLE(auxiliary, iio_hw_trigger_buffer_id_table); diff --git a/drivers/iio/offload/Kconfig b/drivers/iio/offload/Kconfig new file mode 100644 index 000000000000..760c0cfe0e9c --- /dev/null +++ b/drivers/iio/offload/Kconfig @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# SPI offload handlers for Industrial I/O +# +# When adding new entries keep the list in alphabetical order + +menu "SPI offload handlers" + +config IIO_PWM_TRIGGERED_DMA_BUFFER + tristate "PWM trigger and DMA buffer connected to SPI offload" + select AUXILIARY_BUS + select IIO_BUFFER_DMAENGINE + help + Provides a periodic hardware trigger via a PWM connected to the + trigger input of a SPI offload and a hardware buffer implemented + via DMA connected to the data output stream the a SPI offload. + + To compile this driver as a module, choose M here: the + module will be called "iio-pwm-triggered-dma-buffer". + +endmenu diff --git a/drivers/iio/offload/Makefile b/drivers/iio/offload/Makefile new file mode 100644 index 000000000000..7300ce82f066 --- /dev/null +++ b/drivers/iio/offload/Makefile @@ -0,0 +1,2 @@ + +obj-$(CONFIG_IIO_PWM_TRIGGERED_DMA_BUFFER) := iio-pwm-triggered-dma-buffer.o diff --git a/drivers/iio/offload/iio-pwm-triggered-dma-buffer.c b/drivers/iio/offload/iio-pwm-triggered-dma-buffer.c new file mode 100644 index 000000000000..970ea82316f6 --- /dev/null +++ b/drivers/iio/offload/iio-pwm-triggered-dma-buffer.c @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Platform driver for a PWM trigger and DMA buffer connected to a SPI + * controller offload instance implementing the iio-hw-triggered-buffer + * interface. + * + * Copyright (C) 2023 Analog Devices, Inc. + * Copyright (C) 2023 BayLibre, SAS + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct iio_pwm_triggered_dma_buffer { + struct iio_hw_triggered_buffer_device hw; + struct pwm_device *pwm; +}; + +static const struct iio_trigger_ops iio_pwm_triggered_dma_buffer_ops; + +static int iio_pwm_triggered_dma_buffer_set_state(struct iio_trigger *trig, bool state) +{ + struct iio_pwm_triggered_dma_buffer *st = iio_trigger_get_drvdata(trig); + + if (state) + return pwm_enable(st->pwm); + + pwm_disable(st->pwm); + + return 0; +} + +static int iio_pwm_triggered_dma_buffer_validate_device(struct iio_trigger *trig, + struct iio_dev *indio_dev) +{ + /* Don't allow assigning trigger via sysfs. */ + return -EINVAL; +} + +static const struct iio_trigger_ops iio_pwm_triggered_dma_buffer_ops = { + .set_trigger_state = iio_pwm_triggered_dma_buffer_set_state, + .validate_device = iio_pwm_triggered_dma_buffer_validate_device, +}; + +static u32 axi_spi_engine_offload_pwm_trigger_get_rate(struct iio_trigger *trig) +{ + struct iio_pwm_triggered_dma_buffer *st = iio_trigger_get_drvdata(trig); + u64 period_ns = pwm_get_period(st->pwm); + + if (period_ns) + return DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, period_ns); + + return 0; +} + +static int +axi_spi_engine_offload_set_samp_freq(struct iio_pwm_triggered_dma_buffer *st, + u32 requested_hz) +{ + int period_ns; + + if (requested_hz == 0) + return -EINVAL; + + period_ns = DIV_ROUND_UP(NSEC_PER_SEC, requested_hz); + + /* + * FIXME: We really just need a clock, not a PWM. The current duty cycle + * value is a hack to work around the edge vs. level offload trigger + * issue in the ADI AXI SPI Engine firmware. + */ + return pwm_config(st->pwm, 10, period_ns); +} + +static ssize_t sampling_frequency_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct iio_trigger *trig = to_iio_trigger(dev); + + return sysfs_emit(buf, "%u\n", + axi_spi_engine_offload_pwm_trigger_get_rate(trig)); +} + +static ssize_t sampling_frequency_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct iio_trigger *trig = to_iio_trigger(dev); + struct iio_pwm_triggered_dma_buffer *st = iio_trigger_get_drvdata(trig); + int ret; + u32 val; + + ret = kstrtou32(buf, 10, &val); + if (ret) + return ret; + + ret = axi_spi_engine_offload_set_samp_freq(st, val); + if (ret) + return ret; + + return len; +} + +static DEVICE_ATTR_RW(sampling_frequency); + +static struct attribute *iio_pwm_triggered_dma_buffer_attrs[] = { + &dev_attr_sampling_frequency.attr, + NULL +}; + +ATTRIBUTE_GROUPS(iio_pwm_triggered_dma_buffer); + +static void iio_pwm_triggered_dma_buffer_adev_release(struct device *dev) +{ +} + +static void iio_pwm_triggered_dma_buffer_unregister_adev(void *adev) +{ + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +static int iio_pwm_triggered_dma_buffer_probe(struct platform_device *pdev) +{ + struct iio_pwm_triggered_dma_buffer *st; + struct auxiliary_device *adev; + int ret; + + st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL); + if (!st) + return -ENOMEM; + + st->pwm = devm_pwm_get(&pdev->dev, NULL); + if (IS_ERR(st->pwm)) + return dev_err_probe(&pdev->dev, PTR_ERR(st->pwm), + "failed to get PWM\n"); + + st->hw.buffer = devm_iio_dmaengine_buffer_alloc(&pdev->dev, "rx"); + if (IS_ERR(st->hw.buffer)) + return dev_err_probe(&pdev->dev, PTR_ERR(st->hw.buffer), + "failed to allocate buffer\n"); + + st->hw.trig = devm_iio_trigger_alloc(&pdev->dev, "%s-%s-pwm-trigger", + dev_name(pdev->dev.parent), + dev_name(&pdev->dev)); + if (!st->hw.trig) + return -ENOMEM; + + st->hw.trig->ops = &iio_pwm_triggered_dma_buffer_ops; + st->hw.trig->dev.parent = &pdev->dev; + st->hw.trig->dev.groups = iio_pwm_triggered_dma_buffer_groups; + iio_trigger_set_drvdata(st->hw.trig, st); + + /* start with a reasonable default value */ + ret = axi_spi_engine_offload_set_samp_freq(st, 1000); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to set sampling frequency\n"); + + ret = devm_iio_trigger_register(&pdev->dev, st->hw.trig); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to register trigger\n"); + + adev = &st->hw.adev; + adev->name = "triggered-buffer"; + adev->dev.parent = &pdev->dev; + adev->dev.release = iio_pwm_triggered_dma_buffer_adev_release; + adev->id = 0; + + ret = auxiliary_device_init(adev); + if (ret) + return ret; + + ret = auxiliary_device_add(adev); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(&pdev->dev, + iio_pwm_triggered_dma_buffer_unregister_adev, adev); +} + +static const struct of_device_id iio_pwm_triggered_dma_buffer_match_table[] = { + { .compatible = "adi,spi-offload-pwm-trigger-dma-buffer" }, + { } +}; +MODULE_DEVICE_TABLE(of, iio_pwm_triggered_dma_buffer_match_table); + +static struct platform_driver iio_pwm_triggered_dma_buffer_driver = { + .probe = iio_pwm_triggered_dma_buffer_probe, + .driver = { + .name = "iio-pwm-triggered-dma-buffer", + .of_match_table = iio_pwm_triggered_dma_buffer_match_table, + }, +}; +module_platform_driver(iio_pwm_triggered_dma_buffer_driver); + +MODULE_AUTHOR("David Lechner "); +MODULE_DESCRIPTION("AXI SPI Engine Offload PWM Trigger"); +MODULE_LICENSE("GPL"); From patchwork Wed Jan 10 19:49:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 187035 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2411:b0:101:2151:f287 with SMTP id m17csp1021114dyi; Wed, 10 Jan 2024 11:57:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IHizZ8V1r/nox2XylOS8mR3uKAkvtf0dHZuada9uPlc+CPuGNw5/hOnqtawSJtBJ+y/4kT1 X-Received: by 2002:a05:6a20:da91:b0:199:c912:112a with SMTP id iy17-20020a056a20da9100b00199c912112amr1407478pzb.9.1704916633585; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 187-20020a4a0dc4000000b00595b35927a3sm938513oob.39.2024.01.10.11.51.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 11:51:20 -0800 (PST) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Frank Rowand Cc: David Lechner , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/13] iio: adc: ad7380: add SPI offload support Date: Wed, 10 Jan 2024 13:49:54 -0600 Message-ID: <20240109-axi-spi-engine-series-3-v1-13-e42c6a986580@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.12.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787734663951916658 X-GMAIL-MSGID: 1787734663951916658 This extends the ad7380 ADC driver to use the offload capabilities of capable SPI controllers. When offload support is available, a hardware triggered buffer is used to allow sampling a high rates without CPU intervention. To keep things simple, when this feature is present in hardware we disable the usual IIO triggered buffer and software timestamp rather than trying to support multiple buffers. Signed-off-by: David Lechner --- drivers/iio/adc/Kconfig | 1 + drivers/iio/adc/ad7380.c | 84 +++++++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 80 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index cbfd626712e3..da44b585ea46 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -128,6 +128,7 @@ config AD7380 select IIO_BUFFER select IIO_TRIGGER select IIO_TRIGGERED_BUFFER + select IIO_HW_TRIGGERED_BUFFER help AD7380 is a family of simultaneous sampling ADCs that share the same SPI register map and have similar pinouts. diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index 80712aaa9548..a71e8b81950b 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -133,6 +134,7 @@ struct ad7380_state { struct spi_device *spi; struct regulator *vref; struct regmap *regmap; + struct spi_offload *spi_offload; /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. @@ -335,6 +337,50 @@ static const struct iio_info ad7380_info = { .debugfs_reg_access = &ad7380_debugfs_reg_access, }; +static int ad7380_buffer_preenable(struct iio_dev *indio_dev) +{ + struct ad7380_state *st = iio_priv(indio_dev); + struct spi_transfer xfer = { + .bits_per_word = st->chip_info->channels[0].scan_type.realbits, + .len = 4, + .rx_buf = SPI_OFFLOAD_RX_SENTINEL, + }; + + return spi_offload_prepare(st->spi_offload, st->spi, &xfer, 1); +} + +static int ad7380_buffer_postenable(struct iio_dev *indio_dev) +{ + struct ad7380_state *st = iio_priv(indio_dev); + + return spi_offload_enable(st->spi_offload); +} + +static int ad7380_buffer_predisable(struct iio_dev *indio_dev) +{ + struct ad7380_state *st = iio_priv(indio_dev); + + spi_offload_disable(st->spi_offload); + + return 0; +} + +static int ad7380_buffer_postdisable(struct iio_dev *indio_dev) +{ + struct ad7380_state *st = iio_priv(indio_dev); + + spi_offload_unprepare(st->spi_offload); + + return 0; +} + +static const struct iio_buffer_setup_ops ad7380_buffer_ops = { + .preenable = &ad7380_buffer_preenable, + .postenable = &ad7380_buffer_postenable, + .predisable = &ad7380_buffer_predisable, + .postdisable = &ad7380_buffer_postdisable, +}; + static int ad7380_init(struct ad7380_state *st) { int ret; @@ -417,11 +463,39 @@ static int ad7380_probe(struct spi_device *spi) indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->available_scan_masks = ad7380_2_channel_scan_masks; - ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, - iio_pollfunc_store_time, - ad7380_trigger_handler, NULL); - if (ret) - return ret; + st->spi_offload = spi_offload_get(spi, 0); + if (IS_ERR(st->spi_offload)) { + ret = PTR_ERR(st->spi_offload); + + if (ret == -EOPNOTSUPP) + st->spi_offload = NULL; + else + return dev_err_probe(&spi->dev, ret, + "failed to get SPI offload\n"); + } + + if (st->spi_offload) { + /* + * We can't have a soft timestamp (always last channel) when + * using a hardware triggered buffer. + */ + indio_dev->num_channels -= 1; + + ret = devm_iio_hw_triggered_buffer_setup(&spi->dev, + indio_dev, + st->spi_offload->dev, + &ad7380_buffer_ops); + if (ret) + return dev_err_probe(&spi->dev, ret, + "failed to setup offload\n"); + } else { + ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, + iio_pollfunc_store_time, + ad7380_trigger_handler, + NULL); + if (ret) + return ret; + } ret = ad7380_init(st); if (ret)