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(fttx-pool-80.245.77.34.bambit.de [80.245.77.34]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id B4938360670; Fri, 5 Jan 2024 16:21:03 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Frank Wunderlich , Sam Shih , Daniel Golle , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/2] dt-bindings: reset: mediatek: add MT7988 LVTS reset ID Date: Fri, 5 Jan 2024 17:20:54 +0100 Message-Id: <20240105162056.43266-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240105162056.43266-1-linux@fw-web.de> References: <20240105162056.43266-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mail-ID: 675202b4-de89-47e3-acdb-612b0c41f0f9 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787268118223514477 X-GMAIL-MSGID: 1787268118223514477 From: Frank Wunderlich Add reset constant for using as index in driver and dts. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Matthias Brugger --- v2: - add missing commit message and SoB - change value of infrareset to 0 --- include/dt-bindings/reset/mediatek,mt7988-resets.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h index 493301971367..0216eeb249c7 100644 --- a/include/dt-bindings/reset/mediatek,mt7988-resets.h +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h @@ -10,4 +10,8 @@ /* ETHWARP resets */ #define MT7988_ETHWARP_RST_SWITCH 0 +/* INFRA resets */ +#define MT7988_INFRA_RST0_THERM_CTRL_SWRST 0 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7988 */ + From patchwork Fri Jan 5 16:20:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 185456 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp6327983dyb; Fri, 5 Jan 2024 08:30:57 -0800 (PST) X-Google-Smtp-Source: AGHT+IG7f4hnUiF/Yq77KXa1fFGehqc2MG13uel6rovP9F1mAkt4HtLtGGKrjlfBBVlF4paBqJVT X-Received: by 2002:a17:902:b489:b0:1d4:e1f2:556 with SMTP id y9-20020a170902b48900b001d4e1f20556mr2187449plr.37.1704472256970; Fri, 05 Jan 2024 08:30:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704472256; cv=none; d=google.com; s=arc-20160816; b=BpvyzMAv2TB0z0H/N/0IxtXswrH5UX6t3Lhi17e42Lo4ubkBFOda0oyZ2ATixgifK6 Eza0HjYWSMQx4dJbAH0hbCCqsDhEppoFPXYHhGJg07NF5lQXbk1NyyaEHB2rdC9i0Uml /3TBrGX3kr/Ud/Z+DW456en6Ot8v3K4SIK5KXWOZa1Xk9+CN1IfsX9fOMdsY3wRs35qv bBBQYnCuiiqp5vQeKSZdlDBqmdzaEloIAwrNkTswVqtBQZ7SDEWbCYLYfKRCWwelq5z8 GfpMQEAK72SC7jedhsMtJwjSjzc5G7/cRzWEvYrgAG40H8KDGpGPwMLbG47DqmyJki5A 8ugg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=vJWaZdp7vwDloIQ8UP6qzcfjDSiX0CaWYDKppc3KgpY=; fh=LUzJhCHXByutVbZY6Go/tqbqcJ6i1wxNrBhOCG2u75w=; b=JV6v9eD81QwC4gRf0fM0W6fEGOzOTvTGcVsrZ/gv9ae3lgE4okFNO6VxQiQU3sKaHt uzj1qdf+8M97fq3tJTHF/7Fi8qYiHqKgQb3WjsKImhWH7loLBlU4Zb8CWjkfKzdJ7sbU f0T4+oggjSMufXPb2OUHnY8IDm4OFkMyLUz9otxp82n+gJsWxEsJ7Bvi11TV9xKxCR97 IM2IPp9wpWaMH6gYpyd4mU/yfQx7CxIJoTOOvGoVkVDFipwXJgtAUfK/66MjSIJuEROC xs/D6NvB9xTuACW32flMpj7VKxReYPvHKNZojXerGToZKW/c5Wjw9X16bFlV84j9EVEw pCkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=eTopNlLc; spf=pass (google.com: domain of linux-kernel+bounces-18063-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-18063-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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(fttx-pool-80.245.77.34.bambit.de [80.245.77.34]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id 7F9C6360303; Fri, 5 Jan 2024 16:21:04 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Frank Wunderlich , Sam Shih , Daniel Golle , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/2] clk: mediatek: add infracfg reset controller for mt7988 Date: Fri, 5 Jan 2024 17:20:55 +0100 Message-Id: <20240105162056.43266-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240105162056.43266-1-linux@fw-web.de> References: <20240105162056.43266-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mail-ID: 31b037bd-067d-4073-9b39-c5bd1557013d X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787268701311136651 X-GMAIL-MSGID: 1787268701311136651 From: Frank Wunderlich Infracfg can also operate as reset controller, add support for it. Signed-off-by: Frank Wunderlich --- drivers/clk/mediatek/clk-mt7988-infracfg.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt7988-infracfg.c b/drivers/clk/mediatek/clk-mt7988-infracfg.c index 8011ef278bea..1660a45349ff 100644 --- a/drivers/clk/mediatek/clk-mt7988-infracfg.c +++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c @@ -14,6 +14,9 @@ #include "clk-gate.h" #include "clk-mux.h" #include +#include + +#define INFRA_RST_SET_OFFSET 0x80 static DEFINE_SPINLOCK(mt7988_clk_lock); @@ -249,12 +252,29 @@ static const struct mtk_gate infra_clks[] = { GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3", "sysaxi_sel", 31), }; +static u16 infra_rst_ofs[] = { + INFRA_RST_SET_OFFSET, +}; + +static u16 infra_idx_map[] = { + [MT7988_INFRA_RST0_THERM_CTRL_SWRST] = 0 * RST_NR_PER_BANK + 9, +}; + +static struct mtk_clk_rst_desc infra_rst_desc = { + .version = MTK_RST_SET_CLR, + .rst_bank_ofs = infra_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(infra_rst_ofs), + .rst_idx_map = infra_idx_map, + .rst_idx_map_nr = ARRAY_SIZE(infra_idx_map), +}; + static const struct mtk_clk_desc infra_desc = { .clks = infra_clks, .num_clks = ARRAY_SIZE(infra_clks), .mux_clks = infra_muxes, .num_mux_clks = ARRAY_SIZE(infra_muxes), .clk_lock = &mt7988_clk_lock, + .rst_desc = &infra_rst_desc, }; static const struct of_device_id of_match_clk_mt7988_infracfg[] = {