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Fri, 05 Jan 2024 15:37:17 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxfNyssZdlehADAA--.8054S4; Fri, 05 Jan 2024 15:37:16 +0800 (CST) From: Jiahao Xu To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Jiahao Xu Subject: [PATCH] LoongArch: Improve lasx_xvpermi_q_ insn pattern Date: Fri, 5 Jan 2024 15:37:13 +0800 Message-Id: <20240105073713.1799828-1-xujiahao@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxfNyssZdlehADAA--.8054S4 X-CM-SenderInfo: 50xmxthkdrqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBj93XoW3AFyxAr1UJryfKr1fGry7XFc_yoWxJFWDpF 1UJw1Sk3yI9FWUtFyDXFW3tr4UArsIka47XFWIg3srC3WDKFn0qF1xA3yqyw1DJayjvF13 JFWrJw10qr4UCwcCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07UNvtZUUUUU= X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787235178490537589 X-GMAIL-MSGID: 1787235178490537589 For instruction xvpermi.q, unused bits in operands[3] need be set to 0 to avoid causing undefined behavior on LA464. gcc/ChangeLog: * config/loongarch/lasx.md: Set the unused bits in operand[3] to 0. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lasx/lasx-xvpremi.c: Removed. * gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c: New test. diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index 027021b45d5..d7329f29f5f 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -635,6 +635,8 @@ (set_attr "mode" "")]) ;; xvpermi.q +;; Unused bits in operands[3] need be set to 0 to avoid +;; causing undefined behavior on LA464. (define_insn "lasx_xvpermi_q_" [(set (match_operand:LASX 0 "register_operand" "=f") (unspec:LASX @@ -643,7 +645,12 @@ (match_operand 3 "const_uimm8_operand")] UNSPEC_LASX_XVPERMI_Q))] "ISA_HAS_LASX" - "xvpermi.q\t%u0,%u2,%3" +{ + int mask = 0x33; + mask &= INTVAL (operands[3]); + operands[3] = GEN_INT (mask); + return "xvpermi.q\t%u0,%u2,%3"; +} [(set_attr "type" "simd_splat") (set_attr "mode" "")]) diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c new file mode 100644 index 00000000000..dbc29d2fb22 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c @@ -0,0 +1,64 @@ +/* { dg-options "-mlasx -w -fno-strict-aliasing" } */ +#include "../simd_correctness_check.h" +#include + +int +main () +{ + __m256i __m256i_op0, __m256i_op1, __m256i_op2, __m256i_out, __m256i_result; + __m256 __m256_op0, __m256_op1, __m256_op2, __m256_out, __m256_result; + __m256d __m256d_op0, __m256d_op1, __m256d_op2, __m256d_out, __m256d_result; + + int int_op0, int_op1, int_op2, int_out, int_result, i = 1, fail; + long int long_op0, long_op1, long_op2, lont_out, lont_result; + long int long_int_out, long_int_result; + unsigned int unsigned_int_out, unsigned_int_result; + unsigned long int unsigned_long_int_out, unsigned_long_int_result; + + *((unsigned long*)& __m256i_op0[3]) = 0x7fe37fe3001d001d; + *((unsigned long*)& __m256i_op0[2]) = 0x7fff7fff7fff0000; + *((unsigned long*)& __m256i_op0[1]) = 0x7fe37fe3001d001d; + *((unsigned long*)& __m256i_op0[0]) = 0x7fff7fff7fff0000; + *((unsigned long*)& __m256i_op1[3]) = 0x7575757575757575; + *((unsigned long*)& __m256i_op1[2]) = 0x7575757575757575; + *((unsigned long*)& __m256i_op1[1]) = 0x7575757575757575; + *((unsigned long*)& __m256i_op1[0]) = 0x7575757575757575; + *((unsigned long*)& __m256i_result[3]) = 0x7fe37fe3001d001d; + *((unsigned long*)& __m256i_result[2]) = 0x7fff7fff7fff0000; + *((unsigned long*)& __m256i_result[1]) = 0x7fe37fe3001d001d; + *((unsigned long*)& __m256i_result[0]) = 0x7fff7fff7fff0000; + __m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0x2a); + ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out); + + *((unsigned long*)& __m256i_op0[3]) = 0x0000000000000000; + *((unsigned long*)& __m256i_op0[2]) = 0x000000000019001c; + *((unsigned long*)& __m256i_op0[1]) = 0x0000000000000000; + *((unsigned long*)& __m256i_op0[0]) = 0x000000000019001c; + *((unsigned long*)& __m256i_op1[3]) = 0x0000000000000000; + *((unsigned long*)& __m256i_op1[2]) = 0x00000000000001fe; + *((unsigned long*)& __m256i_op1[1]) = 0x0000000000000000; + *((unsigned long*)& __m256i_op1[0]) = 0x00000000000001fe; + *((unsigned long*)& __m256i_result[3]) = 0x0000000000000000; + *((unsigned long*)& __m256i_result[2]) = 0x000000000019001c; + *((unsigned long*)& __m256i_result[1]) = 0x0000000000000000; + *((unsigned long*)& __m256i_result[0]) = 0x00000000000001fe; + __m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0xb9); + ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out); + + *((unsigned long*)& __m256i_op0[3]) = 0x00ff00ff00ff00ff; + *((unsigned long*)& __m256i_op0[2]) = 0x00ff00ff00ff00ff; + *((unsigned long*)& __m256i_op0[1]) = 0x00ff00ff00ff00ff; + *((unsigned long*)& __m256i_op0[0]) = 0x00ff00ff00ff00ff; + *((unsigned long*)& __m256i_op1[3]) = 0xffffffffffffffff; + *((unsigned long*)& __m256i_op1[2]) = 0xffff0000ffff0000; + *((unsigned long*)& __m256i_op1[1]) = 0xffffffffffffffff; + *((unsigned long*)& __m256i_op1[0]) = 0xffff0000ffff0000; + *((unsigned long*)& __m256i_result[3]) = 0xffffffffffffffff; + *((unsigned long*)& __m256i_result[2]) = 0xffff0000ffff0000; + *((unsigned long*)& __m256i_result[1]) = 0x00ff00ff00ff00ff; + *((unsigned long*)& __m256i_result[0]) = 0x00ff00ff00ff00ff; + __m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0xca); + ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpremi.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpremi.c deleted file mode 100644 index e9fc1d7d3b8..00000000000 --- a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpremi.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-options "-mlasx -w -fno-strict-aliasing" } */ -#include "../simd_correctness_check.h" -#include - -int -main () -{ - __m256i __m256i_op0, __m256i_op1, __m256i_op2, __m256i_out, __m256i_result; - __m256 __m256_op0, __m256_op1, __m256_op2, __m256_out, __m256_result; - __m256d __m256d_op0, __m256d_op1, __m256d_op2, __m256d_out, __m256d_result; - - int int_op0, int_op1, int_op2, int_out, int_result, i = 1, fail; - long int long_op0, long_op1, long_op2, lont_out, lont_result; - long int long_int_out, long_int_result; - unsigned int unsigned_int_out, unsigned_int_result; - unsigned long int unsigned_long_int_out, unsigned_long_int_result; - - return 0; -}