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X-OriginatorOrg: duagon.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jan 2024 08:19:19.3154 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a7e38b1-f649-4ce8-0399-08dc0b6b84b3 X-MS-Exchange-CrossTenant-Id: e5e7e96e-8a28-45d6-9093-a40dd5b51a57 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5e7e96e-8a28-45d6-9093-a40dd5b51a57;Ip=[194.38.86.34];Helo=[securemail.duagon.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000044.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVAP278MB0152 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786966030001504447 X-GMAIL-MSGID: 1786966030001504447 The value of AM65_CPSW_MAX_PACKET_SIZE represents the maximum length of a received frame. This value is written to the register AM65_CPSW_PORT_REG_RX_MAXLEN. The maximum MTU configured on the network device should then leave some room for the ethernet headers and frame check. Otherwise, if the network interface is configured to its maximum mtu possible, the frames will be larger than AM65_CPSW_MAX_PACKET_SIZE and will get dropped as oversized. Fixes: 93a76530316a ("net: ethernet: ti: introduce am65x/j721e gigabit eth subsystem driver") Signed-off-by: Jorge Sanjuan Garcia Reviewed-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 7651f90f51f2..378d69b8cb14 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2196,7 +2196,8 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) eth_hw_addr_set(port->ndev, port->slave.mac_addr); port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE; - port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE; + port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE - + (VLAN_ETH_HLEN + ETH_FCS_LEN); port->ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | NETIF_F_HW_CSUM | From patchwork Tue Jan 2 08:19:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2FuanXDoW4gR2FyY8OtYSwgSm9yZ2U=?= X-Patchwork-Id: 184280 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp4327303dyb; Tue, 2 Jan 2024 00:20:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IHvAZKOVqGshM7OrPTQa+FXQymHQck1B5fwCcfXv0NSWk+qRzy7lqC7DBpN5DXCgfAkwLXh X-Received: by 2002:a05:6a20:3d02:b0:196:399d:ae23 with SMTP id y2-20020a056a203d0200b00196399dae23mr3583816pzi.119.1704183643467; Tue, 02 Jan 2024 00:20:43 -0800 (PST) ARC-Seal: i=4; a=rsa-sha256; t=1704183643; cv=pass; d=google.com; s=arc-20160816; b=m1mvUkbSU39/LNwfONY5ANlTnj7cFopK6G0Fn1xV11BgqnmON5vowB2m87cn0PR+Il nDyIT+3vhW2TnSz9lAm8y5US0zGHLcE+AbOl90RRY4M6+ywaU7fkedz5a5sJxzzYWIdi WnuVSAk+wIIL2C/oCAJiNLeg/FZQHgpQ3CUctsP6JF0QuDd7lCg20R3fHZykvByYCm11 TXfZuldMIi3T5ht+Q98nJRtwjSpFn2c8UuyX6vQviP4X3H9DhH2JE/1bsUeQYOQCW399 XyC48+iI/UUB1fTql4VlJkbr1y1SqeSEotskZJC2MhfpSxaDTZFg9XFUd6iEdg6tffds D6mQ== ARC-Message-Signature: i=4; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :content-transfer-encoding:authentication-results-original :content-language:accept-language:in-reply-to:references:message-id :date:thread-index:thread-topic:subject:cc:to:from:dkim-signature :dkim-signature:dkim-signature; bh=LuTr/C/PIKKxoJpNifpOXDJfjanQlJPpng87SNsxyaY=; fh=bT6ChW4KOfkilHOFgeWWZ3OC4Vy/37G+vWhCCqwIybA=; b=oz/gooouQADH8hd2Ad/sHxh89lUAQ4HeXZuTLu5XrJO3wg7RKGZ0GzUIL2Yv+AK7cs sTAudUZBU1lWViYMmu8Kaid6wMsWTIWsGNmLx+ucApMT/kEQY0psw4qXJdwtSZoRork4 oTTKyXMlab6x9qUNpj2wDjYtxrkEzrvTQVccnaFmvyd0cG3aiDrBr+qj0new4TOoVgUR XVgClUMpyx/HQ7+6aUYd4JmGCv255zsDv9dtAWBd8Y47qMCcFq3rfqsUPjcnyhZNT4Hq RYFU98LtynO8tH+wMWnqXnrU1txLq6KnHqiS6nkcCIEOV4nJnxG4378qyydG564M6ZpU ZLBQ== ARC-Authentication-Results: i=4; mx.google.com; dkim=pass header.i=@duagon.com header.s=selector1 header.b=SOoubBbm; dkim=pass header.i=@duagon.com header.s=selector1 header.b=SOoubBbm; dkim=pass header.i=@duagon.com header.s=selector1 header.b=SOoubBbm; arc=pass (i=3 spf=pass spfdomain=duagon.com dkim=pass dkdomain=duagon.com dkim=pass dkdomain=duagon.com dmarc=pass fromdomain=duagon.com); spf=pass (google.com: domain of linux-kernel+bounces-14139-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-14139-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=duagon.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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X-OriginatorOrg: duagon.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jan 2024 08:19:22.3218 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b40c304d-b95d-4f60-4a2e-08dc0b6b8687 X-MS-Exchange-CrossTenant-Id: e5e7e96e-8a28-45d6-9093-a40dd5b51a57 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5e7e96e-8a28-45d6-9093-a40dd5b51a57;Ip=[194.38.86.34];Helo=[securemail.duagon.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B94.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV0P278MB1079 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786966067896530489 X-GMAIL-MSGID: 1786966067896530489 The value written to the register AM65_CPSW_PORT_REG_RX_MAXLEN is currently fixed to what AM65_CPSW_MAX_PACKET_SIZE defines. This patch prepares the driver so that the maximum received frame length can be configured in future updates. Signed-off-by: Jorge Sanjuan Garcia --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 13 ++++++++----- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 2 ++ 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 378d69b8cb14..a920146d7a60 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -151,9 +151,11 @@ static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave, static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port) { + struct am65_cpsw_common *common = port->common; + cpsw_sl_reset(port->slave.mac_sl, 100); /* Max length register has to be restored after MAC SL reset */ - writel(AM65_CPSW_MAX_PACKET_SIZE, + writel(common->rx_packet_max, port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); } @@ -455,7 +457,7 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common) AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD, common->cpsw_base + AM65_CPSW_REG_CTL); /* Max length register */ - writel(AM65_CPSW_MAX_PACKET_SIZE, + writel(common->rx_packet_max, host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); /* set base flow_id */ writel(common->rx_flow_id_base, @@ -507,7 +509,7 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common) for (i = 0; i < common->rx_chns.descs_num; i++) { skb = __netdev_alloc_skb_ip_align(NULL, - AM65_CPSW_MAX_PACKET_SIZE, + common->rx_packet_max, GFP_KERNEL); if (!skb) { ret = -ENOMEM; @@ -848,7 +850,7 @@ static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common, k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx); - new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE); + new_skb = netdev_alloc_skb_ip_align(ndev, common->rx_packet_max); if (new_skb) { ndev_priv = netdev_priv(ndev); am65_cpsw_nuss_set_offload_fwd_mark(skb, ndev_priv->offload_fwd_mark); @@ -2196,7 +2198,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) eth_hw_addr_set(port->ndev, port->slave.mac_addr); port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE; - port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE - + port->ndev->max_mtu = common->rx_packet_max - (VLAN_ETH_HLEN + ETH_FCS_LEN); port->ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | @@ -2926,6 +2928,7 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) return -ENOENT; common->rx_flow_id_base = -1; + common->rx_packet_max = AM65_CPSW_MAX_PACKET_SIZE; init_completion(&common->tdown_complete); common->tx_ch_num = AM65_CPSW_DEFAULT_TX_CHNS; common->pf_p0_rx_ptype_rrobin = false; diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index f3dad2ab9828..141160223d73 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -130,6 +130,8 @@ struct am65_cpsw_common { u32 tx_ch_rate_msk; u32 rx_flow_id_base; + int rx_packet_max; + struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES]; struct completion tdown_complete; atomic_t tdown_cnt; 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X-OriginatorOrg: duagon.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jan 2024 08:19:24.4492 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b1bfb0d2-4e06-4a7d-e77f-08dc0b6b87cb X-MS-Exchange-CrossTenant-Id: e5e7e96e-8a28-45d6-9093-a40dd5b51a57 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5e7e96e-8a28-45d6-9093-a40dd5b51a57;Ip=[194.38.86.34];Helo=[securemail.duagon.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B8D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV0P278MB0097 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786966067024185928 X-GMAIL-MSGID: 1786966067024185928 The switch supports ethernet frame sizes between 64 and 2024 bytes (including VLAN) as stated in the technical reference manual. This patch adds a new devicetree property so the switch ports can be configured with an MTU higher than the standar 1500 bytes, making the max frame length configured on the registers and the max_mtu advertised on the network device consistent. Signed-off-by: Jorge Sanjuan Garcia --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 18 ++++++++++++++---- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 1 + 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index a920146d7a60..6a5c8b6e03f4 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -56,7 +56,7 @@ #define AM65_CPSW_MAX_PORTS 8 #define AM65_CPSW_MIN_PACKET_SIZE VLAN_ETH_ZLEN -#define AM65_CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) +#define AM65_CPSW_MAX_PACKET_SIZE 2024 #define AM65_CPSW_REG_CTL 0x004 #define AM65_CPSW_REG_STAT_PORT_EN 0x014 @@ -2198,8 +2198,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) eth_hw_addr_set(port->ndev, port->slave.mac_addr); port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE; - port->ndev->max_mtu = common->rx_packet_max - - (VLAN_ETH_HLEN + ETH_FCS_LEN); + port->ndev->max_mtu = common->max_mtu; port->ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | NETIF_F_HW_CSUM | @@ -2927,8 +2926,19 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS) return -ENOENT; + common->max_mtu = VLAN_ETH_DATA_LEN; + of_property_read_u32(dev->of_node, "max-frame-size", &common->max_mtu); + + common->rx_packet_max = common->max_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; + if (common->rx_packet_max > AM65_CPSW_MAX_PACKET_SIZE) { + common->rx_packet_max = AM65_CPSW_MAX_PACKET_SIZE; + common->max_mtu = AM65_CPSW_MAX_PACKET_SIZE - + (VLAN_ETH_HLEN + ETH_FCS_LEN); + } + + dev_info(common->dev, "Max RX packet size set to %d\n", common->rx_packet_max); + common->rx_flow_id_base = -1; - common->rx_packet_max = AM65_CPSW_MAX_PACKET_SIZE; init_completion(&common->tdown_complete); common->tx_ch_num = AM65_CPSW_DEFAULT_TX_CHNS; common->pf_p0_rx_ptype_rrobin = false; diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index 141160223d73..3bb0ff94a46a 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -130,6 +130,7 @@ struct am65_cpsw_common { u32 tx_ch_rate_msk; u32 rx_flow_id_base; + int max_mtu; int rx_packet_max; struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES];