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Sat, 30 Dec 2023 15:44:46 +0000 From: Josua Mayer Date: Sat, 30 Dec 2023 16:44:36 +0100 Subject: [PATCH v4 02/11] dt-bindings: marvell: a38x: convert the soc compatibles description to yaml Message-Id: <20231230-support-clearfog-gtr-l8-sfp-v4-2-1d7f0e2c7128@solid-run.com> References: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> In-Reply-To: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.12.4 X-ClientProxiedBy: FR0P281CA0247.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::16) To AS8PR04MB8963.eurprd04.prod.outlook.com (2603:10a6:20b:42e::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8963:EE_|DB8PR04MB6970:EE_ X-MS-Office365-Filtering-Correlation-Id: 089e301f-d86e-4298-cfd7-08dc094e3fce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Note that the current bindings only document the SoC (armada380, armada385, armada388). This is undesirable, instead there should be entries for actual boards. For now only convert to yaml, the content can be corrected separately. Signed-off-by: Josua Mayer --- .../bindings/arm/marvell/armada-38x.yaml | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml new file mode 100644 index 000000000000..5af222e6db18 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/armada-38x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 38x Platforms + +maintainers: + - Gregory CLEMENT + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: Armada 380 SoC + items: + - const: marvell,armada380 + + - description: Armada 385 SoC + items: + - const: marvell,armada385 + - const: marvell,armada380 + + - description: Armada 388 SoC + items: + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + +additionalProperties: true From patchwork Sat Dec 30 15:44:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 184018 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp3145067dyb; Sat, 30 Dec 2023 07:46:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IFATGQtbmdsJbmF27BqN74FeS0lE1zy2h03w5Y2ZdyV1CCX2B0+TREfehrht29uSBb4KfkJ X-Received: by 2002:a05:6512:39c9:b0:50e:7c6e:e439 with SMTP id k9-20020a05651239c900b0050e7c6ee439mr2573294lfu.90.1703951204028; Sat, 30 Dec 2023 07:46:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1703951204; cv=pass; d=google.com; s=arc-20160816; b=YItTXfFyWVkUASAh8+UTblX4TDypMW9V2D08LWn9xFqrRaeKDQ15Iy14M6sY6QnT28 bOjJANusKPhQFIm2nRzL5u2ZKr+yaZLFYals3+G/VIqYeenNpZvDyuDQOeSo6YAlunx1 c9/5IWzGlippjiZtSetK8YTUE2/6Mlk/JCucvlXEpdD4HYQsF8g0lCb2Q6hxjXp7zBx5 Bat5BmgzKsghPfaIbUN2ViOrh+bKP6SwOqMUHvXYuAz2mHJW6sYax+jdqHSgqoGRJYs5 /olmCPcvyYe/Ezl05wLESsGcKsh5jgLjIJvo9o1Ps2qsGKCNE+P0KtqBqPgU69kLKrST EWXg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence:cc :to:in-reply-to:references:message-id:content-transfer-encoding :subject:date:from:dkim-signature; bh=p1NsaxaShk3jcZW2dEcpiSOjsTZyOZyG+OapyaxdmG0=; fh=LZ3+8MPuo3SMsa6OKaa4nXkr9HAal1HR+rgsxxjlDOA=; b=pCS0NZN+R6l817le1gUgveJlBPCvhW4U5pXgHRB5RQJOVW6LkRNGfmP4vD3BFcVpzE kD06TvIn6PV/m76YOzwIaVh5NtIKNyYWwIn9IjzY/bEfDz576an6J0TVFfkZFLcvHzUm 3euE455aWTNiRxC+NRp2c6Z7Hxte/umZtgTA4IvsnD/KxW1C/z+wcP0ynFxSEwWIT5Tk /8A1S2rqZ9R3RBgW0wEj3WpAGRtW6HAGId9X3l/dtCGecjrUQT3zho4rv4JJrzZhgx8D SxmgtrbR/YB6CP4e3FsRyggwadFN9YsKRXKoZlMcGGSfASUh+ZGYgj7rFl5hh0tPk6/B 4j7w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@solidrn.onmicrosoft.com header.s=selector1-solidrn-onmicrosoft-com header.b=hbWHH3NN; arc=pass (i=1 spf=pass spfdomain=solid-run.com dkim=pass dkdomain=solid-run.com dmarc=pass fromdomain=solid-run.com); spf=pass (google.com: domain of linux-kernel+bounces-13465-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-13465-ouuuleilei=gmail.com@vger.kernel.org" Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Sat, 30 Dec 2023 15:44:47 +0000 From: Josua Mayer Date: Sat, 30 Dec 2023 16:44:37 +0100 Subject: [PATCH v4 03/11] dt-bindings: marvell: a38x: add solidrun armada 388 clearfog boards Message-Id: <20231230-support-clearfog-gtr-l8-sfp-v4-3-1d7f0e2c7128@solid-run.com> References: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> In-Reply-To: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.12.4 X-ClientProxiedBy: FR0P281CA0247.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::16) To AS8PR04MB8963.eurprd04.prod.outlook.com (2603:10a6:20b:42e::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8963:EE_|DB8PR04MB6970:EE_ X-MS-Office365-Filtering-Correlation-Id: d3b3d1e7-e6fb-4128-cd18-08dc094e400c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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There are already 3 distinct dts in tree for these *two* boards, declaring particular compatible strings: - armada-388-clearfog.dts: compatible = "solidrun,clearfog-a1", "marvell,armada388", "marvell,armada385, "marvell,armada380"; - armada-388-clearfog-base.dts: compatible = "solidrun,clearfog-base-a1", "solidrun,clearfog-a1", "marvell,armada388", "marvell,armada385, "marvell,armada380"; - armada-388-clearfog-pro.dts: compatible = "solidrun,clearfog-base-a1", "solidrun,clearfog-a1", "marvell,armada388", "marvell,armada385, "marvell,armada380"; This has historic reasons, the first entry is a legacy name for the "pro" version, old versions of u-boot built when only one variant existed explicitly boot by this name. Note that both compatibles and model field include the string "A1". At least up to revision 2.0 of the board, this had been printed on the pcb. However in marketing material and conversations it is usually omitted. "Clearfog Pro" and "Clearfog Pro A1" always mean exactly the same product. Technically Base and Pro variants are similar enough that they can successfully boot with each other's dts. Hence it makes (some) sense for them to share the "clearfog-a1" compatible. Add bindings for the explicit variants including base / pro suffix. The legacy "armada-388-clearfog.dts" is not supported by these bindings" as it does not make sense having two bindings for one board. Signed-off-by: Josua Mayer --- .../devicetree/bindings/arm/marvell/armada-38x.yaml | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml index 5af222e6db18..4950b840bf1c 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -15,17 +15,14 @@ properties: compatible: oneOf: - - description: Armada 380 SoC - items: - - const: marvell,armada380 - - - description: Armada 385 SoC - items: - - const: marvell,armada385 - - const: marvell,armada380 + - description: + SolidRun Armada 388 clearfog family single-board computers. - - description: Armada 388 SoC items: + - enum: + - solidrun,clearfog-base-a1 + - solidrun,clearfog-pro-a1 + - const: solidrun,clearfog-a1 - const: marvell,armada388 - const: marvell,armada385 - const: marvell,armada380 From patchwork Sat Dec 30 15:44:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 184019 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp3145498dyb; Sat, 30 Dec 2023 07:48:08 -0800 (PST) X-Google-Smtp-Source: AGHT+IEmfX6J3v9TyVlp8XnFdGzrTUnZfa7ZambkTQbVH+E6u/fI2qQCdaAD9CZpA0xzBOtcVHc6 X-Received: by 2002:a05:6870:9625:b0:205:21f3:790f with SMTP id d37-20020a056870962500b0020521f3790fmr3080509oaq.42.1703951288258; Sat, 30 Dec 2023 07:48:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1703951288; cv=pass; d=google.com; s=arc-20160816; b=rdes94ob/iP26ypQ86A+N/9l6fWBELWVEhe0PoTVk/MUzRDgg64bphIl7vIyvw+dWf Hx3asd9g++0d0ZH8aS6i1+/o/qImH2FPk1sB+XFxqJW82NAKkGudT7Y7WuSKWNzpbdbW cxSHKYaZ5No/dRBjCqzCTzr8iqNJgt9uqHLw8YiUDXU6iaeK3EhfVIX5WZFW8RODdY4m 5XzJhKbSM2Jsw1TuKWeF5bWCeY890vWm+NFAsmFnoJEYxM9OfZnWwCoFhCPHkBGzR0Y4 1t5wZr3F8j6iiP4EaIEywsQMyIAH8zSS57bVHQJAdByNl4Nqo2ypDclSLDhqr28Frn5T LGug== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence:cc :to:in-reply-to:references:message-id:content-transfer-encoding :subject:date:from:dkim-signature; bh=42WnqD0/4HuqWDFVsN1eUAvjX4GJphQJ3fdFZ5K9Ags=; fh=LZ3+8MPuo3SMsa6OKaa4nXkr9HAal1HR+rgsxxjlDOA=; b=lxcR5rPQ5kByJYwpzSpPZUVAcQu+2A2jhVZpJf7teS9wwQoL67T3aIUrx+aqDHJM7W EwPlRowTRVMQ/3qJ+B84i1XLbTFwITpKLG3g5dXOI0tFqxsEyzcnAUYNFIY1zYQ5ZC5R m0X/Q5zINYcORgLhAqppDDtQkQi6zV0YHpPLyzcSeN0z4G7QcDz6fL2JLY99Ud1Nlm1Y WBxqFJb6WwnW0J4rfBvobrIWwtqPyh0VkVWq0mpmFYBhTCfSPWOEvb0dJszbfqHkOHlG DdLMd5TtGwRyzgVScBuVFX+9zaAfMiZi/zOfpx8vwru9HVpNcmIToB1iT1Gh/z8Wn/PW dnpQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@solidrn.onmicrosoft.com header.s=selector1-solidrn-onmicrosoft-com header.b=Ku8ipLCL; arc=pass (i=1 spf=pass spfdomain=solid-run.com dkim=pass dkdomain=solid-run.com dmarc=pass fromdomain=solid-run.com); spf=pass (google.com: domain of linux-kernel+bounces-13468-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-13468-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Sat, 30 Dec 2023 15:44:47 +0000 From: Josua Mayer Date: Sat, 30 Dec 2023 16:44:39 +0100 Subject: [PATCH v4 05/11] dt-bindings: marvell: a38x: add solidrun armada 385 clearfog gtr boards Message-Id: <20231230-support-clearfog-gtr-l8-sfp-v4-5-1d7f0e2c7128@solid-run.com> References: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> In-Reply-To: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.12.4 X-ClientProxiedBy: FR0P281CA0247.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::16) To AS8PR04MB8963.eurprd04.prod.outlook.com (2603:10a6:20b:42e::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8963:EE_|DB8PR04MB6970:EE_ X-MS-Office365-Filtering-Correlation-Id: 10af7657-a1d4-47ac-8e8e-08dc094e408d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Despite similar name these two boards are designed differently from the armada 388 clearfog base and pro, they only share a name and general use case. Signed-off-by: Josua Mayer --- Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml index 3babda0d575f..13f9aba97511 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -36,4 +36,14 @@ properties: - const: marvell,armada385 - const: marvell,armada380 + - description: + SolidRun Armada 385 based single-board computers. + + items: + - enum: + - solidrun,clearfog-gtr-l8 + - solidrun,clearfog-gtr-s4 + - const: marvell,armada385 + - const: marvell,armada380 + additionalProperties: true From patchwork Sat Dec 30 15:44:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 184021 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp3145612dyb; Sat, 30 Dec 2023 07:48:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IEU0LCPsMfDsi5WS63YjknAN8/BXCCVRzkpaWbl0uyW14L6OmU2E7EZvwvbtUJhl6Uw8LpW X-Received: by 2002:a05:622a:1c5:b0:428:ad1:882e with SMTP id t5-20020a05622a01c500b004280ad1882emr3138707qtw.32.1703951309465; Sat, 30 Dec 2023 07:48:29 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1703951309; cv=pass; d=google.com; s=arc-20160816; b=XMNiEACiHZcZshxDktWhbmCGMAoXVBG4l6mAY+eio6XrNuR5faOXZ0Bhra7hqqbdLX FJQDWhWc6YKmXl7wAZYkkCnQNPSX/EMKnJIWdZArVWzRAY1mSoLi/0/UqUdpm5qKMxym ba1N9z4ct3kTQ99WRey/uzlPzfufNjeMTjYderuD6oE1cOU5WCtxOI6CJf/qE0bAEQgL 2wETjjcLb8CkgPwdcUNfSxmIqFpesRCD5DaZSxmLHgbjbRSqCeARpsRwhSdnjf0wFd4C 0/DhDToV55Gn0EMzctU/QZ695l6ToWGjx0WkooxNh9e5Gm+iMPA7SxEdg6Cnh1LURF1o 8IIw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence:cc :to:in-reply-to:references:message-id:content-transfer-encoding :subject:date:from:dkim-signature; bh=MglBJUqaxruQGh0ZPAoTMXRHGmU/vvywi3A7VAP5PSs=; fh=LZ3+8MPuo3SMsa6OKaa4nXkr9HAal1HR+rgsxxjlDOA=; b=zJE4HLW+wUzJe37yW74/aAR7xNg4bmg4HggYA4BP/g83Ri5uJjQzpUbPVTJvyG8l3Q PX7tA6bdxximz9ts2tSYiE5CVYfS6B+fGJeeN750gzCW0gaiqL8R4DV1fmld+CPVUsky AMRPtyWvjGJOjDTdn+yaAcYwj4kwmnJ67B1jkUC2Nr5llbvnBQGNqrUMUYYh5lnUWowa xI/B+u1oMJLDWUtmJwTBWuvmYqYKwc6CLpbh6RTg37/SWKpY8+Aya3/7dkVMKORxt1md EqHFujXeo5+13KvU7/gB6TLuDuXXeulrSA9e3AqRdLuvMluMtN87k+rnHZhLpy5iAQa+ lPdw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@solidrn.onmicrosoft.com header.s=selector1-solidrn-onmicrosoft-com header.b=L+Dk1hp3; arc=pass (i=1 spf=pass spfdomain=solid-run.com dkim=pass dkdomain=solid-run.com dmarc=pass fromdomain=solid-run.com); spf=pass (google.com: domain of linux-kernel+bounces-13473-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-13473-ouuuleilei=gmail.com@vger.kernel.org" Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Sat, 30 Dec 2023 15:44:49 +0000 From: Josua Mayer Date: Sat, 30 Dec 2023 16:44:43 +0100 Subject: [PATCH v4 09/11] arm: dts: marvell: clearfog-gtr: add missing pinctrl for all used gpios Message-Id: <20231230-support-clearfog-gtr-l8-sfp-v4-9-1d7f0e2c7128@solid-run.com> References: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> In-Reply-To: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.12.4 X-ClientProxiedBy: FR0P281CA0247.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::16) To AS8PR04MB8963.eurprd04.prod.outlook.com (2603:10a6:20b:42e::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8963:EE_|DB8PR04MB6970:EE_ X-MS-Office365-Filtering-Correlation-Id: af07b66e-1a13-48f9-449e-08dc094e41c8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Since U-Boot is shared between multiple board variants, i.e. a388 clearfog pro / base, clearfog gtr l8 / s4, it is better to explicitly configure functions. Add explicit pinctrl entries for all gpios currently in use. Additionally the loss-of-signal gpio specified is invalid, in fact los only has a pull-up on the board but no gpio connection to the cpu. Remove this stray reference. Signed-off-by: Josua Mayer --- .../boot/dts/marvell/armada-385-clearfog-gtr.dtsi | 42 ++++++++++++++++++++-- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi index 8eabb60765b0..39ac97edb463 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi @@ -162,6 +162,22 @@ cf_gtr_isolation_pins: cf-gtr-isolation-pins { marvell,function = "gpio"; }; + cf_gtr_led_pins: led-pins { + marvell,pins = "mpp42", "mpp52"; + marvell,function = "gpio"; + }; + + cf_gtr_lte_disable_pins: lte-disable-pins { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + cf_gtr_pci_pins: pci-pins { + // pci reset + marvell,pins = "mpp33", "mpp35", "mpp44"; + marvell,function = "gpio"; + }; + cf_gtr_poe_reset_pins: cf-gtr-poe-reset-pins { marvell,pins = "mpp48"; marvell,function = "gpio"; @@ -179,6 +195,12 @@ cf_gtr_sdhci_pins: cf-gtr-sdhci-pins { marvell,function = "sd0"; }; + cf_gtr_sfp0_pins: sfp0-pins { + /* sfp modabs, txdisable */ + marvell,pins = "mpp25", "mpp46"; + marvell,function = "gpio"; + }; + cf_gtr_spi1_cs_pins: spi1-cs-pins { marvell,pins = "mpp59"; marvell,function = "spi1"; @@ -193,6 +215,11 @@ cf_gtr_usb3_con_vbus: cf-gtr-usb3-con-vbus { marvell,pins = "mpp22"; marvell,function = "gpio"; }; + + cf_gtr_wifi_disable_pins: wifi-disable-pins { + marvell,pins = "mpp30", "mpp31"; + marvell,function = "gpio"; + }; }; sdhci@d8000 { @@ -221,21 +248,26 @@ usb3@f8000 { }; pcie { + pinctrl-0 = <&cf_gtr_pci_pins>; + pinctrl-names = "default"; status = "okay"; /* * The PCIe units are accessible through * the mini-PCIe connectors on the board. */ + /* CON3 - serdes 0 */ pcie@1,0 { reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; status = "okay"; }; + /* CON4 - serdes 2 */ pcie@2,0 { reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; status = "okay"; }; + /* CON2 - serdes 4 */ pcie@3,0 { reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; status = "okay"; @@ -243,10 +275,12 @@ pcie@3,0 { }; }; + /* CON5 */ sfp0: sfp { compatible = "sff,sfp"; + pinctrl-0 = <&cf_gtr_sfp0_pins>; + pinctrl-names = "default"; i2c-bus = <&i2c1>; - los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio0 25 GPIO_ACTIVE_LOW>; tx-disable-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; @@ -273,6 +307,8 @@ button-1 { gpio-leds { compatible = "gpio-leds"; + pinctrl-0 = <&cf_gtr_led_pins>; + pinctrl-names = "default"; led1 { function = LED_FUNCTION_CPU; @@ -408,7 +444,7 @@ &ahci1 { }; &gpio0 { - pinctrl-0 = <&cf_gtr_fan_pwm>; + pinctrl-0 = <&cf_gtr_fan_pwm &cf_gtr_wifi_disable_pins>; pinctrl-names = "default"; wifi-disable { @@ -420,7 +456,7 @@ wifi-disable { }; &gpio1 { - pinctrl-0 = <&cf_gtr_isolation_pins &cf_gtr_poe_reset_pins>; + pinctrl-0 = <&cf_gtr_isolation_pins &cf_gtr_poe_reset_pins &cf_gtr_lte_disable_pins>; pinctrl-names = "default"; lte-disable { From patchwork Sat Dec 30 15:44:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 184020 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp3145528dyb; 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Sat, 30 Dec 2023 15:44:51 +0000 From: Josua Mayer Date: Sat, 30 Dec 2023 16:44:45 +0100 Subject: [PATCH v4 11/11] arm: dts: marvell: clearfog-gtr-l8: align port numbers with enclosure Message-Id: <20231230-support-clearfog-gtr-l8-sfp-v4-11-1d7f0e2c7128@solid-run.com> References: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> In-Reply-To: <20231230-support-clearfog-gtr-l8-sfp-v4-0-1d7f0e2c7128@solid-run.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.12.4 X-ClientProxiedBy: FR0P281CA0247.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::16) To AS8PR04MB8963.eurprd04.prod.outlook.com (2603:10a6:20b:42e::18) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8963:EE_|DB9PR04MB9704:EE_ X-MS-Office365-Filtering-Correlation-Id: cc4d20c0-a3e6-4a42-65c2-08dc094e426a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The "lan" ports on the 8-port switch in device-tree were numbered in reverse wrt. enclosure. Update all device-tree labels to match. Signed-off-by: Josua Mayer --- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 2df388f222ec..da6981677b03 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -32,49 +32,49 @@ ports { port@1 { reg = <1>; - label = "lan8"; + label = "lan1"; phy-handle = <&switch0phy0>; }; port@2 { reg = <2>; - label = "lan7"; + label = "lan2"; phy-handle = <&switch0phy1>; }; port@3 { reg = <3>; - label = "lan6"; + label = "lan3"; phy-handle = <&switch0phy2>; }; port@4 { reg = <4>; - label = "lan5"; + label = "lan4"; phy-handle = <&switch0phy3>; }; port@5 { reg = <5>; - label = "lan4"; + label = "lan5"; phy-handle = <&switch0phy4>; }; port@6 { reg = <6>; - label = "lan3"; + label = "lan6"; phy-handle = <&switch0phy5>; }; port@7 { reg = <7>; - label = "lan2"; + label = "lan7"; phy-handle = <&switch0phy6>; }; port@8 { reg = <8>; - label = "lan1"; + label = "lan8"; phy-handle = <&switch0phy7>; };