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Wysocki" Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Conor Dooley , Hector Yuan , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: cpufreq: Add big CPU supply Date: Fri, 29 Dec 2023 18:28:39 -0300 Message-ID: <20231229212853.277334-1-nfraprado@collabora.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786653428697473184 X-GMAIL-MSGID: 1786653428697473184 The performance-controller hardware block on MediaTek SoCs is responsible for controlling the frequency of the CPUs. As such, it needs any CPU regulator to have been configured prior to initializing. Add a phandle in the binding so this dependency can be described. Signed-off-by: Nícolas F. R. A. Prado --- .../devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml index d0aecde2b89b..d75b01d04998 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml @@ -33,6 +33,8 @@ properties: performance domains. const: 1 + big-cpus-supply: true + required: - compatible - reg From patchwork Fri Dec 29 21:28:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 183943 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp2806941dyb; Fri, 29 Dec 2023 13:31:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IGnYxwdo+kGAemOFyJvu33HJzGzfa5sB1DyUZgjnJfrEf4fqAocszqekcVz97dFMQLimodU X-Received: by 2002:a05:6359:630f:b0:172:ab3b:cc1e with SMTP id sf15-20020a056359630f00b00172ab3bcc1emr8630886rwb.4.1703885501015; Fri, 29 Dec 2023 13:31:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703885500; cv=none; d=google.com; s=arc-20160816; b=sV9sLSFJloSbFsmdescYWLAsVCbJ8VwW8ztoJXTTL3nVqQ+BhEwb4lCt8+dWUS50Za 3jLCPoWEx3dm/9J9StFXoanCbjDNnF2mBbOU7Ml6Te80RfrtYoVY8NTLCk8SNOtW0Wuu 8zCMhTxhVEU/HrNX22ZXF+4MmAWrriQUn5hpPQoLTQ/JUmvWpjRShDDcGfQSsNStT/IF 2UHsu0DL3poujtS1CsAGfBU0v+dDYK51AEMrG2Hb4a3o18U/jNHW60zzvSrkcUdVHCrC 5X6aeTa5bxjwH6BnDOv2t7SkGPfuIPmDQOTQym6CijoXnkPkEQnF7M+WzkB0tnUsxBIB NGfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=e0uNg0JJza3ekbCEOERdWEzmvDh/VhU6Jzy3Re4RDF0=; fh=7iT0F+vlNmjieKvkExnW2JmE0ytlxlPcl83g8i1GN8M=; b=09cq8suvRZWKVbZ/jNr6EZsNCJPfkkc95MczM2gYzrWuS2Tl4r8+mFxOJxa1bZflsK gNHQIPyJTDww5VGARBf+LPhmM/DiE+wDRiRxeGK3IGD3ayDcgTEpwmk797eOWxL1xxYA I1X4YCbCPE//V4oo8HNhaLzk747FjFaauLfnRllQUnJY5/Ehzr96fyiu5hVvrfLJ/tyg ehHnLclkNnw9sNzy2qMfYDN1MMl1FOyWGJSq+1fK4rMySYtWG38MLyaQ1sTtFXeUIzq2 yWMvL6zVKEEOk6cudfHrEqZK/lIeXfpx41Jbsw6ti5XWx0aqVLyxyyxHUD33NNw9es2U TB/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=HPgwDdLK; spf=pass (google.com: domain of linux-kernel+bounces-13242-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-13242-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Wysocki" Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 2/2] arm64: dts: mediatek: cherry: Add CPU supply dependency to cpufreq-hw Date: Fri, 29 Dec 2023 18:28:40 -0300 Message-ID: <20231229212853.277334-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231229212853.277334-1-nfraprado@collabora.com> References: <20231229212853.277334-1-nfraprado@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786653443173348695 X-GMAIL-MSGID: 1786653443173348695 When the mediatek-cpufreq-hw driver enables the hardware (by writing to REG_FREQ_ENABLE), if the regulator supplying the voltage to the big CPUs hasn't probed yet, the platform hangs shortly after and "rcu: INFO: rcu_preempt detected stalls on CPUs/tasks" are printed in the log. To prevent this from happening, describe the big CPUs regulator in the performance-controller DT node, so that devlink ensures the regulator has been probed and configured before the frequency scaling hardware is probed and enabled. Signed-off-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index dd5b89b73190..505da60eee90 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -502,6 +502,10 @@ &pcie1 { pinctrl-0 = <&pcie1_pins_default>; }; +&performance { + big-cpus-supply = <&mt6315_6_vbuck1>; +}; + &pio { mediatek,rsel-resistance-in-si-unit; pinctrl-names = "default";