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[2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id h7-20020a654047000000b005bdbcdc9e3dsi10173152pgp.142.2023.12.26.11.56.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:56:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-11663-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20210309 header.b="P/F1XcCX"; spf=pass (google.com: domain of linux-kernel+bounces-11663-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-11663-ouuuleilei=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 56DCAB22375 for ; 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bh=Rr4zZlZeeGcP+0FJ74qNZJLVzA73VMRgRJ8o8EqCzVc=; b=P/F1XcCXAwd3b4bw3Mr/MUXT2T 3O9/8xY0wu0NlfzE/qJVusvjUWYE3KTZYVj1VnnHXMvKzrmmKzEILj09hftfpzlOSr0Daf/epeHTa X9Pr+zCXq2Eqh38mMbT65HuI5aCrk1JFx0wGLW9y0zTSbHgEDFNybxZWfUICYmZg3R1iKewvldvcN 25mZ/jv6SU0IfcCgVRRPZNHMmKZHvzByutV8WR5aXRlRpiPVo2R8t3fuUd7EhWm8/XOxMAXw5SkNi e//MsNrqKKT0h7P2C7m7wneAu5drw+wCPpV1TNuHk/LM7hxjJ+bffGwus4yBElMzdyL0jx9QHmtl1 /Hrv5kAw==; Received: from [50.53.46.231] (helo=bombadil.infradead.org) by bombadil.infradead.org with esmtpsa (Exim 4.96 #2 (Red Hat Linux)) id 1rIDVZ-00DT1I-17; Tue, 26 Dec 2023 19:54:33 +0000 From: Randy Dunlap To: linux-kernel@vger.kernel.org Cc: Randy Dunlap , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, Jonathan Corbet , dri-devel@lists.freedesktop.org Subject: [PATCH v2 1/4] drm/i915/gem: reconcile Excess struct member kernel-doc warnings Date: Tue, 26 Dec 2023 11:54:29 -0800 Message-ID: <20231226195432.10891-1-rdunlap@infradead.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786375637685941145 X-GMAIL-MSGID: 1786375637685941145 Document nested struct members with full names as described in Documentation/doc-guide/kernel-doc.rst. i915_gem_context_types.h:420: warning: Excess struct member 'lock' description in 'i915_gem_context' Signed-off-by: Randy Dunlap Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Cc: intel-gfx@lists.freedesktop.org Cc: Jonathan Corbet Cc: dri-devel@lists.freedesktop.org Reviewed-by: Rodrigo Vivi Reviewed-by: Andi Shyti --- v2: add Reviewed-by: Rodrigo rebase and resend due to (i915) patchwork being down drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff -- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h @@ -412,9 +412,9 @@ struct i915_gem_context { /** @stale: tracks stale engines to be destroyed */ struct { - /** @lock: guards engines */ + /** @stale.lock: guards engines */ spinlock_t lock; - /** @engines: list of stale engines */ + /** @stale.engines: list of stale engines */ struct list_head engines; } stale; }; From patchwork Tue Dec 26 19:54:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Randy Dunlap X-Patchwork-Id: 183362 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp1067412dyb; Tue, 26 Dec 2023 11:55:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IGD+3EtyC7Rl13usLxSl1/o9IO/R900vYxBBx7SgTUwUVY2I9roeGuK9eC6W6G16p+U1ASR X-Received: by 2002:a05:6358:6f93:b0:174:c9a0:cf99 with SMTP id s19-20020a0563586f9300b00174c9a0cf99mr3777843rwn.57.1703620513970; Tue, 26 Dec 2023 11:55:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703620513; cv=none; d=google.com; s=arc-20160816; b=cyHIC5Iz+W0jjdWW+ijFhwadhDyozqdWUWJz3YQS3tVm+hRKNejhIM+J1MHcvq+qlJ v2rQN1bKttG2TxmgWzMtsMsA5S2JUhS3bQ7QHQP76M9qk65D8SBTjLyl5Cc6OA9I8hzr Pn00ygZ8SGNBuuG8FhHm5yQm+6d9+YWmElWd8Pk83+rjxIUwEh6tik9AhOeRCR8hTV0V lLt5GvIOAXRoNN5QwXc/TG9iSJ73Y810qBwlAJOGhcA36TO7pQFwtSKbR0tMS41jSBeY YTlidscHIPoEq4hlvvBKo6D+3DEY/PIPbbpF5jHiZB4q34eX7ho5HUI/44eIBSah7Efz Z/GQ== ARC-Message-Signature: i=1; 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Signed-off-by: Randy Dunlap Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Cc: intel-gfx@lists.freedesktop.org Cc: Jonathan Corbet Cc: dri-devel@lists.freedesktop.org Reviewed-by: Rodrigo Vivi --- v2: add Reviewed-by: Rodrigo rebase and resend due to (i915) patchwork being down drivers/gpu/drm/i915/gt/intel_gsc.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff -- a/drivers/gpu/drm/i915/gt/intel_gsc.h b/drivers/gpu/drm/i915/gt/intel_gsc.h --- a/drivers/gpu/drm/i915/gt/intel_gsc.h +++ b/drivers/gpu/drm/i915/gt/intel_gsc.h @@ -21,8 +21,11 @@ struct mei_aux_device; /** * struct intel_gsc - graphics security controller * - * @gem_obj: scratch memory GSC operations - * @intf : gsc interface + * @intf : gsc interface + * @intf.adev : MEI aux. device for this @intf + * @intf.gem_obj : scratch memory GSC operations + * @intf.irq : IRQ for this device (%-1 for no IRQ) + * @intf.id : this interface's id number/index */ struct intel_gsc { struct intel_gsc_intf { From patchwork Tue Dec 26 19:54:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Randy Dunlap X-Patchwork-Id: 183364 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp1067672dyb; Tue, 26 Dec 2023 11:55:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IH4N0h2c3fdLpGUzBghdfM8aWaCCIveWJEuDSwzW4bSH9tcDSQqyj/jT096YfdZkIUQB9KI X-Received: by 2002:a05:6808:189d:b0:3b8:b063:9b52 with SMTP id bi29-20020a056808189d00b003b8b0639b52mr9707056oib.68.1703620555846; Tue, 26 Dec 2023 11:55:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703620555; cv=none; d=google.com; s=arc-20160816; b=BkoFp7mmPKt8wovUZdnpX/i5JAJ+GS9Awy8R7ul81gYFjle9/8qCBQ2r8jUXOoHlgP 28ley7Q5jt4ylTIbr8DckszarSoULMinpsi7Xe1tQH+KSocctx0hyrjYXPTcJxcCPD06 q/j5oM1DjeBO/8OvzjcPT/nK9gIWvABoeMfXXZoV1dr/EC93/h94iJVGh2Fa7xegNLo1 4yYynKRtifdaMv+LcLA0Ig8DGDFahFHWR0T+YIq0HzPaQXRSmqgo6XL4MERAo47QAlpU 7l2hxVh2aMXpzaFuyeXZKj66P9DHw7Ljv+jggQEpV96EjSocAcFZKcdUnorKRnWqMofT LCIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=z4Wn+/VNwpqOioXRh2QsUOx4g40GB1Jq0DfMlgit/VU=; fh=7C+om+4LAiL/I2vqDXHjdCv+GFuVkhSSXjorl92wcJo=; b=T77iP4OJLkR7+gH2bRBtYrnyGFWX4gF0BsO9IGyxpsQ1+1/OhNS5nMo5bgo+HnqnvP thgUMWvGaz2QALQO0dHqJQRKJFdDb6e8sbzt/6T5YLrJ+vHpgu3MhoIHct+dnrMGMfjg PoPprzN/kkC2zlcB8PCCCZL19yRklHFtxt+rD+OnzM7UO2IRGUm0Lsj2ZqQgEwyVr5fQ ngVlSN8WdlQnXXOxsKMX/s0JpelUN3sPuvf4KSMolA+nbpAjQ658oL2WOitMdjspHzsZ IhHSiuOaU+QMX3FlqwlW5zcYm8hMKsY7wigTb/d0FQn+hu0RdV5lVyD9YFQFeaIZJp2y SQjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20210309 header.b=i97GQpQr; spf=pass (google.com: domain of linux-kernel+bounces-11661-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-11661-ouuuleilei=gmail.com@vger.kernel.org" Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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bh=z4Wn+/VNwpqOioXRh2QsUOx4g40GB1Jq0DfMlgit/VU=; b=i97GQpQrz/NVAFXnkXRX+XaxUs YJtus3r5FhJ+iUZhBb01XtjFT4gnmyxkrkhRTYFUegiJth/dup39weVst2FcSytZmRBcdcqXO2wKk 04v5Y1Rt/ZNEnh8QP4H1soZN0b98Obv46dCg4bpuPMWFbHxWUcMsgCpa+U5fLv4FlIhYpU1EH/Sgr sIfcfoBpX+O2kthHbVOJh4KvIqOpxNz6EC81tKmh1f7uZfn6f2OHnKhcmQirGk0LGfrm5skTIuda9 bUTBpYemXbJiQtRCj0/yFvcIvdAYxnILcpJJ7t0pbmn1mQmcjq8NJA1Re3kEDOuujHU+7rEWv2q1l aP099BLQ==; Received: from [50.53.46.231] (helo=bombadil.infradead.org) by bombadil.infradead.org with esmtpsa (Exim 4.96 #2 (Red Hat Linux)) id 1rIDVa-00DT1I-07; Tue, 26 Dec 2023 19:54:34 +0000 From: Randy Dunlap To: linux-kernel@vger.kernel.org Cc: Randy Dunlap , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, Jonathan Corbet , dri-devel@lists.freedesktop.org Subject: [PATCH v2 3/4] drm/i915/guc: reconcile Excess struct member kernel-doc warnings Date: Tue, 26 Dec 2023 11:54:31 -0800 Message-ID: <20231226195432.10891-3-rdunlap@infradead.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231226195432.10891-1-rdunlap@infradead.org> References: <20231226195432.10891-1-rdunlap@infradead.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786375628075720170 X-GMAIL-MSGID: 1786375628075720170 Document nested struct members with full names as described in Documentation/doc-guide/kernel-doc.rst. intel_guc.h:305: warning: Excess struct member 'lock' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'guc_ids' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'num_guc_ids' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'guc_ids_bitmap' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'guc_id_list' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'guc_ids_in_use' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'destroyed_contexts' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'destroyed_worker' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'reset_fail_worker' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'reset_fail_mask' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'sched_disable_delay_ms' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'sched_disable_gucid_threshold' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'lock' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'gt_stamp' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'ping_delay' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'work' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'shift' description in 'intel_guc' intel_guc.h:305: warning: Excess struct member 'last_stat_jiffies' description in 'intel_guc' 18 warnings as Errors Signed-off-by: Randy Dunlap Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Cc: intel-gfx@lists.freedesktop.org Cc: Jonathan Corbet Cc: dri-devel@lists.freedesktop.org Reviewed-by: Rodrigo Vivi Reviewed-by: Andi Shyti --- v2: add Reviewed-by: Rodrigo rebase and resend due to (i915) patchwork being down drivers/gpu/drm/i915/gt/uc/intel_guc.h | 75 ++++++++++++----------- 1 file changed, 42 insertions(+), 33 deletions(-) diff -- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h @@ -105,61 +105,67 @@ struct intel_guc { */ struct { /** - * @lock: protects everything in submission_state, - * ce->guc_id.id, and ce->guc_id.ref when transitioning in and - * out of zero + * @submission_state.lock: protects everything in + * submission_state, ce->guc_id.id, and ce->guc_id.ref + * when transitioning in and out of zero */ spinlock_t lock; /** - * @guc_ids: used to allocate new guc_ids, single-lrc + * @submission_state.guc_ids: used to allocate new + * guc_ids, single-lrc */ struct ida guc_ids; /** - * @num_guc_ids: Number of guc_ids, selftest feature to be able - * to reduce this number while testing. + * @submission_state.num_guc_ids: Number of guc_ids, selftest + * feature to be able to reduce this number while testing. */ int num_guc_ids; /** - * @guc_ids_bitmap: used to allocate new guc_ids, multi-lrc + * @submission_state.guc_ids_bitmap: used to allocate + * new guc_ids, multi-lrc */ unsigned long *guc_ids_bitmap; /** - * @guc_id_list: list of intel_context with valid guc_ids but no - * refs + * @submission_state.guc_id_list: list of intel_context + * with valid guc_ids but no refs */ struct list_head guc_id_list; /** - * @guc_ids_in_use: Number single-lrc guc_ids in use + * @submission_state.guc_ids_in_use: Number single-lrc + * guc_ids in use */ unsigned int guc_ids_in_use; /** - * @destroyed_contexts: list of contexts waiting to be destroyed - * (deregistered with the GuC) + * @submission_state.destroyed_contexts: list of contexts + * waiting to be destroyed (deregistered with the GuC) */ struct list_head destroyed_contexts; /** - * @destroyed_worker: worker to deregister contexts, need as we - * need to take a GT PM reference and can't from destroy - * function as it might be in an atomic context (no sleeping) + * @submission_state.destroyed_worker: worker to deregister + * contexts, need as we need to take a GT PM reference and + * can't from destroy function as it might be in an atomic + * context (no sleeping) */ struct work_struct destroyed_worker; /** - * @reset_fail_worker: worker to trigger a GT reset after an - * engine reset fails + * @submission_state.reset_fail_worker: worker to trigger + * a GT reset after an engine reset fails */ struct work_struct reset_fail_worker; /** - * @reset_fail_mask: mask of engines that failed to reset + * @submission_state.reset_fail_mask: mask of engines that + * failed to reset */ intel_engine_mask_t reset_fail_mask; /** - * @sched_disable_delay_ms: schedule disable delay, in ms, for - * contexts + * @submission_state.sched_disable_delay_ms: schedule + * disable delay, in ms, for contexts */ unsigned int sched_disable_delay_ms; /** - * @sched_disable_gucid_threshold: threshold of min remaining available - * guc_ids before we start bypassing the schedule disable delay + * @submission_state.sched_disable_gucid_threshold: + * threshold of min remaining available guc_ids before + * we start bypassing the schedule disable delay */ unsigned int sched_disable_gucid_threshold; } submission_state; @@ -243,37 +249,40 @@ struct intel_guc { */ struct { /** - * @lock: Lock protecting the below fields and the engine stats. + * @timestamp.lock: Lock protecting the below fields and + * the engine stats. */ spinlock_t lock; /** - * @gt_stamp: 64 bit extended value of the GT timestamp. + * @timestamp.gt_stamp: 64-bit extended value of the GT + * timestamp. */ u64 gt_stamp; /** - * @ping_delay: Period for polling the GT timestamp for - * overflow. + * @timestamp.ping_delay: Period for polling the GT + * timestamp for overflow. */ unsigned long ping_delay; /** - * @work: Periodic work to adjust GT timestamp, engine and - * context usage for overflows. + * @timestamp.work: Periodic work to adjust GT timestamp, + * engine and context usage for overflows. */ struct delayed_work work; /** - * @shift: Right shift value for the gpm timestamp + * @timestamp.shift: Right shift value for the gpm timestamp */ u32 shift; /** - * @last_stat_jiffies: jiffies at last actual stats collection time - * We use this timestamp to ensure we don't oversample the - * stats because runtime power management events can trigger - * stats collection at much higher rates than required. + * @timestamp.last_stat_jiffies: jiffies at last actual + * stats collection time. We use this timestamp to ensure + * we don't oversample the stats because runtime power + * management events can trigger stats collection at much + * higher rates than required. */ unsigned long last_stat_jiffies; } timestamp; From patchwork Tue Dec 26 19:54:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Randy Dunlap X-Patchwork-Id: 183363 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:6f82:b0:100:9c79:88ff with SMTP id tb2csp1067525dyb; Tue, 26 Dec 2023 11:55:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IHSzjgIc6eYzODWQY9rpN5Oy90uyxwmfCI85YW38UOQntULXcWikBmLEt6tGqwV9lEE1Sza X-Received: by 2002:a05:6e02:16cb:b0:35f:e284:f313 with SMTP id 11-20020a056e0216cb00b0035fe284f313mr10103705ilx.22.1703620530182; Tue, 26 Dec 2023 11:55:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703620530; cv=none; d=google.com; s=arc-20160816; b=sV87pKpsMtU5SSoaymGrRg8AEgvK/PBHMJ5vclsDYPU2sEGZtuzES9YNwAJTJAPfeN ItKvZ0dyTatvuBOTp2nECG8mA2mlhy3nJiZK7aB/Fn9kcDnuhhdXtorIRAqTcKTFNkDe uUOGAwrbePJKEobGQPiTe0AP+VlGuQys69N9s710QOz8wHWw3yAYe0mTX6r/Sl/b9qMu q+//J5gNUTv2AlQiKisGuILprJZzgoh+62VP6Dr3+DCEL1fZj3jKymA0u3qoRPIVOI8k hY6TdIdjpIA0nCUGIPRxK+qrvCklklKNr0gd+iDKgVZ+Fz0dXTg30gY2e14pKYLPZVfP Nk3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=kbak+tkdOphm7pOnXQJacjOhwbUh9eBNBikt9IYgrdA=; fh=7C+om+4LAiL/I2vqDXHjdCv+GFuVkhSSXjorl92wcJo=; b=Qr+vifPnuoA0tQgw9FnmRyET0H19s5LJ2tjt4U6yywOGP67fAvca4cxWmi3mDIE6CW 0Tc9KgR9IVaZ4uH5pI4Qk8ZNQlUdBm2RdCkeQMUgl2JGHufQKxrID4PA1/CoHlmEHNXz g2LOBfxGOl9KXHkAjBfDcvCSyL1omOkxcF99W6lSFz5GSoLL4hT3+zrVwgPd2hnQR3Gx eVuOd1gNyiIFPuA+3S/XHi4LhIMTEb6N3+ZJ36Cs9rzGH2wJaX7NH4kv3zjc/vWLS15Z ttBlepMiQl/zfvA+ZLzZafovc0tN6ee006ZE4egU4Ug9jAjnxst0GTwusGNcOfgXGATx lehA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20210309 header.b=L7A01Hb4; spf=pass (google.com: domain of linux-kernel+bounces-11662-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-11662-ouuuleilei=gmail.com@vger.kernel.org" Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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bh=kbak+tkdOphm7pOnXQJacjOhwbUh9eBNBikt9IYgrdA=; b=L7A01Hb4nszrlt9e32q1vX+Lc8 /1U28L4lMov1uE+rN+fF9U2UIAif0C/8LHPE4e45CMcsGfNR6mjUuBw7Us/c32yCzsHFzdHBbvGf+ 5iCg/Q7aCoR6EkgG6xa0ZSbHYZps6DJLzOXUnqMbU87VFkhHURQUTWSjM+U7YjpCcFFiq2v7JYAm/ YUakzvoPYkLc9DSfWbm9K2VLqcb87cZ5S7cdaRq23w7OaM6aCjq/q3n+Yz1lfjexQ3URhU0qgq/+H EmJSCF17+XhHjBtf0j8yG+fTgf1o3J6srSaVrPeTMClOgDvweZpuYufimbtHKJPY8ca9E7kn1P5IW ywxC0jFw==; Received: from [50.53.46.231] (helo=bombadil.infradead.org) by bombadil.infradead.org with esmtpsa (Exim 4.96 #2 (Red Hat Linux)) id 1rIDVa-00DT1I-1H; Tue, 26 Dec 2023 19:54:34 +0000 From: Randy Dunlap To: linux-kernel@vger.kernel.org Cc: Randy Dunlap , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, Jonathan Corbet , dri-devel@lists.freedesktop.org Subject: [PATCH v2 4/4] drm/i915/perf: reconcile Excess struct member kernel-doc warnings Date: Tue, 26 Dec 2023 11:54:32 -0800 Message-ID: <20231226195432.10891-4-rdunlap@infradead.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231226195432.10891-1-rdunlap@infradead.org> References: <20231226195432.10891-1-rdunlap@infradead.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786375600548488296 X-GMAIL-MSGID: 1786375600548488296 Document nested struct members with full names as described in Documentation/doc-guide/kernel-doc.rst. i915_perf_types.h:341: warning: Excess struct member 'ptr_lock' description in 'i915_perf_stream' i915_perf_types.h:341: warning: Excess struct member 'head' description in 'i915_perf_stream' i915_perf_types.h:341: warning: Excess struct member 'tail' description in 'i915_perf_stream' 3 warnings as Errors Signed-off-by: Randy Dunlap Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Cc: intel-gfx@lists.freedesktop.org Cc: Jonathan Corbet Cc: dri-devel@lists.freedesktop.org Reviewed-by: Rodrigo Vivi Reviewed-by: Andi Shyti --- v2: add Reviewed-by: Rodrigo rebase and resend due to (i915) patchwork being down drivers/gpu/drm/i915/i915_perf_types.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff -- a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h --- a/drivers/gpu/drm/i915/i915_perf_types.h +++ b/drivers/gpu/drm/i915/i915_perf_types.h @@ -291,7 +291,8 @@ struct i915_perf_stream { int size_exponent; /** - * @ptr_lock: Locks reads and writes to all head/tail state + * @oa_buffer.ptr_lock: Locks reads and writes to all + * head/tail state * * Consider: the head and tail pointer state needs to be read * consistently from a hrtimer callback (atomic context) and @@ -313,7 +314,8 @@ struct i915_perf_stream { spinlock_t ptr_lock; /** - * @head: Although we can always read back the head pointer register, + * @oa_buffer.head: Although we can always read back + * the head pointer register, * we prefer to avoid trusting the HW state, just to avoid any * risk that some hardware condition could * somehow bump the * head pointer unpredictably and cause us to forward the wrong @@ -322,7 +324,8 @@ struct i915_perf_stream { u32 head; /** - * @tail: The last verified tail that can be read by userspace. + * @oa_buffer.tail: The last verified tail that can be + * read by userspace. */ u32 tail; } oa_buffer;