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Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:54 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 01/16] dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic names Date: Wed, 20 Dec 2023 18:08:38 +0800 Message-ID: <20231220100853.20616-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.069300-8.000000 X-TMASE-MatchedRID: xwCqL1bJw75eJRw5hj8/hCZm6wdY+F8KvtVce6w5+K8QHQ+7AkbTsXGp r8/fPJWivQEW+BqnrVrnftxNodBrx8RBLZ5x+SkXH5YQyOg71ZYW40XiUkbrG9zOQo7mTgA+gT4 HLsARG1siA7lT3EYqXMCl/H6TvsoyfyoI97TEvxDdQFsmvD2aF30tCKdnhB589yM15V5aWpj6C0 ePs7A07fhmFHnZFzVq1OS3M18QrJopR/2mSzr5VUVwkBGNaI1zumB3z3Qn489PLuriof24z8mh2 Ib2qzHYNwVlEe2OlsJhNCbU2IFr3KM+tI+Th6+NSZrfNhP3sgUBh9AgBSEFrJm+YJspVvj2xkvr HlT8euJ0YHKn7N1oOA== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.069300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 7079FCC34D3987DC402CD37B3F603F7FC627810880967878C43FCEF9CFEEA3DD2000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795490863791857 X-GMAIL-MSGID: 1785795490863791857 The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTek MDP3 components") Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 29 +++++++++++-------- .../bindings/media/mediatek,mdp3-wrot.yaml | 23 +++++++++------ 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 59dcea797b71..e1ffe7eb2cdf 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -69,6 +69,9 @@ properties: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + '#dma-cells': + const: 1 + required: - compatible - reg @@ -78,6 +81,7 @@ required: - clocks - iommus - mboxes + - '#dma-cells' additionalProperties: false @@ -88,16 +92,17 @@ examples: #include #include - mdp3_rdma0: mdp3-rdma0@14001000 { - compatible = "mediatek,mt8183-mdp3-rdma"; - reg = <0x14001000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MDP_RSZ1>; - iommus = <&iommu>; - mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, - <&gce 21 CMDQ_THR_PRIO_LOWEST>; + dma-controller@14001000 { + compatible = "mediatek,mt8183-mdp3-rdma"; + reg = <0x14001000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, + <&gce 21 CMDQ_THR_PRIO_LOWEST>; + #dma-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 0baa77198fa2..64ea98aa0592 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -50,6 +50,9 @@ properties: iommus: maxItems: 1 + '#dma-cells': + const: 1 + required: - compatible - reg @@ -58,6 +61,7 @@ required: - power-domains - clocks - iommus + - '#dma-cells' additionalProperties: false @@ -68,13 +72,14 @@ examples: #include #include - mdp3_wrot0: mdp3-wrot0@14005000 { - compatible = "mediatek,mt8183-mdp3-wrot"; - reg = <0x14005000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_WROT0>; - iommus = <&iommu>; + dma-controller@14005000 { + compatible = "mediatek,mt8183-mdp3-wrot"; + reg = <0x14005000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu>; + #dma-cells = <1>; }; From patchwork Wed Dec 20 10:08:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181581 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2537119dyi; Wed, 20 Dec 2023 02:16:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IEmOl4H7axMg/7zkURCwJEmZZKpA2SgVIbJaNBnlR0CZIQ7PgqccIBdsDqH0ZZxVkd6o4DN X-Received: by 2002:a05:6358:419f:b0:172:ac48:eb04 with SMTP id w31-20020a056358419f00b00172ac48eb04mr7306792rwc.64.1703067364024; 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Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:55 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 02/16] dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display Date: Wed, 20 Dec 2023 18:08:39 +0800 Message-ID: <20231220100853.20616-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--10.633600-8.000000 X-TMASE-MatchedRID: /qtm/HvCCyP6W4x/FkbM/rg7LINv5Afgh8Ytn75ClDN03GAz54To+1jt prj9/vncN+HT16szfKKIJs0Up7vkWEHeh2kdZPDc7spMO3HwKCAW40XiUkbrG/EJBoK3pfxuECM 3iFpuDiiHPPuXAmrjKSvG+CY9d4AKupptyy2mu+7iHyvyXeXh5m3eqxoVjgMEqiVpIcIW6utWPf j/g9xP8xaxmhrgB4zxR7wbWUwlw6pOFGkXM6YcX8nUT+eskUQPgRykyfrH1xlaW2Ktn+I8/vz8v ajouc6XpDfNjU0xuVbMDVOmx+2sBkBduJGafVsPCz1WR8KHe4AT28gbcGU2vaMwbOPeRq+ao8WM kQWv6iVfx6Zf83Do5eTCMddcL/gjymsk/wUE4hoV2mQ/HE5Pbkp3yNYGG3owwXF5Ugr5BMd2zec STLTuipluOY2svJYY X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--10.633600-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: A62A3C849CBA1F6BFEF2121248B0758E7E2273D00DCB3560D322FBABFFB364992000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795564450631822 X-GMAIL-MSGID: 1785795564450631822 To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by: Moudy Ho --- .../display/mediatek/mediatek,mdp-rdma.yaml | 92 ------------------- .../bindings/media/mediatek,mdp3-rdma.yaml | 43 ++++++++- 2 files changed, 40 insertions(+), 95 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml deleted file mode 100644 index 7570a0684967..000000000000 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml +++ /dev/null @@ -1,92 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MediaTek MDP RDMA - -maintainers: - - Chun-Kuang Hu - - Philipp Zabel - -description: - The MediaTek MDP RDMA stands for Read Direct Memory Access. - It provides real time data to the back-end panel driver, such as DSI, - DPI and DP_INTF. - It contains one line buffer to store the sufficient pixel data. - RDMA device node must be siblings to the central MMSYS_CONFIG node. - For a description of the MMSYS_CONFIG binding, see - Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. - -properties: - compatible: - oneOf: - - const: mediatek,mt8195-vdo1-rdma - - items: - - const: mediatek,mt8188-vdo1-rdma - - const: mediatek,mt8195-vdo1-rdma - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - clocks: - items: - - description: RDMA Clock - - iommus: - maxItems: 1 - - mediatek,gce-client-reg: - description: - The register of display function block to be set by gce. There are 4 arguments, - such as gce node, subsys id, offset and register size. The subsys id that is - mapping to the register of display function blocks is defined in the gce header - include/dt-bindings/gce/-gce.h of each chips. - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - items: - - description: phandle of GCE - - description: GCE subsys id - - description: register offset - - description: register size - maxItems: 1 - -required: - - compatible - - reg - - power-domains - - clocks - - iommus - - mediatek,gce-client-reg - -additionalProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - soc { - #address-cells = <2>; - #size-cells = <2>; - - rdma@1c104000 { - compatible = "mediatek,mt8195-vdo1-rdma"; - reg = <0 0x1c104000 0 0x1000>; - interrupts = ; - clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; - power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; - iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; - mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index e1ffe7eb2cdf..e9955639ce19 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -20,8 +20,12 @@ description: | properties: compatible: - items: + oneOf: - const: mediatek,mt8183-mdp3-rdma + - const: mediatek,mt8195-vdo1-rdma + - items: + - const: mediatek,mt8188-vdo1-rdma + - const: mediatek,mt8195-vdo1-rdma reg: maxItems: 1 @@ -60,6 +64,7 @@ properties: items: - description: RDMA clock - description: RSZ clock + minItems: 1 iommus: maxItems: 1 @@ -68,6 +73,10 @@ properties: items: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + minItems: 1 + + interrupts: + maxItems: 1 '#dma-cells': const: 1 @@ -76,13 +85,41 @@ required: - compatible - reg - mediatek,gce-client-reg - - mediatek,gce-events - power-domains - clocks - iommus - - mboxes - '#dma-cells' +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mdp3-rdma + + then: + properties: + clocks: + minItems: 2 + + mboxes: + minItems: 2 + + required: + - mboxes + - mediatek,gce-events + + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-vdo1-rdma + + then: + properties: + clocks: + maxItems: 1 + additionalProperties: false examples: From patchwork Wed Dec 20 10:08:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181583 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2537195dyi; Wed, 20 Dec 2023 02:16:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IHgnjx4KqehjJm0nWn3oAmKSqrejMdkeOIB4wt3LWHTG5RJLs8oOBn6BU6l1SI40myt19Vy X-Received: by 2002:ad4:5b82:0:b0:67a:9d26:52d4 with SMTP id 2-20020ad45b82000000b0067a9d2652d4mr25582453qvp.38.1703067374262; Wed, 20 Dec 2023 02:16:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067374; cv=none; d=google.com; s=arc-20160816; b=WyyE+hbzztTasLXgayNrfp1szIDAp6eepDb3o2/NR/CK5ka31LRT4vt4ic00GWr76Q I+UCO1yUzCnDzZXf+XJ5IybLgPqJzQS6pa6cBfrb3D0TapnIN+GjJc6cFhpy7ZBoDQ8Q /A/oIUIApkc3i4MZbgWPHKLF1O9EN/3Qu7zUDGreZY8awtOdgfzkafSd59Q/E7MKhQWK nMImWG4GVFbzMBmpXDOCiCwhBYajg6a9v7RqioaCu1qVHQKZUI7RtOqyYM0CaByotcU/ 7nU/6jJrGbTmORWlA+J2lTeITQCMdMnnE6L8lX/AAdM6orjt44NkkfGa3KuiTZEQwgo5 lVIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mhfk3FqNlNnTIC11+3AiswpDac8u08Q0N1jKnCvU8fs=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=IqcKL1MfzPz4Z3PmwTppFpOHODSdQIKODACxNmMqcu0brPMmy4UMHnM/SR4XC5LNfF yBy2EtNnpz+gTgeuktHY2cdWeZLDJyWJu1Dq+uWEbZDvrSAcWH0A5M5yHZuywaIWvi60 EHeHnEAb1DbgveZ4PRjS4YzMA4UBnWWr2bsbqBvCzDLvcigs3i/auo4mzfzJXjyc6GvN sQRIz46w3fQwBr9bsz4GzJuWu8M1rDRCHKBBaGjNP7PCUhFz9KdGRf2HSMJC1E/HAg06 Ds2ut7zlGfwjq8lVzQgTmYVxomn3ooQQnMW8GzseKIG//+H7Y9qUeo2Aunf3keYwGlq6 Q0Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=haMzCh1D; spf=pass (google.com: domain of linux-kernel+bounces-6712-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6712-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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In comparison to MT8183, it no longer shares SRAM with RSZ, and there are now preconfigured 5 mbox. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring --- .../bindings/media/mediatek,mdp3-rdma.yaml | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index e9955639ce19..f9ca66413d51 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -22,6 +22,7 @@ properties: compatible: oneOf: - const: mediatek,mt8183-mdp3-rdma + - const: mediatek,mt8195-mdp3-rdma - const: mediatek,mt8195-vdo1-rdma - items: - const: mediatek,mt8188-vdo1-rdma @@ -73,6 +74,9 @@ properties: items: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + - description: used for 3rd data pipe from RDMA + - description: used for 4th data pipe from RDMA + - description: used for the data pipe from SPLIT minItems: 1 interrupts: @@ -109,6 +113,23 @@ allOf: - mboxes - mediatek,gce-events + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-rdma + + then: + properties: + clocks: + maxItems: 1 + + mboxes: + minItems: 5 + + required: + - mediatek,gce-events + - if: properties: compatible: From patchwork Wed Dec 20 10:08:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181580 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536560dyi; Wed, 20 Dec 2023 02:14:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IGibAJ/C8lu8objIuxU203XXGFFv15t8MCeZv+Jn4QOCAf92e9E0+DPx0Rp1yUwE75lgIN7 X-Received: by 2002:ad4:5dcc:0:b0:67a:a72d:fba6 with SMTP id m12-20020ad45dcc000000b0067aa72dfba6mr3213086qvh.36.1703067298933; Wed, 20 Dec 2023 02:14:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067298; cv=none; d=google.com; s=arc-20160816; b=IqnQY6xwy5PcPrehO+zIkXi0xzor0Zskyxqtpilfxz9mKJTOzuJ3sDqg6uRGCN9gTL WYkzPeQvFsxJfRjknlUVSPZn8htNBKdRZoKYytItqgYcLD+a1gOrbins9EZ2I4MyokkR +Hag2DmPiK9UmRRNqy8WHPP5QMH/JgqJHysXLIh8XmksuN07ksiZYJsQsDUHyNn+JuO5 bo2PJigvzH0FEmqDYNbbl0Q1JwhzCjC2v2xfVSbcO8ntOu5dfpTKYbytD8/XcFj3zuoW psrhr6xlGdSC7VthCInaentdxsvehUpAlkFxqzqTsoMYR95u3EFrbi3vIti3cYclA+kA HMWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GuaatKpJJKQ8P3UzwE+5PZkOWfDZVusyH/8yORVTn1k=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=Ve8tXyAn2HmlE8H9V3RulOJcgyCcpjva/ndxMWdYh8lDwLICHZwnGCPFkQcRoAU/c6 SLe1HbUyMTekz8YeORx8fQGIB497WEj+bcNJ+yku/WvJ0Vd/7Lp/3xIATVC5rqxWMevL w9IhOMDt5WdIFb+FyVHUOOKoR9zd71K8t0qyf52FTvbQW/Q4uYtuWoeNUOJDNcX/yJvE TnpLUEglBC6tX2xJAkkov7P/tCo8yNkZL9ai88WuE9TNUvi3WYPCkxL+Kr0TyDU6qD0W 3vIqS24YXnPfHyxLBdeFlt3obEDdXbZ1529jZYFZ+sW5Z6iygif5NyLskhesgRRMg27N I2EA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=X+dhMEfp; spf=pass (google.com: domain of linux-kernel+bounces-6706-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6706-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml index 78f9de6192ef..f5676bec4326 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-rsz + - items: + - enum: + - mediatek,mt8195-mdp3-rsz + - const: mediatek,mt8183-mdp3-rsz reg: maxItems: 1 From patchwork Wed Dec 20 10:08:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181572 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2535636dyi; Wed, 20 Dec 2023 02:12:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IGi1x4TXWEPzPH1pbXWzAXlYuVBW82mbkn52FasQZAUbM1cxcvAAxjTiKk0bPYWD8uJSlbh X-Received: by 2002:a50:cdd3:0:b0:553:2c2f:d979 with SMTP id h19-20020a50cdd3000000b005532c2fd979mr1613951edj.15.1703067169317; Wed, 20 Dec 2023 02:12:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067169; cv=none; d=google.com; s=arc-20160816; b=Z+j5ZRRJNfsLAMT/E+eqdwIdoMs76rVmkCqYS+oTaIRyKpxx1G8SKsBEukrZBqmSue xHLdmXk0ywbVRVgtT00HN1JoChknFWi5Tvpv1gD6IWPqanVx8OB8p3tq7/XcVP07iZ43 RFHQdQ3FtzORad1Q+FJRblcqyP3bNykoWaZ93e2YZDSYGdyhXTyxoeIXFo10kUbn+qDj 839H4iqed841fCSnDfUJPZXMogbiJeij1x5ULoHrBFvxCDVfKJCEs0Ak44mmxlgBIDEQ /MF+Mj/2SoZBR8LZTeDA9Ed8PEG++bZvakMu5gearYffhT+qWNPJJ2ZPdKkDy/L6qY0v m8vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Vb24kkSmzFqLkYt275IGRO8kfWGasUiCdUh0M9mkibA=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=IIeTx1JrM1PuIha1Cf1c2v2thGe6M1WIdey76LwyBIfZcTkHN/LC7UByGvFeDu+AZ6 rbGPKEZMGfci+PB0m3RPkCVzJ68j7ShcvclH/NAL9YBPgiVkfaf8EMd8vjC9Ejd1eRt8 lneWtt5xvT0p5OMeTgbkw0eg6s8//dG3dMRTUUYjFUMJ8hayzPEEGIUexJH9NOVZ7w5Z fuFvdmIvuGhNSoRQGSOP77lv0OCENJDHaklZbxY0OcKHsZDUNxFk30RIzUfupyaLEZM1 q8QT7SYrCZWwSpDW5GIoXRZrCoTFGyLHL8RdTSYJpoB0vKXS8IpnemdHd4NkixqK6xr7 GOkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=HN9tVu73; spf=pass (google.com: domain of linux-kernel+bounces-6700-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6700-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/media/mediatek,mdp3-wrot.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 64ea98aa0592..53a679338402 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-wrot + - items: + - enum: + - mediatek,mt8195-mdp3-wrot + - const: mediatek,mt8183-mdp3-wrot reg: maxItems: 1 From patchwork Wed Dec 20 10:08:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181578 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536382dyi; Wed, 20 Dec 2023 02:14:36 -0800 (PST) X-Google-Smtp-Source: AGHT+IHzLV9jvBzsiIIYnGYrEHSmj9lkYWGG6nZ0BBXgWxqA5vkucqxYuecZIZpLUeI5NXTSY2P8 X-Received: by 2002:a17:906:2298:b0:a26:85c3:f568 with SMTP id p24-20020a170906229800b00a2685c3f568mr999262eja.129.1703067276062; Wed, 20 Dec 2023 02:14:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067276; cv=none; d=google.com; s=arc-20160816; b=O5kKldnnSKrS7YeWf9DOR3/0iWVtMszFFQ4waaZwWttCzKBnOu83O/IO9Q/nGgZDtv 65muujDg1cPVhYTGYBWXt/W168JA4WEO+dtPGl94vzX/Rtdpu2z7pcGpn+OdT3btnh7d CWUrjI/RSlGvt1FBPyZ6jtxIfcQQcNR0s8tINyKotrHN2O7qB+oMoGp9H+kI3a81N/z7 5/f356hbHGjw6FJ/ka5oYRCWTsljH/ggJWxuJ4TS/EsgzHOTJW60D4h8w/wASYXmkAIJ 90lFT7SoX2CzKwFY4cxI/T9fSPK117Sx0ZBViv7iY+b6EV2UFEXFQ0bAHWwbtjaL8bX5 9vtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZbKsTEXQ06nZKi8eEHm/YLTPz1FZJoAUmXN9IUI475U=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=rG6mQdUpckkbETaPapXH1TbmwX6ivXQ5zMtGimYq2G5eGOLNevC5BkkS6ApGjzcIZ+ IB3vY7zPtRfXVExEaBAvAI3NN6bnPIH32iPHCUGDUv2qQfCiW8yqSJC9renTHH6WH7hc tLLyMUHEsFBhowsWjYpIFwoOYkCRh/OPiQJnlyCEpu4LMds1Hcc2uYUIxrYOrH4weYlt kWztM6+lskUCdBi+h40uHbZxnKDwPK1MrPnshOouhcVeVb8gN6SW9euVuLJ7OWGFN9vM BhA2f1JTOzTF+uMuB34ID7ouXo/buKB6i4d0NveuL6CuppGhA8+ZauYOJ/81uOnKyEaW WdpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="TumoAhe/"; spf=pass (google.com: domain of linux-kernel+bounces-6705-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6705-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id g12-20020a170906198c00b00a233627daa3si3386747ejd.726.2023.12.20.02.14.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 02:14:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-6705-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="TumoAhe/"; spf=pass (google.com: domain of linux-kernel+bounces-6705-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6705-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id A64191F29C54 for ; Wed, 20 Dec 2023 10:14:35 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6B9E63B2B4; Wed, 20 Dec 2023 10:09:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="TumoAhe/" X-Original-To: linux-kernel@vger.kernel.org Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49032208C8; Wed, 20 Dec 2023 10:09:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com X-UUID: c9056fe09f1f11eeba30773df0976c77-20231220 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ZbKsTEXQ06nZKi8eEHm/YLTPz1FZJoAUmXN9IUI475U=; b=TumoAhe/2tbsmE5lsLyC16m9fk5HoaFOmdRajhpiFXjmFaxF438JbYYElfUbJ5Tw2MfFl/poaXfOhtKRCDEzvgDjCJcfD5GzHZZ06+ALTXrKw4Z9j3tPFI0Q9VSCDUPld68nNBerEapSvfxwWBjAqSr9GXDo79mXmRJNbRKTRuU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35,REQID:442cc47a-c99c-4970-bc15-77e14671194b,IP:0,U RL:25,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:20 X-CID-META: VersionHash:5d391d7,CLOUDID:48c64b2e-1ab8-4133-9780-81938111c800,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: c9056fe09f1f11eeba30773df0976c77-20231220 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 398409639; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:55 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v10 06/16] dt-bindings: media: mediatek: mdp3: add component FG for MT8195 Date: Wed, 20 Dec 2023 18:08:43 +0800 Message-ID: <20231220100853.20616-7-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795472017449945 X-GMAIL-MSGID: 1785795472017449945 Add the fundamental hardware configuration of component FG, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-fg.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml new file mode 100644 index 000000000000..03f31b009085 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Film Grain + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add + the film grain according to the AOMedia Video 1 (AV1) standard. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-fg + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14002000 { + compatible = "mediatek,mt8195-mdp3-fg"; + reg = <0x14002000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_FG>; + }; From patchwork Wed Dec 20 10:08:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181575 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536043dyi; Wed, 20 Dec 2023 02:13:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMgmpFgvLzQBEYJiKzxs1/TimKy6lfX3tpAlohUOqBtg6HzoIH8f3j4hGv/eMOtHGkOv/h X-Received: by 2002:a05:6808:3c4d:b0:3ba:951:dd57 with SMTP id gl13-20020a0568083c4d00b003ba0951dd57mr23614820oib.107.1703067224755; Wed, 20 Dec 2023 02:13:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067224; cv=none; d=google.com; s=arc-20160816; b=n40s0wy6ziU9pEBeEeXrNAQ6rqiyf1QlsiUeq4bmby7xiFHQCwOhJfitJsfa3VD5Q9 zvfA8TyscFvpuGX8M0geW3EjPHQgWOHQ8ICJp8bNBxYxUhdYHQc6LKfZBGXmZxNpISIJ DOjT9jSmWYLYaYV84U1SfiraoR+5qi7rKG+co1GhiwATzqU2ib1yU7xAsy39OQThlHLz GIHhZ6/w3I4jg8IwgKcPXFyTMWamgY2g9dzabkqFDgaHzhOQDQGGOHsm+StYCkydwYjr AabnKoUl7nJt3b3KUz1h7Qg/gBoC5Q8qkbNnogTl6UBlDo2PwS1tjAATWvuKHYxKD7hI p7lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8l5B9d28IzVrTNFOgQusSXRsLqIIUpnduD1x+ROUPPw=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=oo1SeGhpsInhvkS6FdWwL1LVvyl5RDRSMm4lmAW1bs0nMBHBiue55Gz9MqB0tJ0IcX 4x7wM9DFVSG3XVsNCFmRFjNPMwFAuvrUIYwoCbQVY70em6z8J+wwhHDRuQEpxU2EbXGD kzcgPfZWIqovmbuckD8Jm8zxcugeE32xFlXKhukpcYudZ6eo0IuyxTM7gfaZnoXnRZS0 zHt0kzamCULwnpJ31JbG7kxtyGAOlCy/MZYSV6eR5+EN/jctDne0E27tI69vepuEE8xh 6KuTcebzby52vBb6jVQ5NXRLO5gN0y9RjyaOx4qVx/CtnQVFRgf9HcbEGD/GDskJs8IZ bOxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=lo7dK8+J; spf=pass (google.com: domain of linux-kernel+bounces-6698-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6698-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-hdr.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml new file mode 100644 index 000000000000..d4609bba6578 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 HDR + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + A Media Data Path 3 (MDP3) component used to perform conversion from + High Dynamic Range (HDR) to Standard Dynamic Range (SDR). + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-hdr + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14004000 { + compatible = "mediatek,mt8195-mdp3-hdr"; + reg = <0x14004000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_HDR>; + }; From patchwork Wed Dec 20 10:08:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181571 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2535023dyi; Wed, 20 Dec 2023 02:11:32 -0800 (PST) X-Google-Smtp-Source: AGHT+IGnJnCEB9b2cQwXlIA6jZ/YtsdMrDsFzue3bG/WSFkes3hq89gml2fmNJ7quOH2EZ4MLFpQ X-Received: by 2002:ae9:c104:0:b0:781:719:42bc with SMTP id z4-20020ae9c104000000b00781071942bcmr1976969qki.154.1703067092013; Wed, 20 Dec 2023 02:11:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067092; cv=none; d=google.com; s=arc-20160816; b=sPsRlo5nGrXRDSe2gt5kKr86dPPUFzExlPiw2sNb8K+hzF5YbfziGUPlQ2UDqaGgGD zEkKaL8rxmrqBmbR9fw9gIL7F7RqPME748RPLU6t305XIkkPZcenwsDbSz1aFZbEkvOU uJFkE513gqhbmIxzukSmw2byOvQ3T4BVQ7VG2mH+DJ0rDu48jC/Vg1sJOxw+0Iwrb7HW cyDZpDurmfNSpbYGQE3yV6MK7TOXLgI7YWqwJpnjYLEanj7tKO6TMwAGrS9F6Umr0oEY RMXwyBozrX+sbN9H0uIlWV73+ZPEhrluojGxQ9EE7Tn1owapzXlQo0xXtcHKLQp7sXCf ONkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ryL3xIPJfg8A+byFMnd2zFxavybUfKzdvdWAdO/yaJo=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=RHhNJhX5IoOVIkTUWJficpFwJUbLs4p/7oA4RIBK6y0pPRQ06h0bKupeT8LdLILKs7 gWGjWFTyzpc0wYOb3qjf1LSuWQLfKorxXGV9iLUICl9l5VO/VFEotvjJ+7M9o0b3Zgjb j3jmWRDc6miFaPCekVbMxTEo7pHsV877IVyAmN37gpg2b3zO+fLrUD99BbA/Ho0iSPlT MpcrRhzI968ez1Ct46h7IAQZu1UYR7F8LAFRGveJqOkcB9BK878miI0oHTL7JApv1qSa uP8r/FIk1F8KfasR0bu/p+o99HOUt9UbTKBDh7Jxt4cSX/inX2fQRfzI64gy9Nw19rVe Js6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=nJquP7Tv; spf=pass (google.com: domain of linux-kernel+bounces-6697-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6697-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-stitch.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml new file mode 100644 index 000000000000..d815bea29154 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 STITCH + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to combine multiple video frame + with overlapping fields of view to produce a segmented panorame. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-stitch + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14003000 { + compatible = "mediatek,mt8195-mdp3-stitch"; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_STITCH>; + }; From patchwork Wed Dec 20 10:08:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181584 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2537308dyi; Wed, 20 Dec 2023 02:16:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IH9dUvjsc2+pMdPrnxs7f5cFq+ahC6QdshcPnO8ia26JgwTfdV8/uOsT0bF99zuXzDRWKJ+ X-Received: by 2002:a05:620a:47:b0:781:b2:37ee with SMTP id t7-20020a05620a004700b0078100b237eemr2319694qkt.137.1703067388924; Wed, 20 Dec 2023 02:16:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067388; cv=none; d=google.com; s=arc-20160816; b=jhVbngEWDVnw3p/udivt2LRxT02SlzO0zoR0fCbZG4dOUyi0AW5ktsEf6Rp/KIiqu3 N8Fv2NjuU66J9f0J+hAgc0iNMq4tuw+ugo+khTnntrBIjJsfGYWhsKkg9g8D283VoXHw 3jhnup0yvdPCeDbxpIlUbFWld4QVtM2tNUfZgYvn9HZ367e83jpvf1cLYXY31nD8RZIg L91hfpeDJWFUcT2+/qlXBCXjy+Z67NmyLdzVCPg9O5NTfi2wGQsyl3JfWMAqeWjSYPEd RTtoQ4jpLaYgvGWP4p8mrU2q/C82R/E7QClw4iwtFk0OgRWsNRraoAPigNJa84Bg7W4p c83g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5QjcwvzrebWfLqJww9KhwNbe3Z1/pLAvIef2nvvVTbQ=; fh=e0RlLHzlztEJgFr1G5iUAfmLhro7zrN0SmKLmnTwLIM=; b=uvkVykmjzOpeHJoEI8/HBh6kJ8UpbTao1g4WJDisiwvT0X9wh+OjgkZNJ5Jmjz96gH aR44rkE4I9Z/gYdMHnsKa8jhk82vpw8neNgXFDJAYo6j6SRO8YbVdUdxUsCc9PFXpjMP CXs48lMrIvrfPyJ3NBXPftXDEGgfDp6JT71/jR5gfDt1lKroDwVB12r7dZCpRXhFuuDx HsHgPiDFpkEtyLtEhTrxTpucQdjVPFjy5ZIoy4R7M6/CRhy1BMDmh9E4KCndZnB87smn dLj5MsT4BBXwQMUILm8RoaIUt+DGK0RIWuTdT+CuvKLSdubEXWt7Lw3aMwCBE1T8dJdm 9NdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=qkSlkt3M; spf=pass (google.com: domain of linux-kernel+bounces-6713-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6713-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 20 Dec 2023 18:08:58 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:56 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 09/16] dt-bindings: media: mediatek: mdp3: add component TCC for MT8195 Date: Wed, 20 Dec 2023 18:08:46 +0800 Message-ID: <20231220100853.20616-10-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--7.626500-8.000000 X-TMASE-MatchedRID: mSPDr4jZDFHoRPKKjGHPUxcqpH7D1rtQ6SXuwUgGH0j3dSKTMI31W4pb wG9fIuITLSHDQi/tZU+OEmLXxEuoAga1NXbjqus0tw+xHnsmQjNr9+Kgn2XgeNzOQo7mTgA+apc xcfGIwwyygic1mDySMHMPxAree1voSBiSH4+du3/J1E/nrJFED4EcpMn6x9cZWltirZ/iPP78/L 2o6LnOl6Q3zY1NMblWzA1TpsftrAZAXbiRmn1bD54CIKY/Hg3Am4n49vyf9XEvM/mydp5vVCq2r l3dzGQ1ropAi/FV10zL1e8sURC8p7/zMsx+tBCWzRJ7qMxdWrq5TR54AAUwADflzkGcoK72 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--7.626500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 7C91E7E3977F679A768A5E78CC02B31B3EC1C9BBB412000CA196C164DECA461A2000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795590169307903 X-GMAIL-MSGID: 1785795590169307903 Add the fundamental hardware configuration of component TCC, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,mdp3-tcc.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml new file mode 100644 index 000000000000..14ea556d4f82 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Tone Curve Conversion + +maintainers: + - Matthias Brugger + +description: + Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components. + It is used to handle the tone mapping of various gamma curves in order to + achieve HDR10 effects. This helps adapt the content to the color and + brightness range that standard display devices typically support. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tcc + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@1400b000 { + compatible = "mediatek,mt8195-mdp3-tcc"; + reg = <0x1400b000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TCC>; + }; From patchwork Wed Dec 20 10:08:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181589 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2538074dyi; Wed, 20 Dec 2023 02:18:08 -0800 (PST) X-Google-Smtp-Source: AGHT+IFm2Y59/Ti76vNPrAilLQLSFnH1rTXGsJKsg5OmSJlBxfOOTr8RaOVetg6WdANw9H9dnAWY X-Received: by 2002:a17:906:89a:b0:a23:62bb:2e77 with SMTP id n26-20020a170906089a00b00a2362bb2e77mr1156181eje.61.1703067487925; Wed, 20 Dec 2023 02:18:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067487; cv=none; d=google.com; s=arc-20160816; b=sE6qa2JTC3FlbuwEpeT/1YzIgoGtaCQxFaonU8XK5ioDGFmKqiROhQUsc1XV2imqzw mpQZvb2a0/wkCJ5WNAbnFsTn5t13ECy91DzfEPjVvxWSg+jcu6XTN7bfgbf/M5Rflvdb dCdxuXamopvAs65Q52Jr14TxqLQNsrbGisMv4dvpxKShon3SBGR703rC6Ou7tg18DX/V B/t87AuaB3T/bFiW5bPPF2KyGjbbzXho27NgRm9rAb8m0AW+EoPEh26St9XJSvYZZw3o 2xkFohjoAVLRvje7CkXhyzcrZKrfF254sTDhuRpu3OdlmxKBqL/X/iETc8ldMD/BhJ0D Q2Lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ma17REYBRtjPcEsPfc2uYW9/mewROjVPdPZMaWhYQoA=; fh=e0RlLHzlztEJgFr1G5iUAfmLhro7zrN0SmKLmnTwLIM=; b=p1mAqVwWTmADI4aIgWZftTxtEyIsyn2UmIcP2OLfFvCmtMqhXyaz4f0RgcWAy/y47u Y1CcQ0fl3W5kEX/STr6EvwmkHXgYJSNA1UYUW89wfJk42ydMCfyWtogaNqq0kHD7OptK IhpvCZXK1T47ZJlSh4/+0aBwrtaJOEoaXzkHVdwE09EgP3y2aB3SqffAzc5VM+S4u5uv dQ24IGQBhMBtasXyBvbWxHnZoNkW7fMH8W4+m58Nn6cz+PZ5862KLnu9WszOchb1gLZr wGsMNJGcoFeYULg8WSWhfjGiGKjT7VjaQ4c9/WwHZalrtnpsRPooXqwUOQb7tZkoH+RQ liGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Pxlq2Zl8; spf=pass (google.com: domain of linux-kernel+bounces-6710-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6710-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Wed, 20 Dec 2023 18:08:58 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:56 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 10/16] dt-bindings: media: mediatek: mdp3: add component TDSHP for MT8195 Date: Wed, 20 Dec 2023 18:08:47 +0800 Message-ID: <20231220100853.20616-11-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--6.393800-8.000000 X-TMASE-MatchedRID: WbOLpgv9C7boRPKKjGHPUxcqpH7D1rtQ6SXuwUgGH0j3dSKTMI31W4pb wG9fIuITLSHDQi/tZU+OEmLXxEuoAga1NXbjqus0tw+xHnsmQjNr9+Kgn2XgeNzOQo7mTgA+Suc qLHu3mZN3IL9RTZjcZXNjxEfTH8yUnuh7s4XRTZbBVprK8rvWX3+vzHfC29pfzsQ8iRVyD45ZoZ UwtnkREuLzNWBegCW2U9w4XVXDWCYLbigRnpKlKTpcQTtiHDgWYMtEQ3cbds7Ei+qbBd9QrMmH1 /XL/GC7MpyARfAv4kgvNzC4CXWKgUMMprcbiest X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.393800-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: B55B01B7F8A6687577BF07219B6DD270A6B3F6B7A00ED7E37F6FCB0E0375745D2000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795694079575100 X-GMAIL-MSGID: 1785795694079575100 Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml new file mode 100644 index 000000000000..8ab7f2d8e148 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Two-Dimensional Sharpness + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component + used to perform image edge sharpening and enhance vividness and contrast. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tdshp + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14007000 { + compatible = "mediatek,mt8195-mdp3-tdshp"; + reg = <0x14007000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>; + }; From patchwork Wed Dec 20 10:08:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181577 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536322dyi; Wed, 20 Dec 2023 02:14:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IGEeccxIRA59djsYxrvvQdGQUaZXdFiK/tXCfaLs4eQEALsVUhrpXiBMNSOllVAqd9mjuzH X-Received: by 2002:ad4:5ceb:0:b0:67a:a721:9ead with SMTP id iv11-20020ad45ceb000000b0067aa7219eadmr21075730qvb.94.1703067265566; Wed, 20 Dec 2023 02:14:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067265; cv=none; d=google.com; s=arc-20160816; b=HWOpN6btA5Dar1UuNeu6/I1AqqcpG0+ahSI8V8sPnsmQTUwu9QSBsnRKkerVIvIfs6 p1+RFskTC6v56qEffzW/w2/T02MPnwN6kTqaSosoVNt1wvl0+Ah8sjt82zqbt/0yZSDg xGKaP2CwCzSgU64+cDS0vgvmR9UIQvv8PavFK9LcA4a7yYCTevKHn6zGBYYrVKWzgbq2 6aLsL/yMhmHUO8/cculLAr6Zm8PgBcjrBgPt0yxZDRh+SEZGhNPsW5P0wDllHIaa1nSO Ny1djwHusmb6GFWmgK3wwqYHJa1d5nDd9TFOPUTsZ/cgQpN3qpFQnr0eBwlsqQ++8R/p C0ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uBjiNYTO2WSmvyy9DZRC1WiD40IMo3yDRg/HtSKYR6I=; fh=e0RlLHzlztEJgFr1G5iUAfmLhro7zrN0SmKLmnTwLIM=; b=GrHo1RT0xL5fUJ0Brgo6VGlyHnZs+45izNsswECP4WBIs2xE74EnQwe4pVcWJQqFT7 9Fu/HLvMTRSWm5e49G2MWq0ZARhd+frDoxrEUiOvhVSsbU60Eys8Z2BemjiJ6bA7O1nw KP77jHM30CsVVHDrLmoPYS06DtcNoMM3xKC+AC6fdxIXXjKZVjrSkMAQ33VbNlq9SmFf FV6FgOXNAi1TsWRTyiPtWrlMnMRN+Lsovt7nDXOKFgbAHJhtik6BP6EhPcQF59hXgqES 4YWx5d4cwtGobhHLB6t6Y57PZuNarpNSQtkyo/V+XWEJGX5iUk1VxZ5xXMApt8Ybm7C4 Zjsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=AqDAZA1N; spf=pass (google.com: domain of linux-kernel+bounces-6704-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6704-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 20 Dec 2023 18:08:57 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:56 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 11/16] dt-bindings: display: mediatek: aal: add compatible for MT8195 Date: Wed, 20 Dec 2023 18:08:48 +0800 Message-ID: <20231220100853.20616-12-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.516100-8.000000 X-TMASE-MatchedRID: tiRXYRqWr+smeoNhEXvE7GNW0DAjL5p++OI6XsK3BWHfUZT83lbkEA0F DzFL1GEo4vM1YF6AJbbGJQ3BiiLAggtuKBGekqUpOlxBO2IcOBaO/ztVD2SNfpCcms+5v4uXzy8 6IVrD8hgOwdiW90VdamUJHNwT58zWNku6yeuF7hhnLOYoxSKnYyv7g0tvDN5nt7OOvAvgUMHBkG BTIlURuXoXDz8+lMxFpW+aIDJ4DaRzkxJ+SIkUjlAEm1wpw5h+lExlQIQeRG0= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.516100-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 5F02470A2F91E359BD13355918A4CF1201C577976DDAC37EE2D83F5BE0E200792000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795461508726352 X-GMAIL-MSGID: 1785795461508726352 Add a compatible string for the AAL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 7fd42c8fdc32..b4c28e96dd55 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-aal - mediatek,mt8183-disp-aal + - mediatek,mt8195-mdp3-aal - items: - enum: - mediatek,mt2712-disp-aal From patchwork Wed Dec 20 10:08:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181573 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536016dyi; Wed, 20 Dec 2023 02:13:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IEWwXfOJrwjgkSNQy6UzL6rhr1/XjYbzOBBY5DAVFp8PpTEfYlSrKjPxvLPnPRFpdpOr4eV X-Received: by 2002:a05:6a20:8f1e:b0:18b:1a31:ee6a with SMTP id b30-20020a056a208f1e00b0018b1a31ee6amr3189703pzk.23.1703067220993; Wed, 20 Dec 2023 02:13:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067220; cv=none; d=google.com; s=arc-20160816; b=fg5wJbrJ9KdrzV37TukXJC4cfvkocFs8MdHmiCQWu09VJw03GoJ3XWHIiMGP5eyccB 3wo1JeONwRv8++XL8RrMewwMeK/MlAOOP/GUtoNbNY5A7YeE2RrM+A3C88FzV72FwR0L DoUU15GwXwmjjPQ5tgwpeK7o0NXDWgG2fotmE58Gd3TvD/e9k8JumsHAdGRJR3Q5z3/w LJj2VbtpYwH2E0PZDXv1nkwf+6sxhJlG7T2qWsT/1rAvnXjFC+lRPBb0r9DkbwOvzLg8 yaxxpGJ4bnD+MqgK8Gv90hEFjyVMxtSI/L0sbdipnPCepvGFWBjNtIE+mvkYln0PVj4b pafA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=S+BFsscpOYXgIjZ4vvUEbFaZKileuAcJkmvyZC22tyQ=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=ZM8Vybpf/W7Ko+JlJBC3r5GAkt0kYR3QH9teOwh3aJZZ3ehZq2vrB3zAhJlzzwfhuQ pCj6O1df6skjl0j8O4U/qgoScLIKIzNGYm/s8odjbWk9skwl/ta1x5FcvLPaPQvO88mG aojsZm9plJ41gY8RgUNsu7kzDUuwdZvCqKif86xh3IsIeP0ipLFSOIxD0+yL9ARL65F5 NobSoXSTktlde81Ura4AYO1UeRWy1LnbBv8Xg6V7zxZjTaQmyOKpin8j0s6JZbeJABvr 5HNTXCyNClLP3AhdQGfBOzfYGTpls6hMCw4oee9gKd1tuH2D5j2GcTwUk+17xikXLkG7 Ncfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=jtAbogP1; spf=pass (google.com: domain of linux-kernel+bounces-6702-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6702-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,color.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index f21e44092043..b886ca0d89ea 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt2701-disp-color - mediatek,mt8167-disp-color - mediatek,mt8173-disp-color + - mediatek,mt8195-mdp3-color - items: - enum: - mediatek,mt7623-disp-color From patchwork Wed Dec 20 10:08:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181576 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536102dyi; Wed, 20 Dec 2023 02:13:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IFjZBQ942RVdezyni3pT45XR0YwwR9oRnQGq/b/HWuL6KTE10yDtAX6W3YXDHzwgQuglhMH X-Received: by 2002:a05:6808:3c9b:b0:3b6:dd3c:5f78 with SMTP id gs27-20020a0568083c9b00b003b6dd3c5f78mr25700214oib.44.1703067234906; Wed, 20 Dec 2023 02:13:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067234; cv=none; d=google.com; s=arc-20160816; b=hoZ6xFcwB6ffczqC57sbGH7tqrFYRKcHzrBVD/VnJJnsaEc7Rp/vgMe+8jY7FNOX1b y81p5QcigqkrxUs9TdrWVQ7f8tKhDJeKGMlRMVo+ol/tjAJ3cBD/QYbZrGZbkiQ67QjM eAGQn7BzlJkc16OKYQF+a5AUWBCCL2VbL+dBmgkZEM7/PC7B8zIkO8xwayX/51tMFLy7 hVZDv+IkffavA+n4hMe/RhZalmRf/YLs+zfxGokvZo/WxiTk5yYevi0PkkuZzdLcIXsw VrjvIeGfms/I/c8NWBY6qoEcnJiIajJ4z1NceLkpM0bTtsS31tCqb2IASf+vRNcXCUw0 0ciA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7GscIB2L0dT+RKBtElRpAI2KEhzZqSKJ7wBRtBaZfo0=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=l9UJbPrqRkDhW6Y/mumLIqHx0sUif9347+f572hiYEJMW/fANBB95EqjEcEkF25mCR xeiONykz9A2h2VvWEw3TIs3kdc7zW1e19Yo/eQI2vUgKDrDOaOvjqRrlEnea5ycs2rNG jiT3MNa5T/+36OmjzclTCgc37nY4/zODsbyvjk1Hwm9lMTuRm+IAMoazLo81ItVe2yoB RnPdn2/yBbW/4hogfUUBWChcn/m8fq127us7Zm7GWgE4zxx4WteXw8JB/LeDtLUTFbuZ czM0VwIRrW3MOCq+0OFpGhMvCTsN5bvebJ3LPI3AWTAeOVkPjoRBs89O7Omsis/zp8GY tCnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=lpwjcdFM; spf=pass (google.com: domain of linux-kernel+bounces-6703-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6703-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index 5c678695162e..dae839279950 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-merge - mediatek,mt8195-disp-merge + - mediatek,mt8195-mdp3-merge - items: - const: mediatek,mt6795-disp-merge - const: mediatek,mt8173-disp-merge From patchwork Wed Dec 20 10:08:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181590 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2538693dyi; Wed, 20 Dec 2023 02:19:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IGle3CE6Mm/rErAAidzsNxZcwwFgJCNRTPjdnqQcCkTqIPK990xCO/fCtpAqJecOKTWdQDa X-Received: by 2002:a17:90a:aa05:b0:28b:508b:e0ba with SMTP id k5-20020a17090aaa0500b0028b508be0bamr3948015pjq.47.1703067577008; Wed, 20 Dec 2023 02:19:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067576; cv=none; d=google.com; s=arc-20160816; b=KKM3SILpoI7IMJBIYSIvtcI9dH5+iIP+ddD5OHjP4LUn2RhP3VHp5ZF9ncPUT+j4bM A0aW+pd3+J1f0m/RIN+qFzs+kL3usu+/oXxRAgkIqHv3j/tdSYRzYZWqFXoyAOwCFhpH zMBFNCJgiHbzwpDYuBzxFCIj5GKogNOxgmCRIpoCc5GhAdw1pzBsOmQn2GWUtAdaGGdh tMx8avrgie17b+bJHWKNZY+pPqB0BNKj7Po5l4uJjS7w+UmVruTkQ4dpmc7Liua/m1Nw Im1j1an21Ae/kqipHgT/r48hOq2ZrOimSFB0imXCbTanjHrdGCHSjBilAPP0EHtOMmch 4LqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CZfwX/wsWCkwVK0PMNBkW/bjKkWMLaDfZFL2RraVoKE=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=edzTgpaQCrQ799RIphc+/3OeJizhvEQuNKqGqW6S8jQxeQZUI7jnG9wa7kEQv+/ssg VSJhOIHFDT8x8Sw1uspUhX7Awyu/CLyR09h3fgqE1/fdrv3h9Cjlp89ELnRuyRATUW5j g93Ji7SiOU9fk26Da1sUenNP+A6HuLKxYKd3y9+lFKJHFWEHe3KRXVyNl5skF1jTWfVu wetHxz7USbifKO39EFLjkUhURYdIiBd8iwWqxWikF6jlXcrWpC18DGbPfd2kKWZ1Jj8f lZ7mBWSaZrT0NB/hBN6AWYExEW9L4dtz56ea9eaEAUajQlsLoR+eYfvXq6H3hqDFvZB3 y9ig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=G4uAAUnV; spf=pass (google.com: domain of linux-kernel+bounces-6707-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6707-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index 3e1069b00b56..c471a181d125 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt8173-disp-ovl - mediatek,mt8183-disp-ovl - mediatek,mt8192-disp-ovl + - mediatek,mt8195-mdp3-ovl - items: - enum: - mediatek,mt7623-disp-ovl From patchwork Wed Dec 20 10:08:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181582 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2537166dyi; Wed, 20 Dec 2023 02:16:10 -0800 (PST) X-Google-Smtp-Source: AGHT+IHKVdr4u/UPXaRHMkPZ65LpoDJIPXwditbAtpRKRXntNbpZ5uZ2DOZRAhE0/v27pTz0CuwV X-Received: by 2002:a0c:ee24:0:b0:67a:99cb:e2f with SMTP id l4-20020a0cee24000000b0067a99cb0e2fmr16313598qvs.42.1703067370612; Wed, 20 Dec 2023 02:16:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067370; cv=none; d=google.com; s=arc-20160816; b=XkgpwJY6seLHeIB8PmY5F0v8YaYkepo/J/T+eCsZ9e880Izt2j++pbDKh5+1oeQ0m7 LTqcK50KLJ/N+5SSaIDKcVBceYBPbqDM5e9KMU4uDMkM3ARzMTBG7kUUIoFvwOU9AJvp 8iQAEv61oaP9a4hZ/GjBpdywUqa32VR6x+uGGrm1e6QlAYWGp060rgCSIIhexhdMwPDC r4bJMxne6lw++09H3TvXiDtuHgFZTg6Sj6pqGY6pewKWVETo5WhjCEUADJEYikbx6HDs e8BkBlzkvaAyGEr5YSwQglwMDMhUTgan9w2HEJrkwqAZAy7Rw6iYlcN6kj14MSgKo5bY zGfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tJf5yBrmP9+h3QbyKaZHSTjQbagz9H0rJQiO4PcgBeM=; fh=e0RlLHzlztEJgFr1G5iUAfmLhro7zrN0SmKLmnTwLIM=; b=wcJ2l53hzRBHSma2XgHNfaz1YM+djCwjE2Nmu6pi0H0d7TQYuk0UzLyv0jYNrZz4Nt H6LKTP0qxt3Qg+zrVCdqjd0dvzJWiKGxQepVjlxTeMvFfh7gDU0S7lt+GmPsj7uSZApb vzjf+YMSBqPkuRdlAI/WXIFiVHJLFSattWlstUs/166ga9e9SKH5hbKM82omiZHmSRP0 O/ykPLgPH+V7aejwWgTciYvhH5VCA+IP0GHO2jF4p/W6WMhLloLx2W0IqdeMMbEZGKyh +WoBm7dg+y9y8uCUw6GbjpdiJPNrX6RgV/qKghmm3HjVIsr898rvwcHF2IwBw6xYdRec wlwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=tzsDckxi; spf=pass (google.com: domain of linux-kernel+bounces-6711-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6711-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. 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Wed, 20 Dec 2023 18:08:57 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:57 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 15/16] dt-bindings: display: mediatek: split: add compatible for MT8195 Date: Wed, 20 Dec 2023 18:08:52 +0800 Message-ID: <20231220100853.20616-16-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--3.601900-8.000000 X-TMASE-MatchedRID: iSQL5szRvdEmeoNhEXvE7GNW0DAjL5p++OI6XsK3BWHfUZT83lbkEItz U8iLelfKk5fnUPZTc0s2rGI383MBk6LCTO1UKypvSEQN/D/3cG6H7D1bP/FcOlmmz7LVVfOpZBw rIERGz+EZoBsQWiqLArpjAjMHHtZlHxPMjOKY7A8LbigRnpKlKTpcQTtiHDgW5Q+Bm+TIeXAeWq FdbyWvC5jmE9ANWG0Ol5kCTqXarhuP6/1EAjxJyV4Vqu1jjx3ewtvdkgBWssu8enuHvqOd7i18q lBVnRX0wZBgUyJVEbl6Fw8/PpTMRaVvmiAyeA2kc5MSfkiJFI5p3LlElBHTlw== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.601900-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 2C204B67FA4184FFB7BA7E558FD1464141EEFDFF9275A3FDC2BBEF0A63451AB92000:8 X-MTK: N X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785795571338707808 X-GMAIL-MSGID: 1785795571338707808 Add compatible string and GCE property for MT8195 SPLIT, of which is operated by MDP3. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,split.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml index a8a5c9608598..e4affc854f3d 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml @@ -23,6 +23,7 @@ properties: oneOf: - enum: - mediatek,mt8173-disp-split + - mediatek,mt8195-mdp3-split - items: - const: mediatek,mt6795-disp-split - const: mediatek,mt8173-disp-split @@ -38,6 +39,21 @@ properties: the power controller specified by phandle. See Documentation/devicetree/bindings/power/power-domain.yaml for details. + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + clocks: items: - description: SPLIT Clock @@ -48,6 +64,17 @@ required: - power-domains - clocks +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-split + + then: + required: + - mediatek,gce-client-reg + additionalProperties: false examples: From patchwork Wed Dec 20 10:08:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 181574 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:24d3:b0:fb:cd0c:d3e with SMTP id r19csp2536007dyi; Wed, 20 Dec 2023 02:13:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IHluYlNS7Nfrmfl1UazMMzAh9ICCn8hCueatVfm4zqjgRX8DX+1KUvPda1FkLlkBv/Fz0XA X-Received: by 2002:a17:906:2083:b0:a23:2762:e48a with SMTP id 3-20020a170906208300b00a232762e48amr2637299ejq.78.1703067219802; Wed, 20 Dec 2023 02:13:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1703067219; cv=none; d=google.com; s=arc-20160816; b=hqxKqqw9aUL1UUhd901i9oUmlaHL6RzoEs7ssfZPK7n5Ab1hQ8tRQPkICxov3GDgqW LDoAPJoDuMCrBSsbASY74Zry8oUq4IUmmGyk2gEDj/VqXhAiltKCjaIDPTJWNk4/OOxW fBHRW3ELvkP1Z5bDx464PDriFP5aE42jjNWHMOGAAYkw2xQrKuc6olYkiKFJKCNzweYo 34hSAIFTnWR0+batPjdPeyC3B4RpzTfFM8eM4XvZUSqHjo4iOt+/GFXS/SeecpMbrFMn udKTVzOPTSI+0XFOXCWxst4ZAYj6FbQRVe1ADiTspdfCP4rbGJOemu+rC/5c6baJLERS PYCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=h5rIsp5+I+SkmadGTO7Dcz836VjuIt1iX+A2hptaRFs=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=aaFj6qbJImJ8gvNNOOPMMQNBd8/XEy5G+TxO+DHzu4Ta6dIY/YdXyh9tB2/VJoqdx4 lM/MjiNsDNCuPmZJABIvN7iMzk41jLadMZMzBORcIJwpeSuFkLVY5BYFMm0VEJXJYpQK flP9mAAfgGWDHFHrUhxpeFRSixo4jttpnMzMSr50rbjLH9T5u8+A6XpKgxrvIlBiJCo/ bKjqWuVgqTtWH7qW0aF3mobeWzLznroKFF/XVAzwb+IBrjRlvayP/Gx9Z8KkXW4OOxtX ZJp7PeZ8Uk8yDmPJDYuWiMFo6ikUep6V7ml4LddxMR9+EyU/2SxPhBSXYdAbsXcoUE6X 8W6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=mUy3sZW8; spf=pass (google.com: domain of linux-kernel+bounces-6701-ouuuleilei=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-6701-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. 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Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/display/mediatek/mediatek,padding.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml index 6bad7dc2d69f..be07bbdc54e3 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -20,7 +20,9 @@ description: properties: compatible: - const: mediatek,mt8188-disp-padding + enum: + - mediatek,mt8188-disp-padding + - mediatek,mt8195-mdp3-padding reg: maxItems: 1