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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dn17-20020a17090794d100b00797670441desi2028131ejc.911.2022.11.11.06.01.31; Fri, 11 Nov 2022 06:01:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=nQh29gwW; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234131AbiKKOAl (ORCPT + 99 others); Fri, 11 Nov 2022 09:00:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234173AbiKKOAO (ORCPT ); Fri, 11 Nov 2022 09:00:14 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F313391C5; Fri, 11 Nov 2022 05:56:41 -0800 (PST) Message-ID: <20221111132706.104870257@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174999; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=AJ8ukewK1Vm9sMuQ8J9M/D1xUb59WLt5C0IKQaGN9eI=; b=nQh29gwWm+mp9adZ3XnFqZww6hDJZUArAFgW9DLxJ58tiv3rjxKjGS28S3LLejO0X1RYiF ujFOqd1MgCxdHFGOM04FZBbCC0goBivqH06V4EE8P4dFkOZPIKEP19hPgZJ9OCn25oN1rC tCM3GVTfL8UsM4IOIXfSvv8XMNh6AVjTpNBWx3jWcq5zMdtgNhn8NFAzoaTf5d4iZwqxns dYCWNQFMqkn7zvgRgvaYUxoHRVwfUgLAVaytq36O9SdC+zPnQvsZ3MX3e59xHTc4HO7lna 2Vp3WjJCbFzt1spSfRA1RbK3Mgw6wn5gAVDXBiWZ+oobxvkXGzgphhVw/nblog== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174999; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=AJ8ukewK1Vm9sMuQ8J9M/D1xUb59WLt5C0IKQaGN9eI=; b=HQtH4ThXuPL/qsID3YXyZfhFETiPGyK/Ea/QVJX0HE4KqZFZQsfNyTlKIEOa8bsCYJIy5r A3W2Mpv1WtQCl2Bw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 01/20] genirq/msi: Move IRQ_DOMAIN_MSI_NOMASK_QUIRK to MSI flags References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:39 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208600821149597?= X-GMAIL-MSGID: =?utf-8?q?1749208600821149597?= It's truly a MSI only flag and for the upcoming per device MSI domains this must be in the MSI flags so it can be set during domain setup without exposing this quirk outside of x86. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- arch/x86/kernel/apic/msi.c | 5 ++--- include/linux/irqdomain.h | 9 +-------- include/linux/msi.h | 6 ++++++ kernel/irq/msi.c | 2 +- 4 files changed, 10 insertions(+), 12 deletions(-) --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -176,7 +176,8 @@ static struct msi_domain_ops pci_msi_dom static struct msi_domain_info pci_msi_domain_info = { .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX, + MSI_FLAG_PCI_MSIX | MSI_FLAG_NOMASK_QUIRK, + .ops = &pci_msi_domain_ops, .chip = &pci_msi_controller, .handler = handle_edge_irq, @@ -200,8 +201,6 @@ struct irq_domain * __init native_create if (!d) { irq_domain_free_fwnode(fn); pr_warn("Failed to initialize PCI-MSI irqdomain.\n"); - } else { - d->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK; } return d; } --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -186,15 +186,8 @@ enum { /* Irq domain implements MSI remapping */ IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5), - /* - * Quirk to handle MSI implementations which do not provide - * masking. Currently known to affect x86, but partially - * handled in core code. - */ - IRQ_DOMAIN_MSI_NOMASK_QUIRK = (1 << 6), - /* Irq domain doesn't translate anything */ - IRQ_DOMAIN_FLAG_NO_MAP = (1 << 7), + IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -395,6 +395,12 @@ enum { MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 9), /* Free MSI descriptors */ MSI_FLAG_FREE_MSI_DESCS = (1 << 10), + /* + * Quirk to handle MSI implementations which do not provide + * masking. Currently known to affect x86, but has to be partially + * handled in the core MSI code. + */ + MSI_FLAG_NOMASK_QUIRK = (1 << 11), }; int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -875,7 +875,7 @@ static int __msi_domain_alloc_irqs(struc * MSI affinity setting requires a special quirk (X86) when * reservation mode is active. */ - if (domain->flags & IRQ_DOMAIN_MSI_NOMASK_QUIRK) + if (info->flags & MSI_FLAG_NOMASK_QUIRK) vflags |= VIRQ_NOMASK_QUIRK; } From patchwork Fri Nov 11 13:56:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18798 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp755637wru; Fri, 11 Nov 2022 06:02:12 -0800 (PST) X-Google-Smtp-Source: AA0mqf7fFJ+W419NiYAHdhamujg+dCDHpEci9e4JjscbvrucX1jroeGmxq/axUGOFzxkUWEPRzmo X-Received: by 2002:a17:906:eb59:b0:7ae:c1b2:d928 with SMTP id mc25-20020a170906eb5900b007aec1b2d928mr1929399ejb.296.1668175332530; Fri, 11 Nov 2022 06:02:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175332; cv=none; d=google.com; s=arc-20160816; b=SPTVpN2lpsMJdpc6hwv/P0gBVf/7QdKdq6pjh1ZHIiConlNGG5kG0NjWscfL/PM8zg l+mLHfP+repE4uUzyTiqE4fL4AzCHmw4DZlgq6zKZsuZ54fheA94ILVITbZZgdyKgxSC zdYcUmX3fLCVaR8NAV6c9FYk3pXm0mMuV8bDx85Pim6IWxhoy8eyAj8RZA55S5BgXmSm GCrpdsBBQgfgpV7MmpGMlUjjX33Vw6Xoe3ZTcdt0uTlxXaMtJ5cizyKke6v3DPmQFcov HDvuHuDQn29MZi5M+Rxyrfh8Ev4wnqPQU/+sjK/+b5n9mPuyY54WPE4CGGfqNnBRTGVl LfiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=2CoaFGPWc/Ouzc0vn/G/Q6h+d/JDyugVvhuanxsmmo8=; b=l54o+ZDi1Vw32gEsIR+zn9QSTvAI4Xoe71n/USFnAH8q9YY1FyFCNMbmfw+oW3QhtC 2zUyP0rmjfs1g6HpZR6NggPj12GnBS6+W3j5YFprMkqxf9qipouevFUUs9mCKKvEe6PM OzNVE1xsrJw+Snl+7kLnNdRFCl0UM8mJ+6mMcRXHrCpbGdUFgYleGY91ckd5LBwDT62h EB4oT+pEnmheB5KqgeoSucAPMrJn9/VPPd0nGxzkH9Ahvk4eFEI01moC+c1T/vGj5iob JOkHZrZrhJwo5iN/wUvg0US3nJc8hCm4uwPz/sVxz0H6ZM9f2NIPQRZqylIvU+ZKrakc 3MRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=xUJTOaEr; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=+39+WuL0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 02/20] genirq/irqdomain: Rename irq_domain::dev to irq_domain::pm_dev References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:40 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208617736185001?= X-GMAIL-MSGID: =?utf-8?q?1749208617736185001?= irq_domain::dev is a misnomer as it's usually the rule that a device pointer points to something which is directly related to the instance. irq_domain::dev can point to some other device for power management to ensure that this underlying device is not powered down when an interrupt is allocated. The upcoming per device MSI domains really require a pointer to the device which instantiated the irq domain and not to some random other device which is required for power management down the chain. Rename irq_domain::dev to irq_domain::pm_dev and fixup the few sites which use that pointer. Conversion was done with the help of coccinelle. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- drivers/irqchip/irq-gic.c | 4 +- include/linux/irqdomain.h | 76 +++++++++++++++++++++++----------------------- kernel/irq/chip.c | 8 ++-- 3 files changed, 44 insertions(+), 44 deletions(-) --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -401,8 +401,8 @@ static void gic_irq_print_chip(struct ir { struct gic_chip_data *gic = irq_data_get_irq_chip_data(d); - if (gic->domain->dev) - seq_printf(p, gic->domain->dev->of_node->name); + if (gic->domain->pm_dev) + seq_printf(p, gic->domain->pm_dev->of_node->name); else seq_printf(p, "GIC-%d", (int)(gic - &gic_data[0])); } --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -117,53 +117,53 @@ struct irq_domain_chip_generic; /** * struct irq_domain - Hardware interrupt number translation object - * @link: Element in global irq_domain list. - * @name: Name of interrupt domain - * @ops: pointer to irq_domain methods - * @host_data: private data pointer for use by owner. Not touched by irq_domain - * core code. - * @flags: host per irq_domain flags - * @mapcount: The number of mapped interrupts + * @link: Element in global irq_domain list. + * @name: Name of interrupt domain + * @ops: Pointer to irq_domain methods + * @host_data: Private data pointer for use by owner. Not touched by irq_domain + * core code. + * @flags: Per irq_domain flags + * @mapcount: The number of mapped interrupts * - * Optional elements - * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy - * to swap it for the of_node via the irq_domain_get_of_node accessor - * @gc: Pointer to a list of generic chips. There is a helper function for - * setting up one or more generic chips for interrupt controllers - * drivers using the generic chip library which uses this pointer. - * @dev: Pointer to a device that the domain represent, and that will be - * used for power management purposes. - * @parent: Pointer to parent irq_domain to support hierarchy irq_domains + * Optional elements: + * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy + * to swap it for the of_node via the irq_domain_get_of_node accessor + * @gc: Pointer to a list of generic chips. There is a helper function for + * setting up one or more generic chips for interrupt controllers + * drivers using the generic chip library which uses this pointer. + * @pm_dev: Pointer to a device that can be utilized for power management + * purposes related to the irq domain. + * @parent: Pointer to parent irq_domain to support hierarchy irq_domains * - * Revmap data, used internally by irq_domain - * @revmap_size: Size of the linear map table @revmap[] - * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map - * @revmap_mutex: Lock for the revmap - * @revmap: Linear table of irq_data pointers + * Revmap data, used internally by the irq domain code: + * @revmap_size: Size of the linear map table @revmap[] + * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map + * @revmap_mutex: Lock for the revmap + * @revmap: Linear table of irq_data pointers */ struct irq_domain { - struct list_head link; - const char *name; - const struct irq_domain_ops *ops; - void *host_data; - unsigned int flags; - unsigned int mapcount; + struct list_head link; + const char *name; + const struct irq_domain_ops *ops; + void *host_data; + unsigned int flags; + unsigned int mapcount; /* Optional data */ - struct fwnode_handle *fwnode; - enum irq_domain_bus_token bus_token; - struct irq_domain_chip_generic *gc; - struct device *dev; + struct fwnode_handle *fwnode; + enum irq_domain_bus_token bus_token; + struct irq_domain_chip_generic *gc; + struct device *pm_dev; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY - struct irq_domain *parent; + struct irq_domain *parent; #endif /* reverse map data. The linear map gets appended to the irq_domain */ - irq_hw_number_t hwirq_max; - unsigned int revmap_size; - struct radix_tree_root revmap_tree; - struct mutex revmap_mutex; - struct irq_data __rcu *revmap[]; + irq_hw_number_t hwirq_max; + unsigned int revmap_size; + struct radix_tree_root revmap_tree; + struct mutex revmap_mutex; + struct irq_data __rcu *revmap[]; }; /* Irq domain flags */ @@ -206,7 +206,7 @@ static inline void irq_domain_set_pm_dev struct device *dev) { if (d) - d->dev = dev; + d->pm_dev = dev; } #ifdef CONFIG_IRQ_DOMAIN --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -1561,10 +1561,10 @@ int irq_chip_compose_msi_msg(struct irq_ return 0; } -static struct device *irq_get_parent_device(struct irq_data *data) +static struct device *irq_get_pm_device(struct irq_data *data) { if (data->domain) - return data->domain->dev; + return data->domain->pm_dev; return NULL; } @@ -1578,7 +1578,7 @@ static struct device *irq_get_parent_dev */ int irq_chip_pm_get(struct irq_data *data) { - struct device *dev = irq_get_parent_device(data); + struct device *dev = irq_get_pm_device(data); int retval = 0; if (IS_ENABLED(CONFIG_PM) && dev) @@ -1597,7 +1597,7 @@ int irq_chip_pm_get(struct irq_data *dat */ int irq_chip_pm_put(struct irq_data *data) { - struct device *dev = irq_get_parent_device(data); + struct device *dev = irq_get_pm_device(data); int retval = 0; if (IS_ENABLED(CONFIG_PM) && dev) From patchwork Fri Nov 11 13:56:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18800 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp755781wru; Fri, 11 Nov 2022 06:02:26 -0800 (PST) X-Google-Smtp-Source: AA0mqf5QAuNealDIl+izG/8LJ1vfpdqtb87iDMt+UcxBIScR5lCsSBf8gVTQhxbutHnGhdkPEyxu X-Received: by 2002:a17:906:9143:b0:7a1:b555:6f1 with SMTP id y3-20020a170906914300b007a1b55506f1mr2075551ejw.29.1668175338303; Fri, 11 Nov 2022 06:02:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175338; cv=none; d=google.com; s=arc-20160816; b=limXkrcxWX24nGln0cZIg2jIqmIWajf4V4uZtG9g+vFKXH2eS1VJIh5LKCasy6dkbO Z49JQKJzkWY7uatVve0UL1b05vKELQs0OmPYgwSbjRgqJDQusK6fFDP6eg4uDHWtmQfa 1+B/YE/LxIKOjTUSTmZugadHAcNXu3spEWexj/RZSt+k5ydTj99/HYtz/x+INReYLf6E W65zy67h3D6Zm8unxg2JL1C4IpnXWW43g5QvZUWMLLBdP79QPhBDQPLRucUoG8Iz3GIH RSiQpYP0xq+8oQfqkB0/Xifb51m6+DO3E6Ax26Nd6W0Pi8+7yDcbf9wOO7CCK9Sk8cK6 cRiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=+wWUy0xddNMXZ4KiuU4oL7F6PKUict1lpTyY0niJbHA=; b=05RPh247G3iJZUjWAE9FHd6+DzCqzezlCyICSazZ0cK4/5uF/isfWtWly0ZWyTVucb WnpFC4k3MC2CSVqet9hdQKiQZOvX57giN5ZSZp3q+BImng9un1g5KlfAcQ3OXpbjeOvu 87ePhYK3oV6rX2RSjQ75+SVZcTXYXVEwO+fAcGGRwiUPur+DwfPcBrPwVDpDyy1gDknH lOx8XVGosQwZTCIrPyo/4wDvqwraARzhYVrxiIGlHNeW/GaiEAvh+FvMSOa7SM1y1V60 MUItcISFse7+tQ0Dt5chDrmjF8Pk5lTiHcrkPYT/eRSGPoBDUcZTdk66IpDLoHrD/qmG 6BRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="4Ve/5OQD"; dkim=neutral (no key) header.i=@linutronix.de header.b=pOkuRxfa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 03/20] genirq/msi: Create msi_api.h References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:42 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208623403457940?= X-GMAIL-MSGID: =?utf-8?q?1749208623403457940?= Create a API header for MSI specific functions which are relevant to device drivers. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 6 ++++-- include/linux/msi_api.h | 15 +++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -13,11 +13,14 @@ * * Regular device drivers have no business with any of these functions and * especially storing MSI descriptor pointers in random code is considered - * abuse. The only function which is relevant for drivers is msi_get_virq(). + * abuse. + * + * Device driver relevant functions are available in */ #include #include +#include #include #include #include @@ -184,7 +187,6 @@ struct msi_device_data { int msi_setup_device_data(struct device *dev); -unsigned int msi_get_virq(struct device *dev, unsigned int index); void msi_lock_descs(struct device *dev); void msi_unlock_descs(struct device *dev); --- /dev/null +++ b/include/linux/msi_api.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef LINUX_MSI_API_H +#define LINUX_MSI_API_H + +/* + * APIs which are relevant for device driver code for allocating and + * freeing MSI interrupts and querying the associations between + * hardware/software MSI indices and the Linux interrupt number. + */ + +struct device; + +unsigned int msi_get_virq(struct device *dev, unsigned int index); + +#endif From patchwork Fri Nov 11 13:56:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18799 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp755712wru; Fri, 11 Nov 2022 06:02:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf4BBbD3S5IIM5VSrUHaSzAuysSfu7wRcf/LBQNEJV86ycCJ+fVg46xo0+/rB/2fmYElp3R0 X-Received: by 2002:a19:2d53:0:b0:499:cce2:12d9 with SMTP id t19-20020a192d53000000b00499cce212d9mr843690lft.4.1668175338291; Fri, 11 Nov 2022 06:02:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175338; cv=none; d=google.com; s=arc-20160816; b=lFv+hugTafxfpzjZiw0SBoaRI2M7371CnVinqQGymotWuIBq8wLJ3J72eJPugzv0eC s8xhilByAGUfNF9TPIqLtTJS5OlQp05CkM9lpZDhUBEpQlNmcy36ax92mc9Zu5K6BcFo YhnLnehCBpp+FZT3W/rzQuRfhC9b44Leg2OgnIFK7ordqLAaeJHu2r/YLLyuC0imO2A0 vd79kQLlEhf3q4PM005+OOMtnfy08Nj+pEldyzy5h7k5DyOpS5eb20+hNVkU/exbM9vx pype/KZOaAhPrKo7ygb3xjkgrSjURxf81lKFuqzhm/n5pgx7H6zg3UrQZMI5aafUrPXo 6iQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=zA5ha748LKhDmb5FPzI8a0g9w0FaiptQdqB8uQ3jTXw=; b=fhtOGWjTUXtA0Vkag7WQnFOhziqm4AQzqNbzAqc2IxTFZssVTNv0H1XE2yBrvh78Gl EpJBiXfI9moZT0Eb35y1jpfIIDa4YCGwmSkSbcqNhgNGruYuQYuYokb6wjZ/VaB8OieW qlSAxkoncqvKwjt2zskw7Z+3SSBE7YISVOGFSuTtigPI6ANxTYEKF79fANmi/bZQEBEG VMAhuHkvWMwVQMY8+8e+DI9e9pQTQdjltDK/SZ+KEqZBXRRmu7UiXCCmndIRveYrzzJV VJty75IHyX55ggx9CwknwDnJg4CdSOlr7EFSrH4zUVkTIX6vRMes2G289Ql8AdgdXC6e idWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EbvSbUXW; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j17-20020a17090686d100b007adef1fc90fsi1551050ejy.304.2022.11.11.06.01.50; Fri, 11 Nov 2022 06:02:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EbvSbUXW; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234020AbiKKOBC (ORCPT + 99 others); Fri, 11 Nov 2022 09:01:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230270AbiKKOAa (ORCPT ); Fri, 11 Nov 2022 09:00:30 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFCCE56EDD; Fri, 11 Nov 2022 05:56:45 -0800 (PST) Message-ID: <20221111132706.276545278@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175004; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=zA5ha748LKhDmb5FPzI8a0g9w0FaiptQdqB8uQ3jTXw=; b=EbvSbUXW9nFHqG2WDwQcBgXL97thkoo4raFmOln8yVqrphIoC0l+9hZHMP5m9yUF/GECc4 KewKET9LzTLaaXlMfLo6KTDhrcxx4M5+mX+9+vH3yYqyIGJ/ZqTeq2DmusSXPt1Z68YxgY gm2HvOi0toYYKQZQ96JGxXlsPwFT9gZusZx6nLe+KC+CcnkaRsxW5Uc9XoWBoK0wRPgpYj J9QRr2LKPx5Q804UiQ1NffH88HSjiEsfcQn5mEmtNTxXFAgI6qhyQc/nQJlD73AOgazk1w bu8MzrlM0qKn3suCr6/sTsQSpD4UC91v1Vt+zPorCA7ZbBpnJ9Sh7zdcWOaIyA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175004; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=zA5ha748LKhDmb5FPzI8a0g9w0FaiptQdqB8uQ3jTXw=; b=T9IEE38gSYKi57w85Y2z1rWZQqe1G0LxfHLdyp2W+2FRPXDVlQDagn6EzBEVSfUZrqqmvL KkP6szVnXinU4rAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 04/20] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_PARENT References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:43 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208623605172823?= X-GMAIL-MSGID: =?utf-8?q?1749208623605172823?= The new PCI/IMS (Interrupt Message Store) functionality is allowing hardware vendors to provide implementation specific storage for the MSI messages. This can be device memory and also host/guest memory, e.g. in queue memory which is shared with the hardware. This requires device specific MSI interrupt domains, which cannot be achived by expanding the existing PCI/MSI interrupt domain concept which is a global interrupt domain shared by all PCI devices on a particular (IOMMU) segment: |--- device 1 [Vector]---[Remapping]---[PCI/MSI]--|... |--- device N This works because the PCI/MSI[-X] space is uniform, but falls apart with PCI/IMS which is implementation defined and must be available along with PCI/MSI[-X] on the same device. To support PCI/MSI[-X] plus PCI/IMS on the same device it is required to rework the PCI/MSI interrupt domain hierarchy concept in the following way: |--- [PCI/MSI] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N That allows in the next step to create multiple interrupt domains per device: |--- [PCI/MSI] device 1 |--- [PCI/IMS] device 1 [Vector]---[Remapping]---|... |--- [PCI/MSI] device N |--- [PCI/IMS] device N So the domain which previously created the global PCI/MSI domain must now act as parent domain for the per device domains. The hierarchy depth is the same as before, but the PCI/MSI domains are then device specific and not longer global. Provide IRQ_DOMAIN_FLAG_MSI_PARENT, which allows to identify these parent domains, along with helpers to query it. Signed-off-by: Thomas Gleixner --- include/linux/irqdomain.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -189,6 +189,9 @@ enum { /* Irq domain doesn't translate anything */ IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), + /* Irq domain is a MSI parent domain */ + IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), + /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved * for implementation specific purposes and ignored by the @@ -551,6 +554,11 @@ static inline bool irq_domain_is_msi_rem extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain); +static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) +{ + return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; +} + #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) @@ -596,6 +604,12 @@ irq_domain_hierarchical_is_msi_remap(str { return false; } + +static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) +{ + return false; +} + #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ #else /* CONFIG_IRQ_DOMAIN */ From patchwork Fri Nov 11 13:56:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18803 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756717wru; Fri, 11 Nov 2022 06:03:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf6zkDiepilVTAMyR78acjP4p124BBVVEqkkK9i2sPJpgMQuhcf4hUvErserXJtyyokvJKe9 X-Received: by 2002:a17:907:2348:b0:78d:f796:c00d with SMTP id we8-20020a170907234800b0078df796c00dmr1892172ejb.251.1668175417464; Fri, 11 Nov 2022 06:03:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175417; cv=none; d=google.com; s=arc-20160816; b=gmYNXxFJvljNnh3NAgs/RML/cMsUnGG2HIpyERf9E/DRi1vq0WxPU73mowDTb10WdE vhmH2gIiERdiAEQDTIay5rPbtdTpSAXoqi6g3t1VutD8k1E8OfaFssIktUG9R8t27oKZ hK2PYJhEinB9+NX3uU2Pze7Ca46AZuFiIguKBl82hpAi+I9BzBGSeD9OtZA8xYtxbRG4 joZutp4LnSylSPpPHA2IllbZjrP1Ozs+HrG4U/Xj/yXyHICw0cNFISDPmu2nhdxzu2+F Snt2F6vE6j/Qo3UTX2Cx0QFTZpPgHyRbm5NB1p/bUyCPisu1M8QWgsGuwsBqMlpjlHq+ jK6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=+CkTPHTMXOvRSl4YB673TzHqsVFLjHUDowE8deLkwuw=; b=oGPrNgPXtwJGd1eXNbqG8CJ8mqN1JqV4G/cDQ/eKTUMAVGvsriDVqHjG/3axOo7bmT DA5B+NCjG8pXZb/sd2NH/F4nWOBzhS0pudSop9YLUO8EXfGF8nO2djaOqyPQNaXUZI7r 1debzOb5qafGc9ymEezuC+obj5E2CXUjugAt7fEcqRLjeib3lgt42SpV5yeU2O5rz45u 9bDGIEBE5MT8MtS9kM92YYb1JDA/sDX2hvqykrjFmH1LT2ACDEcpi4HWfKJk6cL/KRaW 9/JTa0xrtvyN60bss1+Qz/Rmg0+U6RVPbPOEbopeLLhHY/TKg69kcaxaMRRjsgM4+rdN wrNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=gNnRb6mr; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=8IPFVf2S; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 05/20] genirq/irqdomain: Provide IRQ_DOMAIN_FLAG_MSI_DEVICE References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:45 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208706564488489?= X-GMAIL-MSGID: =?utf-8?q?1749208706564488489?= Similar to marking parent MSI domains it's required to identify per device domains. Add flag and helpers. Signed-off-by: Thomas Gleixner --- include/linux/irqdomain.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -192,6 +192,9 @@ enum { /* Irq domain is a MSI parent domain */ IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), + /* Irq domain is a MSI device domain */ + IRQ_DOMAIN_FLAG_MSI_DEVICE = (1 << 9), + /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved * for implementation specific purposes and ignored by the @@ -559,6 +562,11 @@ static inline bool irq_domain_is_msi_par return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; } +static inline bool irq_domain_is_msi_device(struct irq_domain *domain) +{ + return domain->flags & IRQ_DOMAIN_FLAG_MSI_DEVICE; +} + #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) @@ -609,6 +617,11 @@ static inline bool irq_domain_is_msi_par { return false; } + +static inline bool irq_domain_is_msi_device(struct irq_domain *domain) +{ + return false; +} #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ From patchwork Fri Nov 11 13:56:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18805 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756809wru; Fri, 11 Nov 2022 06:03:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf7Rfn2xLLLBsE3+7ADLc3zxohr4w72A2/1HEtMgY999y/5fbkqYP2HFiUffhh7KrEzi+AAO X-Received: by 2002:a63:5465:0:b0:46f:f2f6:b06 with SMTP id e37-20020a635465000000b0046ff2f60b06mr1797443pgm.376.1668175425879; Fri, 11 Nov 2022 06:03:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175425; cv=none; d=google.com; s=arc-20160816; b=MEuC+DMeG0LU9wDa6mikDMZoWQ5t/5UuPaUwI6NLUhXPLr3RsV8QldsgacCeW4hde/ iIC0ewwa3LIn3JEG5BKItEPTDLYP06TNA8FA/SfD7WcJYYaFI9RkY20u7MdM3CocTqvP 5Wk4PnjQAAKi8SMl96ggfgyqEHUzfOXRdRQ2IYWZnDC6fl9TYs2i7pXHVGJic8wk5tCx Zm8wgqDsAyNNp/hrH762QkfSYzLNFlloerjIy/rouoxTSYkxZc+Wxbo/zTSMOSSK4eRx HJfB6KpH5L72concKW7/UhRRQhHD0UN/07T5NlczXkNbrGX+IlON380IWJWmN+sFRDoF M2XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=+dAWZkN6cGNqJWgbyj9Oq+MbyBZuRhS/MrnxspMqy9E=; b=YV7Rr1fk1mTEmKpuNhEids2yfkFfsxQ4sM+OdZC3GdLAaEw9mV/r4yVpQlAs9wvfoB vW2t8Z+7N0ztpnXXJs9IPNJrZT57QBF75gnnrTj/qxhTg5JXcO+FQWcBvJLk0VJhJ6Hx pTvkH8rLcfADiTUMy3mw7roqmXjdg9hLdt6913/qHRI0KUs5ZAcGW1P92VpJihbc4XlZ 0D1xC/j+wb0ElgIKrcqvAPVImC86XrkvbQ97hyLKqdYZ+oDv19V98Ybe5N+PEYCWXNmj Ripu50zXhkbaFU09Wa2p7Vtz7qVw5VNQGOJicrk/ZjgcxUniZy7l5oyDk1Gf9BmBhzVM WpdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=v1PtI44g; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 06/20] genirq/msi: Check for invalid MSI parent domain usage References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:46 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208715255940915?= X-GMAIL-MSGID: =?utf-8?q?1749208715255940915?= In the upcoming per device MSI domain concept the MSI parent domains are not allowed to be used as regular MSI domains where the MSI allocation/free operations are applicable. Add appropriate checks. Signed-off-by: Thomas Gleixner --- kernel/irq/msi.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -937,13 +937,21 @@ int msi_domain_alloc_irqs_descs_locked(s lockdep_assert_held(&dev->msi.data->mutex); + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) { + ret = -EINVAL; + goto free; + } + + /* Frees allocated descriptors in case of failure. */ ret = msi_domain_add_simple_msi_descs(info, dev, nvec); if (ret) return ret; ret = ops->domain_alloc_irqs(domain, dev, nvec); - if (ret) - msi_domain_free_irqs_descs_locked(domain, dev); + if (!ret) + return 0; +free: + msi_domain_free_irqs_descs_locked(domain, dev); return ret; } @@ -1013,6 +1021,9 @@ void msi_domain_free_irqs_descs_locked(s lockdep_assert_held(&dev->msi.data->mutex); + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) + return; + ops->domain_free_irqs(domain, dev); if (ops->msi_post_free) ops->msi_post_free(domain, dev); From patchwork Fri Nov 11 13:56:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18802 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756675wru; Fri, 11 Nov 2022 06:03:35 -0800 (PST) X-Google-Smtp-Source: AA0mqf5zxuHpMWWDG+LDdp4zgCxclLDm1DI68wROwi1HtvkMOMWQTIPqzu7J5ueXzia1RfSxPNi3 X-Received: by 2002:a17:90a:fd14:b0:213:2030:123f with SMTP id cv20-20020a17090afd1400b002132030123fmr2117194pjb.3.1668175414874; Fri, 11 Nov 2022 06:03:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175414; cv=none; d=google.com; s=arc-20160816; b=s+Wl8LthBnhAGJNtyvGJQye2S5F6tc8eWWTioT5l+wsg0L8zJs2a8bIw8Vaecf/F3D 92YZU32srKXWIj6bk6rarRQKsLkbdGeXf6AQUaD9ADC6qWR3CUHHVxld13j4pB0WdvPH u+wt9bARqWQa99Ydaw7TWvkos7xJl8lrWirbyp3OBm0OGevfVfeRLknMMYrIU6oPfSeP 4anmMCzqbn0WotvH7qE+C+j3mNzJf7J8kNB/e4PPph0pagPxCuu8wVkoLnhWosNa40tc aHmv2ObN6cuQDBZ4i4P1ScCZFPpLYmuUPgsW7l48njZuqY79qXhWIZo+TSHpiFb4MZGw 0rXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=92MQH4tsGJzqVWHKcfiMvA7FJnwUvqItKIXp1ZsQCJ8=; b=NU2ZFsxI+rKC0pHMl4/HnF0hae7d1Sgx/K03f+Nh3xzi7DZJamdvBlXQ3sXSvS8rs1 zNxB2yX+H7V/acEsejbhetWjZoIqmaJy/ttNHcSdh//dgeDa7SURYdV5c5AjBCUFwCEJ Juz06EgKES4nxOkHjm9lUOj9R8wSl2XqHqiro84pIEJXUOk1qEOwB7IrDhUaKsvFyOBH URpq1CMy47bk5kmAG66qSPWm7cYlpPuAtGPo22RAc/RO5KzNQ8ZW78aG2eGOdKc9Rrib uEE9TZpiDsr97e3S86qC59tVp6qtDepVbPrdPLVm0de5wJHLTioKAuzVHU56tUv5jgcs 1WLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=bvPrN6ax; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 07/20] genirq/msi: Add pointers for per device irq domains References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:48 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208703976236551?= X-GMAIL-MSGID: =?utf-8?q?1749208703976236551?= With the upcoming per device MSI interrupt domain support it is necessary to store the domain pointers per device. Instead of delegating that storage to device drivers or subsystems create a storage array in struct msi_device_data which will also take care of tearing down the irq domains when msi_device_data is cleaned up via devres. The interfaces into the MSI core will be changed from irqdomain pointer based interfaces to domain id based interfaces to support multiple MSI domains on a single device (e.g. PCI/MSI[-X] and PCI/IMS. Once the per device domain support is complete the irq domain pointer in struct device::msi.domain will not longer contain a pointer to the "global" MSI domain. It will contain a pointer to the MSI parent domain instead. It would be a horrible maze of conditionals to evaluate all over the place which domain pointer should be used, i.e. the "global" one in device::msi::domain or one from the internal pointer array. To avoid this evaluate in msi_setup_device_data() whether the irq domain which is associated to a device is a "global" or a parent MSI domain. If it is global then copy the pointer into the first entry in the irqdomain pointer array. This allows to convert interfaces and implementation to domain ids while keeping everything existing working. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 3 +++ include/linux/msi_api.h | 8 ++++++++ kernel/irq/msi.c | 14 ++++++++++++++ 3 files changed, 25 insertions(+) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,7 @@ struct msi_desc; struct pci_dev; struct platform_msi_priv_data; struct device_attribute; +struct irq_domain; void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); @@ -176,6 +177,7 @@ enum msi_desc_filter { * @mutex: Mutex protecting the MSI descriptor store * @__store: Xarray for storing MSI descriptor pointers * @__iter_idx: Index to search the next entry for iterators + * @__irqdomains: Per device interrupt domains */ struct msi_device_data { unsigned long properties; @@ -183,6 +185,7 @@ struct msi_device_data { struct mutex mutex; struct xarray __store; unsigned long __iter_idx; + struct irq_domain *__irqdomains[MSI_MAX_DEVICE_IRQDOMAINS]; }; int msi_setup_device_data(struct device *dev); --- a/include/linux/msi_api.h +++ b/include/linux/msi_api.h @@ -10,6 +10,14 @@ struct device; +/* + * Per device interrupt domain related constants. + */ +enum msi_domain_ids { + MSI_DEFAULT_DOMAIN, + MSI_MAX_DEVICE_IRQDOMAINS, +}; + unsigned int msi_get_virq(struct device *dev, unsigned int index); #endif --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -21,6 +21,18 @@ static inline int msi_sysfs_create_group(struct device *dev); +static inline void msi_setup_default_irqdomain(struct device *dev, struct msi_device_data *md) +{ + if (!dev->msi.domain) + return; + /* + * If @dev::msi::domain is a global MSI domain, copy the pointer + * into the domain array to avoid conditionals all over the place. + */ + if (!irq_domain_is_msi_parent(dev->msi.domain)) + md->__irqdomains[MSI_DEFAULT_DOMAIN] = dev->msi.domain; +} + /** * msi_alloc_desc - Allocate an initialized msi_desc * @dev: Pointer to the device for which this is allocated @@ -213,6 +225,8 @@ int msi_setup_device_data(struct device return ret; } + msi_setup_default_irqdomain(dev, md); + xa_init(&md->__store); mutex_init(&md->mutex); dev->msi.data = md; From patchwork Fri Nov 11 13:56:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18804 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756813wru; Fri, 11 Nov 2022 06:03:46 -0800 (PST) X-Google-Smtp-Source: AA0mqf5r1gNIxrVfKXA8AUijsJfJCFWcDVg7RonbCEXhCtxGojWnVBZ118hhM7529RG+qiyNFnbe X-Received: by 2002:aa7:9493:0:b0:56b:9ae8:ca05 with SMTP id z19-20020aa79493000000b0056b9ae8ca05mr2767369pfk.59.1668175426191; Fri, 11 Nov 2022 06:03:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175426; cv=none; d=google.com; s=arc-20160816; b=vvkOSPVcHEVt8UnYr7recbdil5WG/WmZAee18iNv7qxPmRGj7GHIj+OL1ZXHHL0pWr BxbIuRBT/nEQnUqC1AC8Ecuz4tlKJCgw8/KlzpvWblOqA1/pg3TAJYUE+IYrKXqaAX73 LxPZMTZvTOH8fzwCh/o+XilA+qTP4jwK8BqKQexlC6jcW5zaflOWMtVydM99EBXfJnvl KF3nOOxKAh8FKBeKKivpEeN5duIYFSIQucP8tf3mJJ7D8ga7l/ckrZ+fK1qcSuOimEp7 5dkEEcD43Dy4V2vZny22x9n2f8FdQvBz3cMeVAEBOk/y6NEnkO5wR1g9HNBzUjWDwloh RTaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=tsASkdH8VvcqLBDncuUe68lvHrXorclrIrV+H/1cwEs=; b=NouUtsnjuELvmudl7JW3ygF/wDIi3qiAKE/vLnprUkyJvD3Jzg5yz0OKbxu56vxLOz TgQIhGpu2vWlJYceTv1m97DQx5lNMp179nBKSxe6K8IuIO6VPygGqpcGo7aefDHGUY01 IgKy6Tc9colmKOt+2hLrbuQUOTCDa49keQ7hyotIta+qi48LMpj4Jb/JO8S3vxh8JQ8f nOIw0HXR68jbCzF6SianJl1WU2RDkriCwG9W7/ehBg+VuV/vCssvMMxSyyRFMB3Sc4L0 +6W3Z95xFXzqHMBo+KGIIxU989xsmqgu1iNviU0vqF73vzJ2cFMKUdtGX3q/0Z7hJEc8 flVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=gwH3fmla; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=GcATm9YI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 08/20] genirq/msi: Make MSI descriptor iterators device domain aware References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:50 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208715836867788?= X-GMAIL-MSGID: =?utf-8?q?1749208715836867788?= To support multiple MSI interrupt domains per device it is necessary to segment the xarray MSI descriptor storage. Each domain gets up to MSI_MAX_INDEX entries. Change the iterators so they operate with domain ids and take the domain offsets into account. The publicly available iterators which are mostly used in legacy implementations and the PCI/MSI core default to MSI_DEFAULT_DOMAIN (0) which is the id for the existing "global" domains. No functional change. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 45 +++++++++++++++++++++++++++++++++++++++++---- kernel/irq/msi.c | 43 +++++++++++++++++++++++++++++++++++-------- 2 files changed, 76 insertions(+), 12 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -177,6 +177,7 @@ enum msi_desc_filter { * @mutex: Mutex protecting the MSI descriptor store * @__store: Xarray for storing MSI descriptor pointers * @__iter_idx: Index to search the next entry for iterators + * @__iter_max: Index to limit the search * @__irqdomains: Per device interrupt domains */ struct msi_device_data { @@ -185,6 +186,7 @@ struct msi_device_data { struct mutex mutex; struct xarray __store; unsigned long __iter_idx; + unsigned long __iter_max; struct irq_domain *__irqdomains[MSI_MAX_DEVICE_IRQDOMAINS]; }; @@ -193,14 +195,34 @@ int msi_setup_device_data(struct device void msi_lock_descs(struct device *dev); void msi_unlock_descs(struct device *dev); -struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter); +struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter); + +/** + * msi_first_desc - Get the first MSI descriptor of the default irqdomain + * @dev: Device to operate on + * @filter: Descriptor state filter + * + * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() + * must be invoked before the call. + * + * Return: Pointer to the first MSI descriptor matching the search + * criteria, NULL if none found. + */ +static inline struct msi_desc *msi_first_desc(struct device *dev, + enum msi_desc_filter filter) +{ + return msi_domain_first_desc(dev, MSI_DEFAULT_DOMAIN, filter); +} + struct msi_desc *msi_next_desc(struct device *dev, enum msi_desc_filter filter); /** - * msi_for_each_desc - Iterate the MSI descriptors + * msi_domain_for_each_desc - Iterate the MSI descriptors in a specific domain * * @desc: struct msi_desc pointer used as iterator * @dev: struct device pointer - device to iterate + * @domid: The id of the interrupt domain which should be walked. * @filter: Filter for descriptor selection * * Notes: @@ -208,10 +230,25 @@ struct msi_desc *msi_next_desc(struct de * pair. * - It is safe to remove a retrieved MSI descriptor in the loop. */ -#define msi_for_each_desc(desc, dev, filter) \ - for ((desc) = msi_first_desc((dev), (filter)); (desc); \ +#define msi_domain_for_each_desc(desc, dev, domid, filter) \ + for ((desc) = msi_domain_first_desc((dev), (domid), (filter)); (desc); \ (desc) = msi_next_desc((dev), (filter))) +/** + * msi_for_each_desc - Iterate the MSI descriptors in the default irqdomain + * + * @desc: struct msi_desc pointer used as iterator + * @dev: struct device pointer - device to iterate + * @filter: Filter for descriptor selection + * + * Notes: + * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs() + * pair. + * - It is safe to remove a retrieved MSI descriptor in the loop. + */ +#define msi_for_each_desc(desc, dev, filter) \ + msi_domain_for_each_desc((desc), (dev), MSI_DEFAULT_DOMAIN, (filter)) + #define msi_desc_to_dev(desc) ((desc)->dev) #ifdef CONFIG_IRQ_MSI_IOMMU --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -21,6 +21,10 @@ static inline int msi_sysfs_create_group(struct device *dev); +/* Invalid XA index which is outside of any searchable range */ +#define MSI_XA_MAX_INDEX (ULONG_MAX - 1) +#define MSI_XA_DOMAIN_SIZE (MSI_MAX_INDEX + 1) + static inline void msi_setup_default_irqdomain(struct device *dev, struct msi_device_data *md) { if (!dev->msi.domain) @@ -33,6 +37,20 @@ static inline void msi_setup_default_irq md->__irqdomains[MSI_DEFAULT_DOMAIN] = dev->msi.domain; } +static int msi_get_domain_base_index(struct device *dev, unsigned int domid) +{ + lockdep_assert_held(&dev->msi.data->mutex); + + if (WARN_ON_ONCE(domid >= MSI_MAX_DEVICE_IRQDOMAINS)) + return -ENODEV; + + if (WARN_ON_ONCE(!dev->msi.data->__irqdomains[domid])) + return -ENODEV; + + return domid * MSI_XA_DOMAIN_SIZE; +} + + /** * msi_alloc_desc - Allocate an initialized msi_desc * @dev: Pointer to the device for which this is allocated @@ -229,6 +247,7 @@ int msi_setup_device_data(struct device xa_init(&md->__store); mutex_init(&md->mutex); + md->__iter_idx = MSI_XA_MAX_INDEX; dev->msi.data = md; devres_add(dev, md); return 0; @@ -251,7 +270,7 @@ EXPORT_SYMBOL_GPL(msi_lock_descs); void msi_unlock_descs(struct device *dev) { /* Invalidate the index wich was cached by the iterator */ - dev->msi.data->__iter_idx = MSI_MAX_INDEX; + dev->msi.data->__iter_idx = MSI_XA_MAX_INDEX; mutex_unlock(&dev->msi.data->mutex); } EXPORT_SYMBOL_GPL(msi_unlock_descs); @@ -260,17 +279,18 @@ static struct msi_desc *msi_find_desc(st { struct msi_desc *desc; - xa_for_each_start(&md->__store, md->__iter_idx, desc, md->__iter_idx) { + xa_for_each_range(&md->__store, md->__iter_idx, desc, md->__iter_idx, md->__iter_max) { if (msi_desc_match(desc, filter)) return desc; } - md->__iter_idx = MSI_MAX_INDEX; + md->__iter_idx = MSI_XA_MAX_INDEX; return NULL; } /** - * msi_first_desc - Get the first MSI descriptor of a device + * msi_domain_first_desc - Get the first MSI descriptor of an irqdomain associated to a device * @dev: Device to operate on + * @domid: The id of the interrupt domain which should be walked. * @filter: Descriptor state filter * * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() @@ -279,19 +299,26 @@ static struct msi_desc *msi_find_desc(st * Return: Pointer to the first MSI descriptor matching the search * criteria, NULL if none found. */ -struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter) +struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, + enum msi_desc_filter filter) { struct msi_device_data *md = dev->msi.data; + int baseidx; if (WARN_ON_ONCE(!md)) return NULL; lockdep_assert_held(&md->mutex); - md->__iter_idx = 0; + baseidx = msi_get_domain_base_index(dev, domid); + if (baseidx < 0) + return NULL; + + md->__iter_idx = baseidx; + md->__iter_max = baseidx + MSI_MAX_INDEX - 1; return msi_find_desc(md, filter); } -EXPORT_SYMBOL_GPL(msi_first_desc); +EXPORT_SYMBOL_GPL(msi_domain_first_desc); /** * msi_next_desc - Get the next MSI descriptor of a device @@ -315,7 +342,7 @@ struct msi_desc *msi_next_desc(struct de lockdep_assert_held(&md->mutex); - if (md->__iter_idx >= (unsigned long)MSI_MAX_INDEX) + if (md->__iter_idx >= md->__iter_max) return NULL; md->__iter_idx++; From patchwork Fri Nov 11 13:56:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18806 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756821wru; Fri, 11 Nov 2022 06:03:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf5zfhPp2zFyP2xumxBVbu8AWOLHdmaTeAsB8arsg3HtiatHhT7vjG/jWAQwJt3hqjHKvY/I X-Received: by 2002:a63:5d50:0:b0:460:ec46:3645 with SMTP id o16-20020a635d50000000b00460ec463645mr1866860pgm.92.1668175427540; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i19-20020a170902eb5300b0017a09cc694dsi2324769pli.561.2022.11.11.06.03.08; Fri, 11 Nov 2022 06:03:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=QwvsjN+S; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234281AbiKKOBw (ORCPT + 99 others); Fri, 11 Nov 2022 09:01:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234005AbiKKOA6 (ORCPT ); Fri, 11 Nov 2022 09:00:58 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8B59121271; Fri, 11 Nov 2022 05:56:53 -0800 (PST) Message-ID: <20221111132706.556889434@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175012; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=TkOvIxWq7blX++8C4usdFqhmn0pf5LlrWLBigdC6jNU=; b=QwvsjN+SeJTunL4JDRi3zuYoEkPYRBE3sGQtDBitAJztwrnQqvJFDprVJ3r+G23bUHKTXz WVnLTw5f30eDVfgihTfJPYh/Z0QsjvMKw0FT4fEiroiX9FQQRB/8S59doOI0R+CVgPo2Ij HcLqirBVszrOQRk/9x7L5bfx3ZMse96fIUFurtJqHM7ZxxOKTJm6Vtjt6BgEVeszKHG4VH Zi9+KnBbJNUfAlznj2A0WtgtSI3seDWQFduF5C3BGlCDTdk+RzJklqNTZo67B5WY4Z60+k 695kbAKVQ2MzHgWCxy8XHJHwnSSyLy8JdX6CUPZFaY6qQVf6NhgpZrLnLuOzfQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175012; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=TkOvIxWq7blX++8C4usdFqhmn0pf5LlrWLBigdC6jNU=; b=8rRBWR4SmnZKR1bVKLF8pwofRIJbqCo+qdlwtD/+742M8HKIZZrdG3K1eaeFfog27xHxWo L9y1Jro0COuGinAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 09/20] genirq/msi: Make msi_get_virq() device domain aware References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:51 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208716804180141?= X-GMAIL-MSGID: =?utf-8?q?1749208716804180141?= From: Ahmed S. Darwish In preparation of the upcoming per device multi MSI domain support, change the interface to support lookups based on domain id and zero based index within the domain. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- include/linux/msi_api.h | 14 +++++++++++++- kernel/irq/msi.c | 24 ++++++++++++++++++------ 2 files changed, 31 insertions(+), 7 deletions(-) --- a/include/linux/msi_api.h +++ b/include/linux/msi_api.h @@ -18,6 +18,18 @@ enum msi_domain_ids { MSI_MAX_DEVICE_IRQDOMAINS, }; -unsigned int msi_get_virq(struct device *dev, unsigned int index); +unsigned int msi_domain_get_virq(struct device *dev, unsigned int domid, unsigned int index); + +/** + * msi_get_virq - Lookup the Linux interrupt number for a MSI index on the default interrupt domain + * @dev: Device for which the lookup happens + * @index: The MSI index to lookup + * + * Return: The Linux interrupt number on success (> 0), 0 if not found + */ +static inline unsigned int msi_get_virq(struct device *dev, unsigned int index) +{ + return msi_domain_get_virq(dev, MSI_DEFAULT_DOMAIN, index); +} #endif --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -351,25 +351,37 @@ struct msi_desc *msi_next_desc(struct de EXPORT_SYMBOL_GPL(msi_next_desc); /** - * msi_get_virq - Return Linux interrupt number of a MSI interrupt + * msi_domain_get_virq - Lookup the Linux interrupt number for a MSI index on a interrupt domain * @dev: Device to operate on + * @domid: Domain ID of the interrupt domain associated to the device * @index: MSI interrupt index to look for (0-based) * * Return: The Linux interrupt number on success (> 0), 0 if not found */ -unsigned int msi_get_virq(struct device *dev, unsigned int index) +unsigned int msi_domain_get_virq(struct device *dev, unsigned int domid, unsigned int index) { struct msi_desc *desc; unsigned int ret = 0; - bool pcimsi; + bool pcimsi = false; + int base; if (!dev->msi.data) return 0; - pcimsi = dev_is_pci(dev) ? to_pci_dev(dev)->msi_enabled : false; + if (WARN_ON_ONCE(index >= MSI_MAX_INDEX)) + return 0; + + /* This check is only valid for the PCI default MSI domain */ + if (dev_is_pci(dev) && domid == MSI_DEFAULT_DOMAIN) + pcimsi = to_pci_dev(dev)->msi_enabled; msi_lock_descs(dev); - desc = xa_load(&dev->msi.data->__store, pcimsi ? 0 : index); + + base = msi_get_domain_base_index(dev, domid); + if (base < 0) + return 0; + + desc = xa_load(&dev->msi.data->__store, base + pcimsi ? 0 : index); if (desc && desc->irq) { /* * PCI-MSI has only one descriptor for multiple interrupts. @@ -386,7 +398,7 @@ unsigned int msi_get_virq(struct device msi_unlock_descs(dev); return ret; } -EXPORT_SYMBOL_GPL(msi_get_virq); +EXPORT_SYMBOL_GPL(msi_domain_get_virq); #ifdef CONFIG_SYSFS static struct attribute *msi_dev_attrs[] = { From patchwork Fri Nov 11 13:56:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18807 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp756871wru; Fri, 11 Nov 2022 06:03:51 -0800 (PST) X-Google-Smtp-Source: AA0mqf4zI7f9uE+KmOGr84b7lw7mkmdFaERlcmVnXhvoA21y1AlZ3CoUiz4RHe3WxBQmk/SNwaDi X-Received: by 2002:a17:90a:5992:b0:213:519d:fe51 with SMTP id l18-20020a17090a599200b00213519dfe51mr2002095pji.239.1668175430907; Fri, 11 Nov 2022 06:03:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175430; cv=none; d=google.com; s=arc-20160816; b=eVfN87LXuMjrhBxxKwBcRbOWG/3Vu9BkkvN30DC67/sCa/9a3KEXph7jVH7pJchIBC 8rb/wF+rIMQr8MOPUFXVJHjvl+KsJPJ0HC2iuz9CglZ7c4lhg0A7Z7EEXKgrg7jLIZ0/ V/sXcoOXIidTH1rQuY60mbXfh0Vt9sM+0o6HwUXc25A0fL4PyuiIt2Yk1RVuaawodf47 rX6FBOzfayLqZW3pNpXGKHg4EfGe+Ki1fcQN4TMMRpa9M2lj44SLcJP8Q3vtxEckgikb +wHajmZix1oI0IUb23YBILu4aVP0g1NXA1QH/yply2E92vS/Nw3qWLbp5BGO9Bt9jbMz F2kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=ZAg32d9i/2td2oqLXP4twAnBQvJWwD8NcSLXlUrJbYg=; b=cS6eaa1j/DWLInxucyz2qJ+frNpA2xxGbdIDeyiG+mswseGrSpPEais5Q5261sSnch ZKhI3JgfaFnUAM6pVMCF2sN2Z3oCgQ1iopUl9cpg1SlS1WgUJHnKOGjt5PdT7QTZ6qyi y70Nu/9YqV+4t0nfxYE6SqYaTAmCtSeTTQLGE1+miAkqjQohHsriJKUpUKH33bxfP9yp rtgz8GlECGL9ghG3ZdDEIVKFm3ILMg1QpkVQJaMpmDOm6ZJJ0z268P9YLyqQsdhzWv00 OYszyNiRrGAFsy+4KAZ3R6OsbxSUCxdkn0E4Dg3AfOQ3p/oaCQRIEBbtCeHLWUKAcBCb 3BSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=wTMg281e; dkim=neutral (no key) header.i=@linutronix.de header.b=Snso0XSv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u14-20020a63790e000000b0046f915df515si2615471pgc.29.2022.11.11.06.03.16; Fri, 11 Nov 2022 06:03:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=wTMg281e; dkim=neutral (no key) header.i=@linutronix.de header.b=Snso0XSv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234202AbiKKOB4 (ORCPT + 99 others); Fri, 11 Nov 2022 09:01:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234278AbiKKOBL (ORCPT ); Fri, 11 Nov 2022 09:01:11 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70DEF391D2; Fri, 11 Nov 2022 05:56:55 -0800 (PST) Message-ID: <20221111132706.612934166@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175013; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZAg32d9i/2td2oqLXP4twAnBQvJWwD8NcSLXlUrJbYg=; b=wTMg281eWp6mj4p8XCRYsGLuKaE18bBJPfh2mwDMgfgBIRGhzgaW5KoLmNiJ9Yi2sfgHvE J9n2fQpOecsWGH9hD1tiP8fayfvIJKg4xn8ck9M1HOXvrP/NN2Su3SNaOBENX/5yU2h6DE QkG5EqNjZEmxgyeRQTiXfXRjJl4fevozjBLTZgNFFnpC1GPgoZrU9Y+uY/sHFI5Esc4GXW coxMdGZzk7LurScp8P/AAJ4zDZduFW1awQQk3UUky5HbjaBUVGBTPa3VTS6hDJSQz0hAj/ 7jpr2mLZROQn7FP2LQxeF+nYEyn1uJB2K9oLB1HSxynXrmaJSr83/2clZ+pLsA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175013; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZAg32d9i/2td2oqLXP4twAnBQvJWwD8NcSLXlUrJbYg=; b=Snso0XSvIOhypHm6eejQQUk8CRZleoczwyIEvsFyEbzA9VmrArOSf7KE5UJ8Izdy89gkuy MiuJ5SHtSSSlczCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 10/20] genirq/msi: Rename msi_add_msi_desc() to msi_insert_msi_desc() References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:53 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208720518418032?= X-GMAIL-MSGID: =?utf-8?q?1749208720518418032?= This reflects the functionality better. No functional change. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 4 ++-- drivers/soc/ti/ti_sci_inta_msi.c | 4 ++-- include/linux/msi.h | 2 +- kernel/irq/msi.c | 6 ++++-- 4 files changed, 9 insertions(+), 7 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -308,7 +308,7 @@ static int msi_setup_msi_desc(struct pci if (desc.pci.msi_attrib.can_mask) pci_read_config_dword(dev, desc.pci.mask_pos, &desc.pci.msi_mask); - return msi_add_msi_desc(&dev->dev, &desc); + return msi_insert_msi_desc(&dev->dev, &desc); } static int msi_verify_entries(struct pci_dev *dev) @@ -591,7 +591,7 @@ static int msix_setup_msi_descs(struct p desc.pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL); } - ret = msi_add_msi_desc(&dev->dev, &desc); + ret = msi_insert_msi_desc(&dev->dev, &desc); if (ret) break; } --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -73,13 +73,13 @@ static int ti_sci_inta_msi_alloc_descs(s for (set = 0; set < res->sets; set++) { for (i = 0; i < res->desc[set].num; i++, count++) { msi_desc.msi_index = res->desc[set].start + i; - if (msi_add_msi_desc(dev, &msi_desc)) + if (msi_insert_msi_desc(dev, &msi_desc)) goto fail; } for (i = 0; i < res->desc[set].num_sec; i++, count++) { msi_desc.msi_index = res->desc[set].start_sec + i; - if (msi_add_msi_desc(dev, &msi_desc)) + if (msi_insert_msi_desc(dev, &msi_desc)) goto fail; } } --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -274,7 +274,7 @@ static inline void msi_desc_set_iommu_co } #endif -int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc); +int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc); void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -100,13 +100,15 @@ static int msi_insert_desc(struct msi_de } /** - * msi_add_msi_desc - Allocate and initialize a MSI descriptor + * msi_insert_msi_desc - Allocate and initialize a MSI descriptor and + * insert it at @init_desc->msi_index + * * @dev: Pointer to the device for which the descriptor is allocated * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor * * Return: 0 on success or an appropriate failure code. */ -int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc) +int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) { struct msi_desc *desc; From patchwork Fri Nov 11 13:56:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18808 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp757058wru; Fri, 11 Nov 2022 06:04:08 -0800 (PST) X-Google-Smtp-Source: AA0mqf7aO+J5gfT7Vz2nWVi6Iook9O0XxFt1sv+d8BIpxDZcFmxBTOcAsikoyhczlgCm6fzbJNdG X-Received: by 2002:a17:902:b7c3:b0:186:c372:8e09 with SMTP id v3-20020a170902b7c300b00186c3728e09mr2764486plz.74.1668175447902; Fri, 11 Nov 2022 06:04:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175447; cv=none; d=google.com; s=arc-20160816; b=Q7iFSBNHqV0vdqOWNCFQeMaSgwdzxB3ViOLfUdhpxpmFwZvpIcOyb2rzapDQGPM4DJ a7R3Mu28fZEG2tIwJbpYxhfz2jbFXGnB6a5AkGw1h2ka73pW9TzXGpvB+mZNjk2/eNft zKyVN3DZg9kWSvJnnNnmCyxXRevxMwWA1RYIxggKwGRcxbgdGBvPDLQEK7sIekbgVfcv vaXLiA1NDZyIsO23oOZ6WNTaSCWSYz3nbrwP2LvdRwuQPPaypTRoJ6o20EkVMUrSz3qF LfqZfm/5+FDiT+cVNTCcFVyttXo3YfyclwYDFwZZkG/kR0zyBA4SWvQ4+WZQAruFKrxJ OqIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=8VY0WlPNbaPO/N862hvT4P/0JGamuqTySDiEq2psBhM=; b=lEMLpzF0s/rrPeA2cUFQep3L3EBL93NgWYb87791FPcSLUnYbezSGUNpOJdsxcfP8d hRYQWuva9/U90jzkctn//ZKaBMRIvnGF5QIMyYlbQEEyPa/huwtSVUaM+ZRM03BcsBLN 2YvHVebvjIeBhSKWr4gdl49f2ALWcKgLIcZo3t5aCMdq0NHJOFPqmLBvviW66Q6qgf3P WGqWgxpPV/5wi539WA+ikKPuopIgvOSU/TvCQhm+qV9+4hQJ8HwM2JyKwIdTt2kMrL9F CmEZsZuTLktRns/V7R0B+Me9fSA8/YQdTQYVURCNceuFNOgxP/q33okUWXbhFZJfwdoG u0SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=vQ3lgcgf; dkim=neutral (no key) header.i=@linutronix.de header.b=UgjpGjR3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 11/20] genirq/msi: Make descriptor allocation device domain aware References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:54 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208738098395639?= X-GMAIL-MSGID: =?utf-8?q?1749208738098395639?= Change the descriptor allocation and insertion functions to take a domain id to prepare for the upcoming multi MSI domain per device support. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 15 ++++++++++++++- kernel/irq/msi.c | 44 +++++++++++++++++++++++++++++++++++--------- 2 files changed, 49 insertions(+), 10 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -274,7 +274,20 @@ static inline void msi_desc_set_iommu_co } #endif -int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc); +int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, + struct msi_desc *init_desc); +/** + * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the default domain + * @dev: Pointer to the device for which the descriptor is allocated + * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor + * + * Return: 0 on success or an appropriate failure code. + */ +static inline int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) +{ + return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc); +} + void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -63,7 +63,7 @@ static int msi_get_domain_base_index(str * Return: pointer to allocated &msi_desc on success or %NULL on failure */ static struct msi_desc *msi_alloc_desc(struct device *dev, int nvec, - const struct irq_affinity_desc *affinity) + const struct irq_affinity_desc *affinity) { struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); @@ -88,39 +88,58 @@ static void msi_free_desc(struct msi_des kfree(desc); } -static int msi_insert_desc(struct msi_device_data *md, struct msi_desc *desc, unsigned int index) +static int msi_insert_desc(struct device *dev, struct msi_desc *desc, + unsigned int domid, unsigned int index) { - int ret; + struct msi_device_data *md = dev->msi.data; + int baseidx, ret; + + baseidx = msi_get_domain_base_index(dev, domid); + if (baseidx < 0) { + ret = baseidx; + goto fail; + } desc->msi_index = index; + index += baseidx; ret = xa_insert(&md->__store, index, desc, GFP_KERNEL); if (ret) - msi_free_desc(desc); + goto fail; + return 0; + +fail: + msi_free_desc(desc); return ret; } /** - * msi_insert_msi_desc - Allocate and initialize a MSI descriptor and - * insert it at @init_desc->msi_index + * msi_domain_insert_msi_desc - Allocate and initialize a MSI descriptor and + * insert it at @init_desc->msi_index * * @dev: Pointer to the device for which the descriptor is allocated + * @domid: The id of the interrupt domain to which the desriptor is added * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor * * Return: 0 on success or an appropriate failure code. */ -int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) +int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, + struct msi_desc *init_desc) { struct msi_desc *desc; lockdep_assert_held(&dev->msi.data->mutex); + if (WARN_ON_ONCE(init_desc->msi_index >= MSI_MAX_INDEX)) + return -EINVAL; + desc = msi_alloc_desc(dev, init_desc->nvec_used, init_desc->affinity); if (!desc) return -ENOMEM; /* Copy type specific data to the new descriptor. */ desc->pci = init_desc->pci; - return msi_insert_desc(dev->msi.data, desc, init_desc->msi_index); + + return msi_insert_desc(dev, desc, domid, init_desc->msi_index); } /** @@ -143,7 +162,7 @@ static int msi_add_simple_msi_descs(stru desc = msi_alloc_desc(dev, 1, NULL); if (!desc) goto fail_mem; - ret = msi_insert_desc(dev->msi.data, desc, idx); + ret = msi_insert_desc(dev, desc, MSI_DEFAULT_DOMAIN, idx); if (ret) goto fail; } @@ -183,6 +202,9 @@ void msi_free_msi_descs_range(struct dev struct msi_desc *desc; unsigned long idx; + if (WARN_ON_ONCE(first_index >= MSI_MAX_INDEX || last_index >= MSI_MAX_INDEX)) + return; + lockdep_assert_held(&dev->msi.data->mutex); xa_for_each_range(xa, idx, desc, first_index, last_index) { @@ -779,6 +801,10 @@ int msi_domain_populate_irqs(struct irq_ struct msi_desc *desc; int ret, virq; + if (WARN_ON_ONCE(virq_base >= MSI_MAX_INDEX || + (virq_base + nvec) >= MSI_MAX_INDEX)) + return 0; + msi_lock_descs(dev); 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e9-20020a056a001a8900b00565eb80af7fsi2577835pfv.343.2022.11.11.06.03.25; Fri, 11 Nov 2022 06:04:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=I8oj1tOx; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=KlhnSQSi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234370AbiKKOCH (ORCPT + 99 others); Fri, 11 Nov 2022 09:02:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234234AbiKKOBN (ORCPT ); Fri, 11 Nov 2022 09:01:13 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC537814E1; Fri, 11 Nov 2022 05:56:58 -0800 (PST) Message-ID: <20221111132706.726275059@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175017; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YtbDzWpnrwwWvyENpRXFEkCRkWQeuna82et5GcBOaeQ=; b=I8oj1tOxDQINripBgyYjlotza6hp2yQpXUO5MhuSBEr788JcnzCCG6WEV1NmYZm3AeUehZ 51WZuuKl4kZndKjJf6HLtVGA7JvvUld4zewT+BB3HzK5qB9M6BhGj/JdZAzmEd0IlrWnyI nkKxjXwci2K0XFvcZOzcqGzWaHS56Y1awosMNsbmQLRDyF5wCDBkwrikiLW7KbMMpv/LPl X6BZnMU0TibrEtJ0FsYy9bLVLfX+D8hiQvyPPVJHSGP+VDQWZIvzyWGzsnIuXNYssEWrzU XucdxL20GLIAR7Wx8SXV477Tf8s2SCY6fiq/zSfVsQ1xI5Yk6IRcqSfwkvCg5w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175017; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YtbDzWpnrwwWvyENpRXFEkCRkWQeuna82et5GcBOaeQ=; b=KlhnSQSinKHnMC5rAQCdApjO39ut/EiYB/N16OKSyQ/HLcMYcfZfTT/9GxgxVoZTBCxXLw qF7dM3ZQU4byrWDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 12/20] genirq/msi: Make descriptor freeing domain aware References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:56 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208743338162693?= X-GMAIL-MSGID: =?utf-8?q?1749208743338162693?= Change the descriptor free functions to take a domain id to prepare for the upcoming multi MSI domain per device support. To avoid changing and extending the interfaces over and over use an core internal control struct and hand the pointer through the various functions. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 22 ++++++++++++++++--- kernel/irq/msi.c | 60 ++++++++++++++++++++++++++++++++++++++++++---------- 2 files changed, 68 insertions(+), 14 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -277,7 +277,8 @@ static inline void msi_desc_set_iommu_co int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, struct msi_desc *init_desc); /** - * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the default domain + * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the default irqdomain + * * @dev: Pointer to the device for which the descriptor is allocated * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor * @@ -288,10 +289,25 @@ static inline int msi_insert_msi_desc(st return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc); } -void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); +void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); + +/** + * msi_free_msi_descs_range - Free a range of MSI descriptors of a device + * in the default irqdomain + * + * @dev: Device for which to free the descriptors + * @first: Index to start freeing from (inclusive) + * @last: Last index to be freed (inclusive) + */ +static inline void msi_free_msi_descs_range(struct device *dev, unsigned int first, + unsigned int last) +{ + msi_domain_free_msi_descs_range(dev, MSI_DEFAULT_DOMAIN, first, last); +} /** - * msi_free_msi_descs - Free MSI descriptors of a device + * msi_free_msi_descs - Free all MSI descriptors of a device in the default irqdomain * @dev: Device to free the descriptors */ static inline void msi_free_msi_descs(struct device *dev) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -19,6 +19,18 @@ #include "internals.h" +/** + * struct msi_ctrl - MSI internal management control structure + * @domid: ID of the domain on which management operations should be done + * @first: First (hardware) slot index to operate on + * @last: Last (hardware) slot index to operate on + */ +struct msi_ctrl { + unsigned int domid; + unsigned int first; + unsigned int last; +}; + static inline int msi_sysfs_create_group(struct device *dev); /* Invalid XA index which is outside of any searchable range */ @@ -189,25 +201,32 @@ static bool msi_desc_match(struct msi_de return false; } -/** - * msi_free_msi_descs_range - Free MSI descriptors of a device - * @dev: Device to free the descriptors - * @first_index: Index to start freeing from - * @last_index: Last index to be freed - */ -void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, - unsigned int last_index) +static bool msi_ctrl_valid(struct device *dev, struct msi_ctrl *ctrl) +{ + if (WARN_ON_ONCE(ctrl->first > ctrl->last || + ctrl->first >= MSI_MAX_INDEX || + ctrl->last >= MSI_MAX_INDEX)) + return false; + return true; +} + +static void msi_domain_free_descs(struct device *dev, struct msi_ctrl *ctrl) { struct xarray *xa = &dev->msi.data->__store; struct msi_desc *desc; unsigned long idx; + int base; + + lockdep_assert_held(&dev->msi.data->mutex); - if (WARN_ON_ONCE(first_index >= MSI_MAX_INDEX || last_index >= MSI_MAX_INDEX)) + if (!msi_ctrl_valid(dev, ctrl)) return; - lockdep_assert_held(&dev->msi.data->mutex); + base = msi_get_domain_base_index(dev, ctrl->domid); + if (base < 0) + return; - xa_for_each_range(xa, idx, desc, first_index, last_index) { + xa_for_each_range(xa, idx, desc, ctrl->first + base, ctrl->last + base) { xa_erase(xa, idx); /* Leak the descriptor when it is still referenced */ @@ -217,6 +236,25 @@ void msi_free_msi_descs_range(struct dev } } +/** + * msi_domain_free_msi_descs_range - Free a range of MSI descriptors of a device in an irqdomain + * @dev: Device for which to free the descriptors + * @domid: Id of the domain to operate on + * @first: Index to start freeing from (inclusive) + * @last: Last index to be freed (inclusive) + */ +void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = first, + .last = last, + }; + + msi_domain_free_descs(dev, &ctrl); +} + void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { *msg = entry->msg; From patchwork Fri Nov 11 13:56:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18810 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp757119wru; Fri, 11 Nov 2022 06:04:13 -0800 (PST) X-Google-Smtp-Source: AA0mqf7xFjs6Q+uP9nYcONccyrnyQzSl/wBGjmcGUtTPpMn9HNA5QjSKyz2/ql0jjaUDHdfnIwuJ X-Received: by 2002:a63:da44:0:b0:470:d8e:c2b0 with SMTP id l4-20020a63da44000000b004700d8ec2b0mr1724863pgj.589.1668175453302; Fri, 11 Nov 2022 06:04:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175453; cv=none; d=google.com; s=arc-20160816; b=PZcJRRtVzIenH6bak8W/W3zzw6tiu2bW7tQWSrU1w9cD77+Y458Fqytb4MYKGFhhbI LBZocsPWht2UlzpAJgTEwYai8DDHdlgtBtRw7+YCneuue4TYlNIFntDYBs0r2ARVTVK/ cdCjNV5X2M3rtUj6RsM43MMyZhYL3T2Wfn7lzMtOJDBRL175TrRj/OwmO4D8bVpK19PS iLXWYPqhwbiIYwAlPb9jdnSwmaaNMVNCfP45zTXbkczUIh5ZZUARTZ1b/n3zBnQjEvlF ypOO6bW15aiHkk6pMG1nejkLv1mAfQRObX4MVJbvOfX+Wu6cBAY4X5JXGGkx1rhVAxME D4lg== ARC-Message-Signature: i=1; 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Darwish" , Reinette Chatre Subject: [patch 13/20] genirq/msi: Make msi_add_simple_msi_descs() device domain aware References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:58 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208744199259912?= X-GMAIL-MSGID: =?utf-8?q?1749208744199259912?= Allocating simple interrupt descriptors in the core code has to be multi device aware for the upcoming PCI/IMS support. Change the interfaces to take a domain id into account. Use the internal control struct for transport of arguments. Signed-off-by: Thomas Gleixner --- kernel/irq/msi.c | 99 +++++++++++++++++++++++++++++++------------------------ 1 file changed, 57 insertions(+), 42 deletions(-) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -154,39 +154,6 @@ int msi_domain_insert_msi_desc(struct de return msi_insert_desc(dev, desc, domid, init_desc->msi_index); } -/** - * msi_add_simple_msi_descs - Allocate and initialize MSI descriptors - * @dev: Pointer to the device for which the descriptors are allocated - * @index: Index for the first MSI descriptor - * @ndesc: Number of descriptors to allocate - * - * Return: 0 on success or an appropriate failure code. - */ -static int msi_add_simple_msi_descs(struct device *dev, unsigned int index, unsigned int ndesc) -{ - unsigned int idx, last = index + ndesc - 1; - struct msi_desc *desc; - int ret; - - lockdep_assert_held(&dev->msi.data->mutex); - - for (idx = index; idx <= last; idx++) { - desc = msi_alloc_desc(dev, 1, NULL); - if (!desc) - goto fail_mem; - ret = msi_insert_desc(dev, desc, MSI_DEFAULT_DOMAIN, idx); - if (ret) - goto fail; - } - return 0; - -fail_mem: - ret = -ENOMEM; -fail: - msi_free_msi_descs_range(dev, index, last); - return ret; -} - static bool msi_desc_match(struct msi_desc *desc, enum msi_desc_filter filter) { switch (filter) { @@ -255,6 +222,45 @@ void msi_domain_free_msi_descs_range(str msi_domain_free_descs(dev, &ctrl); } +/** + * msi_domain_add_simple_msi_descs - Allocate and initialize MSI descriptors + * @dev: Pointer to the device for which the descriptors are allocated + * @ctrl: Allocation control struct + * + * Return: 0 on success or an appropriate failure code. + */ +static int msi_domain_add_simple_msi_descs(struct device *dev, struct msi_ctrl *ctrl) +{ + struct msi_desc *desc; + unsigned int idx; + int ret, baseidx; + + lockdep_assert_held(&dev->msi.data->mutex); + + if (!msi_ctrl_valid(dev, ctrl)) + return -EINVAL; + + baseidx = msi_get_domain_base_index(dev, ctrl->domid); + if (baseidx < 0) + return baseidx; + + for (idx = ctrl->first; idx <= ctrl->last; idx++) { + desc = msi_alloc_desc(dev, 1, NULL); + if (!desc) + goto fail_mem; + ret = msi_insert_desc(dev, desc, ctrl->domid, idx); + if (ret) + goto fail; + } + return 0; + +fail_mem: + ret = -ENOMEM; +fail: + msi_domain_free_descs(dev, ctrl); + return ret; +} + void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { *msg = entry->msg; @@ -821,15 +827,19 @@ int msi_domain_populate_irqs(struct irq_ { struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .first = virq_base, + .last = virq_base + nvec - 1, + }; struct msi_desc *desc; int ret, virq; - if (WARN_ON_ONCE(virq_base >= MSI_MAX_INDEX || - (virq_base + nvec) >= MSI_MAX_INDEX)) + if (!msi_ctrl_valid(dev, &ctrl)) return 0; msi_lock_descs(dev); - ret = msi_add_simple_msi_descs(dev, virq_base, nvec); + ret = msi_domain_add_simple_msi_descs(dev, &ctrl); if (ret) goto unlock; @@ -850,7 +860,7 @@ int msi_domain_populate_irqs(struct irq_ fail: for (--virq; virq >= virq_base; virq--) irq_domain_free_irqs_common(domain, virq, 1); - msi_free_msi_descs_range(dev, virq_base, virq_base + nvec - 1); + msi_domain_free_descs(dev, &ctrl); unlock: msi_unlock_descs(dev); return ret; @@ -1024,14 +1034,19 @@ static int __msi_domain_alloc_irqs(struc return 0; } -static int msi_domain_add_simple_msi_descs(struct msi_domain_info *info, - struct device *dev, - unsigned int num_descs) +static int msi_domain_alloc_simple_msi_descs(struct device *dev, + struct msi_domain_info *info, + unsigned int num_descs) { + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .last = num_descs - 1, + }; + if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) return 0; - return msi_add_simple_msi_descs(dev, 0, num_descs); + return msi_domain_add_simple_msi_descs(dev, &ctrl); } /** @@ -1062,7 +1077,7 @@ int msi_domain_alloc_irqs_descs_locked(s } /* Frees allocated descriptors in case of failure. */ - ret = msi_domain_add_simple_msi_descs(info, dev, nvec); + ret = msi_domain_alloc_simple_msi_descs(dev, info, nvec); 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Darwish" , Reinette Chatre Subject: [patch 14/20] genirq/msi: Provide new domain id based interfaces for freeing interrupts References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:56:59 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208809271168313?= X-GMAIL-MSGID: =?utf-8?q?1749208809271168313?= Provide two sorts of interfaces to handle the different use cases: - msi_domain_free_irqs_range(): Handles a caller defined precise range - msi_domain_free_irqs_all(): Frees all interrupts associated to a domain The latter is useful for device teardown and to handle the legacy MSI support which does not have any range information available. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 9 +++ kernel/irq/msi.c | 146 +++++++++++++++++++++++++++++++++++++++++++--------- 2 files changed, 132 insertions(+), 23 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -486,6 +486,15 @@ int msi_domain_alloc_irqs(struct irq_dom int nvec); void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); + +void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); + +void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid); +void msi_domain_free_irqs_all(struct device *dev, unsigned int domid); + struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -583,7 +583,25 @@ static inline void msi_sysfs_remove_desc #endif /* !CONFIG_SYSFS */ static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); -static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); + +static struct irq_domain *msi_get_device_domain(struct device *dev, unsigned int domid) +{ + struct irq_domain *domain; + + lockdep_assert_held(&dev->msi.data->mutex); + + if (WARN_ON_ONCE(domid >= MSI_MAX_DEVICE_IRQDOMAINS)) + return NULL; + + domain = dev->msi.data->__irqdomains[domid]; + if (!domain) + return NULL; + + if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) + return NULL; + + return domain; +} static inline void irq_chip_write_msi_msg(struct irq_data *data, struct msi_msg *msg) @@ -744,7 +762,6 @@ static struct msi_domain_ops msi_domain_ .msi_prepare = msi_domain_ops_prepare, .set_desc = msi_domain_ops_set_desc, .domain_alloc_irqs = __msi_domain_alloc_irqs, - .domain_free_irqs = __msi_domain_free_irqs, }; static void msi_domain_update_dom_ops(struct msi_domain_info *info) @@ -758,8 +775,6 @@ static void msi_domain_update_dom_ops(st if (ops->domain_alloc_irqs == NULL) ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs; - if (ops->domain_free_irqs == NULL) - ops->domain_free_irqs = msi_domain_ops_default.domain_free_irqs; if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS)) return; @@ -1108,15 +1123,23 @@ int msi_domain_alloc_irqs(struct irq_dom return ret; } -static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) +static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain, + struct msi_ctrl *ctrl) { struct msi_domain_info *info = domain->host_data; + struct xarray *xa = &dev->msi.data->__store; struct irq_data *irqd; struct msi_desc *desc; - int i; + unsigned long idx; + int i, base; + + base = ctrl->domid * MSI_XA_DOMAIN_SIZE; + + xa_for_each_range(xa, idx, desc, ctrl->first + base, ctrl->last + base) { + /* Only handle MSI entries which have an interrupt associated */ + if (!msi_desc_match(desc, MSI_DESC_ASSOCIATED)) + continue; - /* Only handle MSI entries which have an interrupt associated */ - msi_for_each_desc(desc, dev, MSI_DESC_ASSOCIATED) { /* Make sure all interrupts are deactivated */ for (i = 0; i < desc->nvec_used; i++) { irqd = irq_domain_get_irq_data(domain, desc->irq + i); @@ -1131,11 +1154,99 @@ static void __msi_domain_free_irqs(struc } } -static void msi_domain_free_msi_descs(struct msi_domain_info *info, - struct device *dev) +static void msi_domain_free_locked(struct device *dev, struct msi_ctrl *ctrl) { + struct msi_domain_info *info; + struct msi_domain_ops *ops; + struct irq_domain *domain; + + if (!msi_ctrl_valid(dev, ctrl)) + return; + + domain = msi_get_device_domain(dev, ctrl->domid); + if (!domain) + return; + + info = domain->host_data; + ops = info->ops; + + if (ops->domain_free_irqs) + ops->domain_free_irqs(domain, dev); + else + __msi_domain_free_irqs(dev, domain, ctrl); + + if (ops->msi_post_free) + ops->msi_post_free(domain, dev); + if (info->flags & MSI_FLAG_FREE_MSI_DESCS) - msi_free_msi_descs(dev); + msi_domain_free_descs(dev, ctrl); +} + +/** + * msi_domain_free_irqs_range_locked - Free a range of interrupts from a MSI interrupt domain + * associated to @dev with msi_lock held + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: Id of the interrupt domain to operate on + * @first: First index to free (inclusive) + * @last: Last index to free (inclusive) + */ +void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = first, + .last = last, + }; + msi_domain_free_locked(dev, &ctrl); +} + +/** + * msi_domain_free_irqs_range - Free a range of interrupts from a MSI interrupt domain + * associated to @dev + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: Id of the interrupt domain to operate on + * @first: First index to free (inclusive) + * @last: Last index to free (inclusive) + */ +void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + msi_lock_descs(dev); + msi_domain_free_irqs_range_locked(dev, domid, first, last); + msi_unlock_descs(dev); +} + +/** + * msi_domain_free_irqs_all_locked - Free all interrupts from a MSI interrupt + * associated to a device + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: The id of the domain to operate on + * + * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() + * pair. Use this for MSI irqdomains which implement their own vector + * allocation. + */ +void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid) +{ + msi_domain_free_irqs_range_locked(dev, domid, 0, MSI_MAX_INDEX); +} + +/** + * msi_domain_free_irqs_all - Free all interrupts from a MSI interrupt + * associated to a device + * @dev: Pointer to device struct of the device for which the interrupts + * are freed + * @domid: The id of the domain to operate on + */ +void msi_domain_free_irqs_all(struct device *dev, unsigned int domid) +{ + msi_lock_descs(dev); + msi_domain_free_irqs_range_locked(dev, domid, 0, MSI_MAX_INDEX); + msi_unlock_descs(dev); } /** @@ -1150,18 +1261,7 @@ static void msi_domain_free_msi_descs(st */ void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) { - struct msi_domain_info *info = domain->host_data; - struct msi_domain_ops *ops = info->ops; - - lockdep_assert_held(&dev->msi.data->mutex); - - if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) - return; - - ops->domain_free_irqs(domain, dev); - if (ops->msi_post_free) - ops->msi_post_free(domain, dev); - msi_domain_free_msi_descs(info, dev); + msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, 0, MSI_MAX_INDEX); } /** From patchwork Fri Nov 11 13:57:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18812 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp757896wru; Fri, 11 Nov 2022 06:05:20 -0800 (PST) X-Google-Smtp-Source: AA0mqf5HgDvG/C/+rmIBQSvpigfIo0P6j9VoHe3k8QMzEIo5WEIbHFwUmw2rHJOY6lkuVxWsEQpM X-Received: by 2002:a05:6a00:1c96:b0:563:69ac:2f05 with SMTP id y22-20020a056a001c9600b0056369ac2f05mr2796942pfw.33.1668175520434; Fri, 11 Nov 2022 06:05:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175520; cv=none; d=google.com; s=arc-20160816; b=Md6pU1iFsKtmAgD2YT8sIW2/eguGDhl3ieUUVXIjZvzRwsuykb/AuDxM/u4y3SEMae hL0j/5Iv051WEyjbQBTpYQqIGMiQHD9f62o7UN+YFLQ4A4O9P1ndxAJyo5sWVt3rxPFk xY/0v3UjPwIGdnfxb9ShykOY18BM6uB5o31eaknkQukxE84G2LT/vGFqa9mvllpHrO9z KrHzxDKsLd1kGomst43szkgL3gzJXUav1jR3PNf2mnirwFhxyeedYrak4UiyffcnIygs 6LP4Ba5l5tSzkHigx3PbUtsY3HmRcHuLtSC7gF56rTZaveKUqsRn+oMwxE4nizLt8Wsc Mp0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=Cy+IbXZu7v0yD+kKBOjVnz53NIwuJh9dPYkqbEK4gAs=; b=ykxL8/ON8vj2mP1dAMcrMg84ArQ4555WubUmbTb00N8SlamdO6GAZgiZ/NTgfGIONY yyPqQHvEuODgg7zP01UyuepkMw/Vdi4kt9pg41dwd8OXSW2OLwMDdCmrsyotXgC5+oiF oVB3tniz4KTGaitWn6RCWev0GjVhqVqtC7f/TSoye/LEOQj78KSSu6T/I9gZBzeQVM14 9RgQc2+yzEEC/hhhR7ET4uRhAySGm6bS8jdMXxisezkPixz3Kkc3pLjwuw9Shm+yAqHS 92rAERpQe5XFKaDlCgLfBmPWEh+BvY+4fK4BBsj4faw3D9Za0pwLMWAeTaQAEo7U5LdL DlrA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=auvVZe+Y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=HYRYoCr1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s11-20020a17090aad8b00b00212fa6d38f0si6468529pjq.120.2022.11.11.06.05.04; Fri, 11 Nov 2022 06:05:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=auvVZe+Y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=HYRYoCr1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234279AbiKKODG (ORCPT + 99 others); Fri, 11 Nov 2022 09:03:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234302AbiKKOBf (ORCPT ); Fri, 11 Nov 2022 09:01:35 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21812450A0; Fri, 11 Nov 2022 05:57:04 -0800 (PST) Message-ID: <20221111132706.892426212@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175022; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Cy+IbXZu7v0yD+kKBOjVnz53NIwuJh9dPYkqbEK4gAs=; b=auvVZe+YMf+1A7P9CyuIb68/WeH3rtSPwPyyYE3JWTkwFgTna6TWCrRzmnkH5zPhivGakO AIKnZCVAr77k/fyFsSwvO7ei6V0FFh19YSZdvlRQ6vJJ9JdXoP2NkuKGpZ9Jm1/WrHnYY1 cWceA6fH6h7CT9Ou0rS+tyKuXZ4tcWsTt3uVtXR8WshJ/RDqBfleO28Yco420kT8LLCUlv Hc48i9XZDLjx04fuA9Ucbv0fG8OU66Veu5wd152jUrRoPMGvsEvqcgQh70ed+HZ1cRgIJ6 QWH/BpxJ9pd6/XpyLSs0kqBWCxgMjz4d+XxlF1i5dHQut9OT55+FHQjq8PmBEA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175022; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Cy+IbXZu7v0yD+kKBOjVnz53NIwuJh9dPYkqbEK4gAs=; b=HYRYoCr1//gPOlDhdvqD2d8AifgdDUDvBM5I7O6cnIxOM0/kHQgPbgu5sB3sxH8ck02Qdw dGRq1540KqrO5WBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 15/20] genirq/msi: Provide new domain id allocation functions References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:01 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208814439709157?= X-GMAIL-MSGID: =?utf-8?q?1749208814439709157?= Provide two sorts of interfaces to handle the different use cases: - msi_domain_alloc_irqs_range(): Handles a caller defined precise range - msi_domain_alloc_irqs_all(): Allocates all interrupts associated to a domain by scanning the allocated MSI descriptors The latter is useful for the existing PCI/MSI support which does not have range information available. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 18 ++--- kernel/irq/msi.c | 180 ++++++++++++++++++++++++++++++++++++++++------------ 2 files changed, 149 insertions(+), 49 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -371,8 +371,8 @@ struct msi_domain_info; * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying * irqdomain. * - * @msi_check, @msi_prepare and @set_desc are callbacks used by - * msi_domain_alloc/free_irqs(). + * @msi_check, @msi_prepare and @set_desc are callbacks used by the + * msi_domain_alloc/free_irqs*() variants. * * @domain_alloc_irqs, @domain_free_irqs can be used to override the * default allocation/free functions (__msi_domain_alloc/free_irqs). This @@ -380,11 +380,6 @@ struct msi_domain_info; * be wrapped into the regular irq domains concepts by mere mortals. This * allows to universally use msi_domain_alloc/free_irqs without having to * special case XEN all over the place. - * - * Contrary to other operations @domain_alloc_irqs and @domain_free_irqs - * are set to the default implementation if NULL and even when - * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and - * because these callbacks are obviously mandatory. */ struct msi_domain_ops { irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, @@ -484,14 +479,21 @@ int msi_domain_alloc_irqs_descs_locked(s int nvec); int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); + void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); +int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last); +int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs); + + void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); - void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid); void msi_domain_free_irqs_all(struct device *dev, unsigned int domid); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -24,11 +24,14 @@ * @domid: ID of the domain on which management operations should be done * @first: First (hardware) slot index to operate on * @last: Last (hardware) slot index to operate on + * @nirqs: The number of Linux interrupts to allocate. Can be larger + * than the range due to PCI/multi-MSI. */ struct msi_ctrl { unsigned int domid; unsigned int first; unsigned int last; + unsigned int nirqs; }; static inline int msi_sysfs_create_group(struct device *dev); @@ -582,8 +585,6 @@ static inline int msi_sysfs_populate_des static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { } #endif /* !CONFIG_SYSFS */ -static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); - static struct irq_domain *msi_get_device_domain(struct device *dev, unsigned int domid) { struct irq_domain *domain; @@ -597,7 +598,7 @@ static struct irq_domain *msi_get_device if (!domain) return NULL; - if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) + if (irq_domain_is_msi_parent(domain)) return NULL; return domain; @@ -761,7 +762,6 @@ static struct msi_domain_ops msi_domain_ .msi_init = msi_domain_ops_init, .msi_prepare = msi_domain_ops_prepare, .set_desc = msi_domain_ops_set_desc, - .domain_alloc_irqs = __msi_domain_alloc_irqs, }; static void msi_domain_update_dom_ops(struct msi_domain_info *info) @@ -773,9 +773,6 @@ static void msi_domain_update_dom_ops(st return; } - if (ops->domain_alloc_irqs == NULL) - ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs; - if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS)) return; @@ -986,18 +983,19 @@ static int msi_init_virq(struct irq_doma return 0; } -static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec) +static int __msi_domain_alloc_irqs(struct device *dev, struct irq_domain *domain, + struct msi_ctrl *ctrl) { struct msi_domain_info *info = domain->host_data; + struct xarray *xa = &dev->msi.data->__store; struct msi_domain_ops *ops = info->ops; + unsigned int vflags = 0, allocated = 0; msi_alloc_info_t arg = { }; - unsigned int vflags = 0; + int i, ret, virq, base; struct msi_desc *desc; - int allocated = 0; - int i, ret, virq; + unsigned long idx; - ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg); + ret = msi_domain_prepare_irqs(domain, dev, ctrl->nirqs, &arg); if (ret) return ret; @@ -1023,7 +1021,16 @@ static int __msi_domain_alloc_irqs(struc vflags |= VIRQ_NOMASK_QUIRK; } - msi_for_each_desc(desc, dev, MSI_DESC_NOTASSOCIATED) { + base = ctrl->domid * MSI_XA_DOMAIN_SIZE; + + xa_for_each_range(xa, idx, desc, ctrl->first + base, ctrl->last + base) { + if (!msi_desc_match(desc, MSI_DESC_NOTASSOCIATED)) + continue; + + /* This should return -ECONFUSED... */ + if (WARN_ON_ONCE(allocated >= ctrl->nirqs)) + return -EINVAL; + ops->set_desc(&arg, desc); virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used, @@ -1051,17 +1058,122 @@ static int __msi_domain_alloc_irqs(struc static int msi_domain_alloc_simple_msi_descs(struct device *dev, struct msi_domain_info *info, - unsigned int num_descs) + struct msi_ctrl *ctrl) +{ + if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) + return 0; + + return msi_domain_add_simple_msi_descs(dev, ctrl); +} + +static int __msi_domain_alloc_locked(struct device *dev, struct msi_ctrl *ctrl) +{ + struct msi_domain_info *info; + struct msi_domain_ops *ops; + struct irq_domain *domain; + int ret; + + if (!msi_ctrl_valid(dev, ctrl)) + return -EINVAL; + + domain = msi_get_device_domain(dev, ctrl->domid); + if (!domain) + return -ENODEV; + + info = domain->host_data; + + ret = msi_domain_alloc_simple_msi_descs(dev, info, ctrl); + if (ret) + return ret; + + ops = info->ops; + if (ops->domain_alloc_irqs) + return ops->domain_alloc_irqs(domain, dev, ctrl->nirqs); + + return __msi_domain_alloc_irqs(dev, domain, ctrl); +} + +static int msi_domain_alloc_locked(struct device *dev, struct msi_ctrl *ctrl) +{ + int ret = __msi_domain_alloc_locked(dev, ctrl); + + if (ret) + msi_domain_free_descs(dev, ctrl); + return ret; +} + +/** + * msi_domain_alloc_irqs_range_locked - Allocate interrupts from a MSI interrupt domain + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @first: First index to allocate (inclusive) + * @last: Last index to allocate (inclusive) + * + * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() + * pair. Use this for MSI irqdomains which implement their own descriptor + * allocation/free. + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) { struct msi_ctrl ctrl = { - .domid = MSI_DEFAULT_DOMAIN, - .last = num_descs - 1, + .domid = domid, + .first = first, + .last = last, + .nirqs = last + 1 - first, }; - if (!(info->flags & MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS)) - return 0; + return msi_domain_alloc_locked(dev, &ctrl); +} + +/** + * msi_domain_alloc_irqs_range - Allocate interrupts from a MSI interrupt domain + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @first: First index to allocate (inclusive) + * @last: Last index to allocate (inclusive) + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid, + unsigned int first, unsigned int last) +{ + int ret; + + msi_lock_descs(dev); + ret = msi_domain_alloc_irqs_range_locked(dev, domid, first, last); + msi_unlock_descs(dev); + return ret; +} + +/** + * msi_domain_alloc_irqs_all_locked - Allocate all interrupts from a MSI interrupt domain + * + * @dev: Pointer to device struct of the device for which the interrupts + * are allocated + * @domid: Id of the interrupt domain to operate on + * @nirqs: The number of interrupts to allocate + * + * This function scans all MSI descriptors of the MSI domain and allocates interrupts + * for all unassigned ones. That function is to be used for MSI domain usage where + * the descriptor allocation is handled at the call site, e.g. PCI/MSI[X]. + * + * Return: %0 on success or an error code. + */ +int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs) +{ + struct msi_ctrl ctrl = { + .domid = domid, + .first = 0, + .last = MSI_MAX_INDEX, + .nirqs = nirqs, + }; - return msi_domain_add_simple_msi_descs(dev, &ctrl); + return msi_domain_alloc_locked(dev, &ctrl); } /** @@ -1080,28 +1192,14 @@ static int msi_domain_alloc_simple_msi_d int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, int nvec) { - struct msi_domain_info *info = domain->host_data; - struct msi_domain_ops *ops = info->ops; - int ret; - - lockdep_assert_held(&dev->msi.data->mutex); - - if (WARN_ON_ONCE(irq_domain_is_msi_parent(domain))) { - ret = -EINVAL; - goto free; - } - - /* Frees allocated descriptors in case of failure. */ - ret = msi_domain_alloc_simple_msi_descs(dev, info, nvec); - if (ret) - return ret; + struct msi_ctrl ctrl = { + .domid = MSI_DEFAULT_DOMAIN, + .first = 0, + .last = MSI_MAX_INDEX, + .nirqs = nvec, + }; - ret = ops->domain_alloc_irqs(domain, dev, nvec); - if (!ret) - return 0; -free: - msi_domain_free_irqs_descs_locked(domain, dev); - return ret; + return msi_domain_alloc_locked(dev, &ctrl); } /** From patchwork Fri Nov 11 13:57:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18813 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp758023wru; Fri, 11 Nov 2022 06:05:29 -0800 (PST) X-Google-Smtp-Source: AA0mqf5H4gexj6TnjchNwR2Z4ZTlC9dVu+RwU6vzD2sFWqyDaRX+SRi1WA0uaqmLnRqeSB2tZq4j X-Received: by 2002:a62:1b4c:0:b0:56e:827d:dcce with SMTP id b73-20020a621b4c000000b0056e827ddccemr2816090pfb.51.1668175529226; Fri, 11 Nov 2022 06:05:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175529; cv=none; d=google.com; s=arc-20160816; b=gQyMQm9hKQRU+iSIBJxy1FlYJX4oORpzzb0wzhp89rMFZo59B/LJfl3e+I59T7Tz/W s/MBapEMX1U2KZVo9Ml2+Hl7dbFWJGrvYcGqTIb2Sp0vfqC82z8610jXJF4ihMiSLADC wFoqlhzlAouWV+NoS1ebO1jTm+rEkiEpyM4M8bFMMS3a1ct1+VcPFcUovYElQzgCjfmK 9cIETteknNyfuO7vC12wrDETExkCc0PUtJxgKMDCvypi0o4EiEkmlEEo57BZ8jbCmiUn nYVEPKEIVPC3/8r/1rT3SUB1fvdokH8obr5czs5ojj9Rkz9CbMNpTOqPwDKgb4k1Z+VS y+5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=VMkaJsAvv5jB7N/JTWuE2htyuYhOeUFDVD4O8lwQG4E=; b=JaUX5nb2IIq2SQrBf2YxTpTNV/EVQgK5coSCkKW3tSmOcD0IWqLwwEDX5tctU/SxRy 7hD8BFdi03M8xMd8JOUVFQwofjBaJ4bj3E3j5AXOwa39FNfeQZDodODUIVImM0nze9Zt 11Sndit9OBNvxFIPK7+hlyO7kLhEjMfDHggMOeT0wF9y+lmGH2sRkWbbEG1T75e69TVA OyltglafgHuLs8MBOUNwdYROfZGpmVGTq3TJufgekqPRt10pRCekFRcGiPztzsCUoegr ufeMUUp515rTgIOPk2tjFN09pD4Dq6pfQwXa5RsBfY5LG58UZ7UDZeYmTz+L0GFmD01A kqTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jfMalhWV; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 16/20] PCI/MSI: Use msi_domain_alloc/free_irqs_all_locked() References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:03 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208823542248764?= X-GMAIL-MSGID: =?utf-8?q?1749208823542248764?= Switch to the new domain id aware interfaces to phase out the previous ones. No functional change. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/irqdomain.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -14,7 +14,7 @@ int pci_msi_setup_msi_irqs(struct pci_de domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) - return msi_domain_alloc_irqs_descs_locked(domain, &dev->dev, nvec); + return msi_domain_alloc_irqs_all_locked(&dev->dev, MSI_DEFAULT_DOMAIN, nvec); return pci_msi_legacy_setup_msi_irqs(dev, nvec, type); } @@ -25,7 +25,7 @@ void pci_msi_teardown_msi_irqs(struct pc domain = dev_get_msi_domain(&dev->dev); if (domain && irq_domain_is_hierarchy(domain)) { - msi_domain_free_irqs_descs_locked(domain, &dev->dev); + msi_domain_free_irqs_all_locked(&dev->dev, MSI_DEFAULT_DOMAIN); } else { pci_msi_legacy_teardown_msi_irqs(dev); msi_free_msi_descs(&dev->dev); From patchwork Fri Nov 11 13:57:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18814 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp758069wru; Fri, 11 Nov 2022 06:05:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf7jp2r3qPCapvLysAQl46coPxo365UqxXyLZ5poItKhFr5DPWq7cnbKA0Z4/MYroq2BHBYc X-Received: by 2002:a63:3157:0:b0:473:ef9c:e1e5 with SMTP id x84-20020a633157000000b00473ef9ce1e5mr1769590pgx.241.1668175532704; Fri, 11 Nov 2022 06:05:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175532; cv=none; d=google.com; s=arc-20160816; b=h1HJmzItPUT3Vmi+iM2AKg1m9gZRnZAiux4NEVhYUxKbAIm6k2caZ+bEEBWr92y5jf leHnNxie23wzWD9RPnIRQs+AW/ai2T0zKleDvkl/u5ZLrhfGXEuU4YEiYjtgGusFhCYY PsMw6jpf1RibGQ0TW8Z3+rvtk9rIfijzxFhIxgLvKILkdVGjG3A1ISvDpQJdkMGCWEyk +De814EI7sOTP962rt66DWA8Ti3/k3/u2lDCQpnZOt3frCUJVkmhJh4zmY33zgukgu95 yQrf2+abGwOquF9TDD1JHLp7F0g8N3nEnn++xIHMHUGsQxHbDdp/kNBE4VZmYC3LVkv7 Wm0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=7CXvgfTszY3LslvHbPboJUjb59ZlVQ1XORNlFYSydbs=; b=X0dxpuxmmpOkq1CJ6Pta6WrAZ32KbryQQttr2ofXQ4xJa/dsObKX7lC0FPYiWC53ak 8XVB+zGtGm7A0Z/A1/tmgPggFIMMXMUsxXrv4H0vShsXTrr5R90Ng7nOdIb+OkxBU+Lb rlbIADVdXgH6CKqX+kgHcW++UGs8C6pirTR4A5EGaS3PVE4Y5U/plBt17hVtZMRLcbrU O6/YQiOQZL15OuDoptLPBI6j8M6tdZwoZOYIiYkZUDAm5RbOtoQ75uMQoWydDbRRY38V U3OTAeDpF9EzcvsNi/PwyuII/OfRbpf4oiWUVGNY+x6B+LbxHf5Awr4yLMjJErCeQNAZ c8FQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Agv68rl7; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e17-20020a656891000000b0043c2e57961asi2414891pgt.799.2022.11.11.06.05.10; Fri, 11 Nov 2022 06:05:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Agv68rl7; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234301AbiKKODS (ORCPT + 99 others); Fri, 11 Nov 2022 09:03:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234112AbiKKOBx (ORCPT ); Fri, 11 Nov 2022 09:01:53 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83228845C7; Fri, 11 Nov 2022 05:57:10 -0800 (PST) Message-ID: <20221111132707.005001510@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668175025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=7CXvgfTszY3LslvHbPboJUjb59ZlVQ1XORNlFYSydbs=; b=Agv68rl7CQm4sjgpbWZA2zBJxntMTk8mKSY602PayvrRRyQNfmK6JasYanB3VY9nVbQfDj VlX/FV//rKxxyJc2J6IZvMB/vWG26i5zPuLzap/UX0+J0tw9DaIteiN4sIleRn3ZenaAv3 9ai3s76aknsKpTN3l0Hgi3wSrImjy/D9K4IYYCA3R/qrsSEqz5QK3spbIVbb/L7SCNwK3t G+2MeXJnHh8eljbgb3LsHeb6rEBPGzLfJyLba+yd7Ba7Dk8SEqB6GRhfcJ6mfA3k2XD2XM TPs1i81pOJMIUjQjHlAiFOAzw0ooqh/fpEfnDymEhJVgRgfjeEMxg2j/N43gEg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668175025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=7CXvgfTszY3LslvHbPboJUjb59ZlVQ1XORNlFYSydbs=; b=LgqWWQEySgEZ5F9eCmSn1EOhVpouemmYgUmw/9/nAKuTrgu8/zuhKwoz5e6f1YFwbyYVyh G2q5r5gIL3SLohBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 17/20] platform-msi: Switch to the domain id aware MSI interfaces References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:04 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208827392747520?= X-GMAIL-MSGID: =?utf-8?q?1749208827392747520?= From: Ahmed S. Darwish Switch to the new domain id aware interfaces to phase out the previous ones. No functional change. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- drivers/base/platform-msi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/base/platform-msi.c +++ b/drivers/base/platform-msi.c @@ -213,7 +213,7 @@ int platform_msi_domain_alloc_irqs(struc if (err) return err; - err = msi_domain_alloc_irqs(dev->msi.domain, dev, nvec); + err = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, nvec - 1); if (err) platform_msi_free_priv_data(dev); @@ -227,7 +227,7 @@ EXPORT_SYMBOL_GPL(platform_msi_domain_al */ void platform_msi_domain_free_irqs(struct device *dev) { - msi_domain_free_irqs(dev->msi.domain, dev); + msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN); platform_msi_free_priv_data(dev); } EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs); From patchwork Fri Nov 11 13:57:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18815 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp758244wru; Fri, 11 Nov 2022 06:05:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf46snnTVzUAMS2xnDUfiQ5qnhum/54lnnGHQ0TLCuKUqHfyWzEvu5bFNhYmuubjCDbPLs+R X-Received: by 2002:a63:ba04:0:b0:46f:b2a5:76e8 with SMTP id k4-20020a63ba04000000b0046fb2a576e8mr1848572pgf.235.1668175546848; Fri, 11 Nov 2022 06:05:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175546; cv=none; d=google.com; s=arc-20160816; b=hOStIiqeGzAhlwqxfChoyhVL+r70/l2M0qW4fGvSO8YMO35QkELUJ9Tmpgf3ZyeVG8 ACU5d03MgMJDKfi59AP2joC11kgbELWWhuEqL7eKpa3a9HXASeuulc/8x1eLwR8CCA6F LGwU0idlsph6W+TVGl2n5yKCHfH72FtxPh6mP9BRakFznST/uhuxReYBzYOM+GOJZtfn BUrXFgKrmreM1d973zWle24hdw+iChPzWzLIaM68x8QELgzeMSxlqRkRDB5Mrnlu+emQ jiUxk/QYv/agd1C2ln/+o3JUVar7a1I7d0hULxhgPZI/gtqAP+YEkx7J13A59FviyGrN 631w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=Dc0ZFlk2JAPmF0v24u3+k7yycgC6/ipKg9qXDEwD/vU=; b=Z24GO4MnTab288mFIzZQd9PzhPWRMuxD4tIDuzZ+d4sWUzG7CvQLueG059nCaL6UsI k4nGi2iex5iKpD4VethsDTESlNKg2EpF3dSM7UIIcXtnP5qILpJwPMRNiPqWdxQzVnLE TiX3J+/QfqMpCaaxJlPLhcL1Z32SXTZUansxwyydPOlPbUmU+woWyI6bpeKjHp5+Wjn6 NKMqKG1+ZsB7H6tPsZrim59Tq6m1PZH7FcYUQ9QTPyD4l2jDVE6aa3HIUP4IHPQ/R4Je qI56JePJVPAx72OnA4mCSF2VlSZfCRepA0ewXbqml4nC9PzjdjwEHfb9L+/Oaug1BhSJ v5Aw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=b2qWOR5r; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 18/20] bus: fsl-mc-msi: Switch to domain id aware interfaces References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:06 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208841721759158?= X-GMAIL-MSGID: =?utf-8?q?1749208841721759158?= Switch to the new domain id aware interfaces to phase out the previous ones. Get rid of the MSI descriptor and domain checks as the core code detects these issues anyway. No functional change. Signed-off-by: Thomas Gleixner --- drivers/bus/fsl-mc/fsl-mc-msi.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) --- a/drivers/bus/fsl-mc/fsl-mc-msi.c +++ b/drivers/bus/fsl-mc/fsl-mc-msi.c @@ -213,21 +213,8 @@ struct irq_domain *fsl_mc_find_msi_domai int fsl_mc_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) { - struct irq_domain *msi_domain; - int error; + int error = msi_setup_device_data(dev); - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return -EINVAL; - - error = msi_setup_device_data(dev); - if (error) - return error; - - msi_lock_descs(dev); - if (msi_first_desc(dev, MSI_DESC_ALL)) - error = -EINVAL; - msi_unlock_descs(dev); if (error) return error; @@ -235,7 +222,7 @@ int fsl_mc_msi_domain_alloc_irqs(struct * NOTE: Calling this function will trigger the invocation of the * its_fsl_mc_msi_prepare() callback */ - error = msi_domain_alloc_irqs(msi_domain, dev, irq_count); + error = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, irq_count - 1); if (error) dev_err(dev, "Failed to allocate IRQs\n"); @@ -244,11 +231,5 @@ int fsl_mc_msi_domain_alloc_irqs(struct void fsl_mc_msi_domain_free_irqs(struct device *dev) { - struct irq_domain *msi_domain; - - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return; - - msi_domain_free_irqs(msi_domain, dev); + msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN); } From patchwork Fri Nov 11 13:57:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18819 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp758688wru; Fri, 11 Nov 2022 06:06:25 -0800 (PST) X-Google-Smtp-Source: AA0mqf5N7KEVUFdjPW++/seDi9jhDTnFWln0D8J9JIhKXTiHJfYb44Z6lf+KrnaijJu1CgaRcIf7 X-Received: by 2002:a63:f40a:0:b0:46b:8e9:747 with SMTP id g10-20020a63f40a000000b0046b08e90747mr1804431pgi.365.1668175585148; Fri, 11 Nov 2022 06:06:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175585; cv=none; d=google.com; s=arc-20160816; b=jGo75NmpCfdb7fDLKN6sGlYs/wE3QcgcwQvXZFGUlTd61dRroCt4uoRbFiXZRfSrms poXO1XSc8UOYXPDW2jyx3b4QnVvIu7pBhNGfXtnZwA8ar/rF2Oh6QOm7np+v91EZ6RAn /2lh+oYtcSsbOYjufo5za1KxL84/VonhJSZv4JqCkm+tgSyvksN4qUSLv19tBs5MD8mc jLK5XElrxi09z9mqGQiam3gSpXXBx6d7EKc8lyagQSAGAhHp5+5IcV/KwzUmlT//FIRZ 1UjnWZl/EiIrLUl+rvHoLiAhShv6sDRzjMWFYrsZok381gORMoDgBQLAJC5fSJdjyLCI Qqaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=/bVC6uqxnLqu0Y//SpNf+743RFr9freD3IllzYYvzRs=; b=GJVQ2SZXJW9JM9aRrRhS+1YlGfOXcrA8a5ImAYbhiICpEzfBsqLPRsdYs02yu67f3Q WxVd3cIB5T2OJHlsMv3/182dD6g3Dhqh98zsh7kGicxB5bkMyTDb1r/Vbf7FWP635eUy b3Xkd6400c61taSXkRnw/fDcg6WKnk8lrIU/+J6u0GNxagyIgYn08qnuRS1moHE+3wXi u1YxjYKzPHMLNJuy5lgUDcoTfsZZaO3KQ9wOcGSnbQKNUTYtpmicxmS41Mm7q24E5rZE 3xhCcJ1LkYrRGfKRbl9DGMYiMtrXP+w9WW7fiV/L0Bb05t4v0v+P8I+rB4aIlbEf0V8A rmpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Nfs1lz13; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 19/20] oc: ti: ti_sci_inta_msi: Switch to domain id aware MSI functions References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:07 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208882279352915?= X-GMAIL-MSGID: =?utf-8?q?1749208882279352915?= From: Ahmed S. Darwish Switch to the new domain id aware interfaces to phase out the previous ones. Remove the domain check as it happens in the core code now. No functional change. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner --- drivers/soc/ti/ti_sci_inta_msi.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) --- a/drivers/soc/ti/ti_sci_inta_msi.c +++ b/drivers/soc/ti/ti_sci_inta_msi.c @@ -93,13 +93,8 @@ int ti_sci_inta_msi_domain_alloc_irqs(st struct ti_sci_resource *res) { struct platform_device *pdev = to_platform_device(dev); - struct irq_domain *msi_domain; int ret, nvec; - msi_domain = dev_get_msi_domain(dev); - if (!msi_domain) - return -EINVAL; - if (pdev->id < 0) return -ENODEV; @@ -114,7 +109,8 @@ int ti_sci_inta_msi_domain_alloc_irqs(st goto unlock; } - ret = msi_domain_alloc_irqs_descs_locked(msi_domain, dev, nvec); + /* Use alloc ALL as it's unclear whether there are gaps in the indices */ + ret = msi_domain_alloc_irqs_all_locked(dev, MSI_DEFAULT_DOMAIN, nvec); if (ret) dev_err(dev, "Failed to allocate IRQs %d\n", ret); unlock: From patchwork Fri Nov 11 13:57:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 18817 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp758573wru; Fri, 11 Nov 2022 06:06:16 -0800 (PST) X-Google-Smtp-Source: AA0mqf4aj6IskhjdR2OLDqM6eqdwwLUL0erNHgnBSmoPnTbDooM+Zq64evMMUHetxamkbib5E13z X-Received: by 2002:a17:90b:1055:b0:212:e24e:16b3 with SMTP id gq21-20020a17090b105500b00212e24e16b3mr2054094pjb.69.1668175576057; Fri, 11 Nov 2022 06:06:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668175576; cv=none; d=google.com; s=arc-20160816; b=ku748S2HVUJ67HUVbqfiJHxEFrRyjaZcO6TyOpCW9slNLlBhnjMDfbfF4t9ruv3xoX oPdHto29izsPebargSAmm9z1Mt6GtgOmMtHKLMJoz7uDVu6PmuhEptiVkNwFWm1rgkdO yzl/XvrhNzYoSFGo9HP+hUm9sdmpkDaE5FHzYUXcwNGB8hyxj/7ZjyPuusSFOrugSVyC pQruHfAGNS9WhtBG1+qqYgXihmq17lQ65GH5x10QHHgefldbGUY+vDX6ACqJ9How425I hWx9lp1bHQw1ZE41JX1xaJxbELTv1M8ws4f5YdfM/dQaCvVT3bTpxZsZVlgjOAoGfQAg JHOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=g3DkOoVQZpocmCUdq743KlTbhHv6STUDcTyWXV9U3+I=; b=lUq9mAqTVonqNOsHnnNw9uoo/SsOHUA8M+9Y+LQwKM97GlE5GAnhuVVmD+RI7C/2LS qOmSI6LH1qWIyWCRnM87BLaCK29HnMvQvh9/zyOzTbeTRVQMi5lUAEhCRbpzATm54Lbr L8MquhjlK1R+6+SDZebodZkV6fPmQg+kk256vPuSKC410Q0iglz+KvS82szy/zoFqUmS YGSD7+zVyXpDEILxYJ/f/Jm34Q8WjR74HwMk9YTvRiIoKedRjQBGoHMEoX6hWdkz6ibO nSKLeA92BgDw8WMT3majIXTAtBcYJ5yqcFVPdKF8bqlunNj4Oog9Kj8EpK2aZt6FYs22 EM7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=aIItsgd6; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=UmDlpU1z; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Darwish" , Reinette Chatre Subject: [patch 20/20] genirq/msi: Remove unused alloc/free interfaces References: <20221111131813.914374272@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:57:09 +0100 (CET) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749208872340537610?= X-GMAIL-MSGID: =?utf-8?q?1749208872340537610?= Now that all users are converted remove the old interfaces. Signed-off-by: Thomas Gleixner --- include/linux/msi.h | 7 ---- kernel/irq/msi.c | 73 ---------------------------------------------------- 2 files changed, 80 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -475,13 +475,6 @@ int msi_domain_set_affinity(struct irq_d struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec); -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec); - -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, unsigned int first, unsigned int last); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -1176,51 +1176,6 @@ int msi_domain_alloc_irqs_all_locked(str return msi_domain_alloc_locked(dev, &ctrl); } -/** - * msi_domain_alloc_irqs_descs_locked - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from - * @dev: Pointer to device struct of the device for which the interrupts - * are allocated - * @nvec: The number of interrupts to allocate - * - * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() - * pair. Use this for MSI irqdomains which implement their own vector - * allocation/free. - * - * Return: %0 on success or an error code. - */ -int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, - int nvec) -{ - struct msi_ctrl ctrl = { - .domid = MSI_DEFAULT_DOMAIN, - .first = 0, - .last = MSI_MAX_INDEX, - .nirqs = nvec, - }; - - return msi_domain_alloc_locked(dev, &ctrl); -} - -/** - * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain - * @domain: The domain to allocate from - * @dev: Pointer to device struct of the device for which the interrupts - * are allocated - * @nvec: The number of interrupts to allocate - * - * Return: %0 on success or an error code. - */ -int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec) -{ - int ret; - - msi_lock_descs(dev); - ret = msi_domain_alloc_irqs_descs_locked(domain, dev, nvec); - msi_unlock_descs(dev); - return ret; -} - static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain, struct msi_ctrl *ctrl) { @@ -1347,34 +1302,6 @@ void msi_domain_free_irqs_all(struct dev msi_unlock_descs(dev); } -/** - * msi_domain_free_irqs_descs_locked - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts - * @dev: Pointer to device struct of the device for which the interrupts - * are free - * - * Must be invoked from within a msi_lock_descs() / msi_unlock_descs() - * pair. Use this for MSI irqdomains which implement their own vector - * allocation. - */ -void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev) -{ - msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, 0, MSI_MAX_INDEX); -} - -/** - * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated to @dev - * @domain: The domain to managing the interrupts - * @dev: Pointer to device struct of the device for which the interrupts - * are free - */ -void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) -{ - msi_lock_descs(dev); - msi_domain_free_irqs_descs_locked(domain, dev); - msi_unlock_descs(dev); -} - /** * msi_get_domain_info - Get the MSI interrupt domain info for @domain * @domain: The interrupt domain to retrieve data from