From patchwork Fri Dec 15 18:53:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Edwin Lu X-Patchwork-Id: 179514 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp9503614dys; Fri, 15 Dec 2023 10:54:03 -0800 (PST) X-Google-Smtp-Source: AGHT+IHbTitBoKZN5BBhD0LwfupRjYQ2lhVggDmK2ophXNQB0CDl8Zy/VhRijZ3KxaP4lPVwMI6s X-Received: by 2002:a0c:f84f:0:b0:67e:fbf9:75f with SMTP id g15-20020a0cf84f000000b0067efbf9075fmr4389926qvo.79.1702666443140; Fri, 15 Dec 2023 10:54:03 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702666443; cv=pass; d=google.com; s=arc-20160816; b=Slr3VwuUGd7AMY6UmfxYv41H3noUbZ4dvfOb2tjoGTqgIpuM0N5by0xQn4twLRe4HH j5zakS+0Pz4dUwGnCgT32inrbSAQ+nT/soM8gBB7Iyf5x8G9htlV69SpTNP+aSh7D0WR 9VKudWNvFc0r4o8lZNspTmWGqjSQmwJN/zHQw36c0tgyKpQWM03ao89rilzhehKNA5gQ XfnKKW9oXFFMCiX/eAwFVKtJ/PlYarldqHI6tsQHQAcX2AfoJTPnno/w2/I4/uEZInbV 3yBFa8/7zOyFhAA01cZfU9kF5bRbMvAm1YYeYmx1JYFKThlqVdq2BKAF/INE604Hck3E qUyw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=ZEuqgGuLDmsq57tJ4jQmd6fZfuzdn3ikc3B97K6sx0Q=; fh=lboOQTAvwFYLZqx2ochlETp/rK4xRvoD+5V5F3p3ZHM=; b=Jd89E9EE789gL+Qlev0ZJzS+LoQD1uqUPWKJf9JWX9wkVsNQzOI9oNwY6exfqqjzif q1g3uh2mKkWmqdzikSq8fw7HZ97UvD5MWtBmBjjK/uwcLxwLLTufEz/3LN309jMNgyrK 8SfvtKcUPLB0HWZ/UKD5YZzrZhzPnFjNYitj+KziPVFM8GA12nQq0Z0iYIKYBf/OrBuA SeF7jaq9UDF/O+4naZer2QTjlcOsWzk9rgXICqHWMMZswEicm1wpOaQ5+mQx3qMLUHqr jgyk83O5+XMHiN+vWuyqZ+/QbKFZOWR2j3HBb9iVM9jD984EptrhkJRL93VSjqW/J6zb smPA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=gvw9LMCr; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id u19-20020a0cdd13000000b0067aa42b58a3si2725788qvk.497.2023.12.15.10.54.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:54:03 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=gvw9LMCr; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D6DA33865490 for ; Fri, 15 Dec 2023 18:54:02 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oi1-x229.google.com (mail-oi1-x229.google.com [IPv6:2607:f8b0:4864:20::229]) by sourceware.org (Postfix) with ESMTPS id 47D3A384F4A0 for ; Fri, 15 Dec 2023 18:53:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 47D3A384F4A0 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 47D3A384F4A0 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::229 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666419; cv=none; b=pccy2QDOct8VGa+VcWPJwQFBQJbDXnRo+7UlhW+BJKxPNRic1J4YFhxmnXu8ZYWm3XdSkaxyodmpuqT9DhUs0QbruQNOgG1PEfsNYJHfeZogflqGij/3hLDC8ngntR4eQcgQHqBQL0/bUHeUg3wdX323IyQaep3Q0TR92SUgqd8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666419; c=relaxed/simple; bh=/1Uqw0NoWz4wv4c0VztdZrdvpKwfy1qWRVcOhx4/fks=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=tpKa3vuvsrDV9EUOjWiKYunT0cWj/0Ggzg8rGEZqg4B7A5RcieIenLuvpHLDJcX842g+YwEXNkJI+iYOqp1sLkdfhkxNwTsiTI/TTuH6N/vyN3IGMJA+uQ4R+UiHKfSBFT8WfDhugLfFI95BteTtT5S27KGF1YRYsIecG3yrsvY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x229.google.com with SMTP id 5614622812f47-3b86f3cdca0so768996b6e.3 for ; Fri, 15 Dec 2023 10:53:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1702666415; x=1703271215; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZEuqgGuLDmsq57tJ4jQmd6fZfuzdn3ikc3B97K6sx0Q=; b=gvw9LMCrmulr+GSm6E6/ZP3fw+UkRun3HSVexZ+tGp06QWyhe0x0ZQMXhd1KyV4+GI m343J2KtjJoEetq57fMMTPT+shKgyAapbPaUaakjb2lCSZE82BXDDaiCueeA9SAXQf5r r7F4YhCBresurX011Uif6w2T9hoDX2Nc4rdOzuCH8GoaS09BtNT3g1wjAlOtX3q2/RHS YAddzc1CXTPaV3fe6x8yF9pglD633PNADFTpOcrec5dZIqJty6Pn8z/vPzhKmVgiUOdk i+5F8E2F7UIHgYr/kN7h/L1mPA+dMC41kfDy+bOpIvWoR2/446bkLxpM1r7fVZxeYugl dUyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702666415; x=1703271215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZEuqgGuLDmsq57tJ4jQmd6fZfuzdn3ikc3B97K6sx0Q=; b=PP0Znt/uVN9VSMIVB3EEcj4LVT4qSYi80T6nq/oIx8WGiRbtD/dtPWw/uyi2mF9te3 RLTlcQZ5hnt8JcdDkSsm25HP+VfhU2KvYsDu8KrfK41PC4IeoN0q24Ptrcc3K0PXvZ6r 1eUfsCUpT6hQo7HOqFQYME+KPf2DHFDQzMYqAUfIbIUNpTH+onrqV+NdMiJ548JOiEDP GcqK8FPXnNk08rOglnbQMco2i3NZ0el9J9Zf0b6Wq2sHao8MkqpSZO0+5FixEStlamRD 8BYpGbt9hQyqJ31WSTtWaYryXADbaRVKUWg8VBPIl2BXdwcRypyr8GrWWb7K/yWBDZfs uMuw== X-Gm-Message-State: AOJu0Yz2bNXqM9eXZ/NL9sBxbUYtPJOC2EtGO6RpQfMCL2dewzii8vOg aJSDpR4qB0JkN1yL177VycKzO40N4c1GybLNZKo= X-Received: by 2002:a05:6808:1449:b0:3b8:b063:8249 with SMTP id x9-20020a056808144900b003b8b0638249mr16338529oiv.75.1702666415577; Fri, 15 Dec 2023 10:53:35 -0800 (PST) Received: from ewlu.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id s17-20020a056808209100b003b6caf2accfsm3867639oiw.22.2023.12.15.10.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:53:35 -0800 (PST) From: Edwin Lu To: gcc-patches@gcc.gnu.org Cc: gnu-toolchain@rivosinc.com, kito.cheng@gmail.com, jeffreyalaw@gmail.com, Edwin Lu Subject: [PATCH 1/3][RFC] RISC-V: Add non-vector types to pipelines Date: Fri, 15 Dec 2023 10:53:26 -0800 Message-Id: <20231215185328.794425-2-ewlu@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231215185328.794425-1-ewlu@rivosinc.com> References: <20231215185328.794425-1-ewlu@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785375167929199039 X-GMAIL-MSGID: 1785375167929199039 This patch does not create vector related insn reservations for generic.md and sifive-7.md. It updates/creates insn reservations for all non-vector typed insns gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): create/update reservation (generic_ooo_branch): ditto * config/riscv/generic.md (generic_sfb_alu): ditto * config/riscv/sifive-7.md (sifive_7_popcount): ditto Signed-off-by: Edwin Lu --- gcc/config/riscv/generic-ooo.md | 16 +++++++++++++--- gcc/config/riscv/generic.md | 13 +++++++++---- gcc/config/riscv/sifive-7.md | 12 +++++++++--- 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/gcc/config/riscv/generic-ooo.md b/gcc/config/riscv/generic-ooo.md index 78b9e48f935..de93245f965 100644 --- a/gcc/config/riscv/generic-ooo.md +++ b/gcc/config/riscv/generic-ooo.md @@ -95,7 +95,7 @@ (define_insn_reservation "generic_ooo_float_store" 6 ;; Vector load/store (define_insn_reservation "generic_ooo_vec_load" 6 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr")) + (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr,rdfrm")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") (define_insn_reservation "generic_ooo_vec_store" 6 @@ -115,9 +115,19 @@ (define_insn_reservation "generic_ooo_vec_loadstore_seg" 10 (define_insn_reservation "generic_ooo_alu" 1 (and (eq_attr "tune" "generic_ooo") (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\ - move,bitmanip,min,max,minu,maxu,clz,ctz")) + move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,condmove,cbo,mvpair,zicond")) "generic_ooo_issue,generic_ooo_ixu_alu") +(define_insn_reservation "generic_ooo_sfb_alu" 2 + (and (eq_attr "tune" "generic_ooo") + (eq_attr "type" "sfb_alu")) + "generic_ooo_issue,generic_ooo_ixu_alu") + +;; Branch instructions +(define_insn_reservation "generic_ooo_branch" 1 + (and (eq_attr "tune" "generic_ooo") + (eq_attr "type" "branch,jump,call,jalr,ret,trap,pushpop")) + "generic_ooo_issue,generic_ooo_ixu_alu") ;; Float move, convert and compare. (define_insn_reservation "generic_ooo_float_move" 3 @@ -184,7 +194,7 @@ (define_insn_reservation "generic_ooo_popcount" 2 (define_insn_reservation "generic_ooo_vec_alu" 3 (and (eq_attr "tune" "generic_ooo") (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,\ - vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov")) + vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector float comparison, conversion etc. diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md index 88940483829..3e49d942495 100644 --- a/gcc/config/riscv/generic.md +++ b/gcc/config/riscv/generic.md @@ -27,7 +27,7 @@ (define_cpu_unit "fdivsqrt" "pipe0") (define_insn_reservation "generic_alu" 1 (and (eq_attr "tune" "generic") - (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,cpop")) + (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,rotate,atomic,condmove,crypto,mvpair,zicond")) "alu") (define_insn_reservation "generic_load" 3 @@ -42,17 +42,22 @@ (define_insn_reservation "generic_store" 1 (define_insn_reservation "generic_xfer" 3 (and (eq_attr "tune" "generic") - (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp")) + (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp,cbo")) "alu") (define_insn_reservation "generic_branch" 1 (and (eq_attr "tune" "generic") - (eq_attr "type" "branch,jump,call,jalr")) + (eq_attr "type" "branch,jump,call,jalr,ret,trap,pushpop")) + "alu") + +(define_insn_reservation "generic_sfb_alu" 2 + (and (eq_attr "tune" "generic") + (eq_attr "type" "sfb_alu")) "alu") (define_insn_reservation "generic_imul" 10 (and (eq_attr "tune" "generic") - (eq_attr "type" "imul,clmul")) + (eq_attr "type" "imul,clmul,cpop")) "imuldiv*10") (define_insn_reservation "generic_idivsi" 34 diff --git a/gcc/config/riscv/sifive-7.md b/gcc/config/riscv/sifive-7.md index a63394c8c58..65d27cf6dc9 100644 --- a/gcc/config/riscv/sifive-7.md +++ b/gcc/config/riscv/sifive-7.md @@ -34,7 +34,7 @@ (define_insn_reservation "sifive_7_fpstore" 1 (define_insn_reservation "sifive_7_branch" 1 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "branch")) + (eq_attr "type" "branch,ret,trap")) "sifive_7_B") (define_insn_reservation "sifive_7_sfb_alu" 2 @@ -44,7 +44,7 @@ (define_insn_reservation "sifive_7_sfb_alu" 2 (define_insn_reservation "sifive_7_jump" 1 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "jump,call,jalr")) + (eq_attr "type" "jump,call,jalr,pushpop")) "sifive_7_B") (define_insn_reservation "sifive_7_mul" 3 @@ -59,7 +59,7 @@ (define_insn_reservation "sifive_7_div" 16 (define_insn_reservation "sifive_7_alu" 2 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "unknown,arith,shift,slt,multi,logical,move")) + (eq_attr "type" "unknown,arith,shift,slt,multi,logical,move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,cbo,atomic,condmove,crypto,mvpair,zicond")) "sifive_7_A|sifive_7_B") (define_insn_reservation "sifive_7_load_immediate" 1 @@ -106,6 +106,12 @@ (define_insn_reservation "sifive_7_f2i" 3 (eq_attr "type" "mfc")) "sifive_7_A") +;; Popcount and clmul. +(define_insn_reservation "sifive_7_popcount" 2 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "cpop,clmul")) + "sifive_7_A") + (define_bypass 1 "sifive_7_load,sifive_7_alu,sifive_7_mul,sifive_7_f2i,sifive_7_sfb_alu" "sifive_7_alu,sifive_7_branch") From patchwork Fri Dec 15 18:53:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Edwin Lu X-Patchwork-Id: 179515 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp9503891dys; Fri, 15 Dec 2023 10:54:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IEcUqLpeqxNx5H7ekwB7bfWdGKfUbpbT5k2TNwpZN3Ij79B0f+8jP1aTMqsq19ywWAaVgD1 X-Received: by 2002:ac8:5741:0:b0:425:8637:f81d with SMTP id 1-20020ac85741000000b004258637f81dmr17438189qtx.27.1702666470412; Fri, 15 Dec 2023 10:54:30 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702666470; cv=pass; d=google.com; s=arc-20160816; b=Gexke2M/Q+8zKlzRnXH7uUzn+GLRFkdpJNjRDxAfi9Uomn80iRbxJVV49WnvPSiN9l CyzrUU0rldzjz5zYNOrPIa2mEMUwoZ3et58p6Iyhlr3cg4xkKmlrWdjk9HvD91y4d02w 34uD2gTVYLxRFeOSCRqw4S57cmHrmI9ty/D0EQb5IT1cs3zNW+dsLgp/+CtFMqPa8aU3 zIN2OFjgJl1HhKdWYbsTqOV8J42ojUv/MRmKQY8Q9FLUeAC5mF6nbPm8JP5zJFUHNrPZ 86phBnznSwavHrjWVF8bD81dcpd1FTIL0BC4KTq/lpu8B4iodJpU6dL5KikV/iiUN4Br bX0A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=9vAPZpje6BLhNRL1nqobVaYT/XBfRgWXBcU+0Nijo1s=; fh=VoL0BJQ/iBePdW03qSNITGXX9k6OtZx69nEPUA3mlS8=; b=Y5O/R/EiQLnwpRZwMmS2GzJw0YdGG3hx3RIvRV3xInNsGBRmuh0bhehFiHt3Ti8WwG 1WQtl/eULe889RX7tpxjXV0HDFXjCDf2OibVefN+u/Rr1xvFtlspU52sv4mvYKaMMPLc R5HUuILqXIVUR7LAdFsSLooq6VtbJlsOBbHXY/EARpgEtZ0nF7HoVceW+a/GrFmgRTJD DXfdF6uQsc5YH4skObmOdlsVbu9LjDQ9ZRcFzF/h//Z/XNEmYsC/MLIR518HTfx9hfHb 2JR87bsyOqjyIvt6nlzJO3nXkjxezv1NXzyx3qcnZBnAq7kAub5w3sZ0DglnwRWqwWzm NpMA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=p9okHA0y; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id p22-20020a05622a00d600b00425f0ca874csi6734732qtw.324.2023.12.15.10.54.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:54:30 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=p9okHA0y; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 26B40384CB94 for ; Fri, 15 Dec 2023 18:54:30 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by sourceware.org (Postfix) with ESMTPS id 2ADAA384CB85 for ; Fri, 15 Dec 2023 18:53:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2ADAA384CB85 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 2ADAA384CB85 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::231 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666422; cv=none; b=nAoQ74gDMds5w5fHBwbrnMz2MFDgWbL6K6TJCu+oJgW7kh3V4bnm73AF9vEIdhD4NyIkt3OOSoDFusYAIWbz1Ssf+pBJXrSQjKwQe6YJad45O4xfgrFAMdZNmB36+wM14Obw38AWyTWo6lchvXEoxsmDxmBWJhhSou3i+KLu8j4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666422; c=relaxed/simple; bh=Rgg8buXdoosA6asmzWRKOlUDoDFLv3GFMfUxxCOcD0M=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=DNAQzPS/ej/upbqNL+ReRXbGxsSTiS0FJH3RjkgkgEY8Mz2mYRwCfw0woMHMlQHIK0agxB4GSTXkaIjUdOkMlEUO7MasEDdnC7eOC5Q4VcaIyvS5XCtBoTKeTJWz7ENOlwWPDNUUbTcnJg1aMHiUK5lp3my7QlZTyNtUBF134B8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x231.google.com with SMTP id 5614622812f47-3ba0d0a72dfso889246b6e.1 for ; Fri, 15 Dec 2023 10:53:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1702666418; x=1703271218; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9vAPZpje6BLhNRL1nqobVaYT/XBfRgWXBcU+0Nijo1s=; b=p9okHA0yuz9SGRJYLpwOuVPbWZjueScqeGnDPWsuilCL/cTTVsenQTZdoowwgKkfkk ql+AwaoooWNghYzvi5LXKm08usVRmIvf3azIm5CagGQf/r9Ho+6SmXcyRtH/JBKWA+HM yeOJy0X383n+9GSf6sFGupRclQcgWZpV22Tevith3+tMeSfMTOatHn4GnCxKJrnTIzhD Vg5XEvmTHmiljVLXqpnsMZHqs42toUnnEbeUfLvYjuwSXzbK2VdSS5nM4I6NPSGlZNgL 4NoIm9BNeStxQUHsH+AINSU6zk2ivA3K4KOffxerKkN+Vt7e2bV1pUjA5s5Qg7R6opTH fTvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702666418; x=1703271218; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9vAPZpje6BLhNRL1nqobVaYT/XBfRgWXBcU+0Nijo1s=; b=c/zZrP9c6boQASXqpim+sMJXpd9qQFePyUY1R/4plbC/LKZxN7JoSfLskUr3vFEQF/ w023MHTUDeoVxzgInWDOaDPFkeeYaVeuUF7GnHXOhZMt2/do7wIjPibXM36CY8trgE6N ZIB6DgNfKQkooK6A+HsUMX7/NJzT8fgy7zIU5gGq+1w+getlSYIlt3ORomNvyGsyzkLw dLmWcXVRQmEJ8e2MHNSmCBtf0q6xNDffe9HfjHv88b7H0Y/xiS7zSugN8bI+OpEa0dGB A2EGiYLS8p3t3WXFR2kA/00NypDVi0J+OhKOkEz/7/xdbhAfr8kahXdfxKsi3WYniDRg P1FA== X-Gm-Message-State: AOJu0Yyr2FnI6CoNm+vxxPrLRaNp2CBXhRvzuwNeHiMLaFuci+0VPE7L 4aW7iTCqy8WOdvHPTp12eUkL1ZkhT/dC6HxXNAw= X-Received: by 2002:a05:6808:384b:b0:3ba:41f5:2221 with SMTP id ej11-20020a056808384b00b003ba41f52221mr580681oib.54.1702666418235; Fri, 15 Dec 2023 10:53:38 -0800 (PST) Received: from ewlu.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id s17-20020a056808209100b003b6caf2accfsm3867639oiw.22.2023.12.15.10.53.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:53:37 -0800 (PST) From: Edwin Lu To: gcc-patches@gcc.gnu.org Cc: gnu-toolchain@rivosinc.com, kito.cheng@gmail.com, jeffreyalaw@gmail.com, Edwin Lu , Robin Dapp Subject: [PATCH 2/3][RFC] RISC-V: Add vector related reservations Date: Fri, 15 Dec 2023 10:53:27 -0800 Message-Id: <20231215185328.794425-3-ewlu@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231215185328.794425-1-ewlu@rivosinc.com> References: <20231215185328.794425-1-ewlu@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785375196341622587 X-GMAIL-MSGID: 1785375196341622587 This patch copies the vector reservations from generic-ooo.md and inserts them into generic.md and sifive.md. The vector pipelines are necessary to avoid an ICE from the assert gcc/ChangeLog: * config/riscv/generic-ooo.md: syntax * config/riscv/generic.md (pipe0): new reservation (generic_vec_load): ditto (generic_vec_store): ditto (generic_vec_loadstore_seg): ditto (generic_generic_vec_alu): ditto (generic_vec_fcmp): ditto (generic_vec_imul): ditto (generic_vec_fadd): ditto (generic_vec_fmul): ditto (generic_crypto): ditto (generic_vec_perm): ditto (generic_vec_reduction): ditto (generic_vec_ordered_reduction): ditto (generic_vec_idiv): ditto (generic_vec_float_divsqrt): ditto (generic_vec_mask): ditto (generic_vec_vesetvl): ditto (generic_vec_setrm): ditto (generic_vec_readlen): ditto * config/riscv/sifive-7.md (sifive_7): new reservation (sifive_7_vec_load): ditto (sifive_7_vec_store): ditto (sifive_7_vec_loadstore_seg): ditto (sifive_7_sifive_7_vec_alu): ditto (sifive_7_vec_fcmp): ditto (sifive_7_vec_imul): ditto (sifive_7_vec_fadd): ditto (sifive_7_vec_fmul): ditto (sifive_7_crypto): ditto (sifive_7_vec_perm): ditto (sifive_7_vec_reduction): ditto (sifive_7_vec_ordered_reduction): ditto (sifive_7_vec_idiv): ditto (sifive_7_vec_float_divsqrt): ditto (sifive_7_vec_mask): ditto (sifive_7_vec_vesetvl): ditto (sifive_7_vec_setrm): ditto (sifive_7_vec_readlen): ditto Signed-off-by: Edwin Lu Co-authored-by: Robin Dapp --- gcc/config/riscv/generic-ooo.md | 19 ++--- gcc/config/riscv/generic.md | 118 ++++++++++++++++++++++++++++++++ gcc/config/riscv/sifive-7.md | 118 ++++++++++++++++++++++++++++++++ 3 files changed, 242 insertions(+), 13 deletions(-) diff --git a/gcc/config/riscv/generic-ooo.md b/gcc/config/riscv/generic-ooo.md index de93245f965..18b606bb981 100644 --- a/gcc/config/riscv/generic-ooo.md +++ b/gcc/config/riscv/generic-ooo.md @@ -106,16 +106,14 @@ (define_insn_reservation "generic_ooo_vec_store" 6 ;; Vector segment loads/stores. (define_insn_reservation "generic_ooo_vec_loadstore_seg" 10 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vlsegde,vlsegds,vlsegdux,vlsegdox,vlsegdff,\ - vssegte,vssegts,vssegtux,vssegtox")) + (eq_attr "type" "vlsegde,vlsegds,vlsegdux,vlsegdox,vlsegdff,vssegte,vssegts,vssegtux,vssegtox")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Generic integer instructions. (define_insn_reservation "generic_ooo_alu" 1 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\ - move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,condmove,cbo,mvpair,zicond")) + (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,condmove,cbo,mvpair,zicond")) "generic_ooo_issue,generic_ooo_ixu_alu") (define_insn_reservation "generic_ooo_sfb_alu" 2 @@ -193,16 +191,13 @@ (define_insn_reservation "generic_ooo_popcount" 2 ;; Regular vector operations and integer comparisons. (define_insn_reservation "generic_ooo_vec_alu" 3 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,\ - vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) + (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector float comparison, conversion etc. (define_insn_reservation "generic_ooo_vec_fcmp" 3 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vfrecp,vfminmax,vfcmp,vfsgnj,vfclass,vfcvtitof,\ - vfcvtftoi,vfwcvtitof,vfwcvtftoi,vfwcvtftof,vfncvtitof,\ - vfncvtftoi,vfncvtftof")) + (eq_attr "type" "vfrecp,vfminmax,vfcmp,vfsgnj,vfclass,vfcvtitof,vfcvtftoi,vfwcvtitof,vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector integer multiplication. @@ -232,8 +227,7 @@ (define_insn_reservation "generic_ooo_crypto" 4 ;; Vector permute. (define_insn_reservation "generic_ooo_perm" 3 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vimerge,vfmerge,vslideup,vslidedown,vislide1up,\ - vislide1down,vfslide1up,vfslide1down,vgather,vcompress")) + (eq_attr "type" "vimerge,vfmerge,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,vgather,vcompress")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector reduction. @@ -265,8 +259,7 @@ (define_insn_reservation "generic_ooo_vec_float_divsqrt" 16 ;; Vector mask operations. (define_insn_reservation "generic_ooo_vec_mask" 2 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,\ - vfmovvf,vfmovfv")) + (eq_attr "type" "vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,vfmovvf,vfmovfv")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector vsetvl. diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md index 3e49d942495..7ac974ad634 100644 --- a/gcc/config/riscv/generic.md +++ b/gcc/config/riscv/generic.md @@ -25,6 +25,15 @@ (define_cpu_unit "alu" "pipe0") (define_cpu_unit "imuldiv" "pipe0") (define_cpu_unit "fdivsqrt" "pipe0") +;; Separate issue queue for vector instructions. +(define_cpu_unit "generic_vec_issue" "pipe0") + +;; Vector alu unit +(define_cpu_unit "generic_vec_alu" "pipe0") + +;; Vector mult/div/sqrt unit +(define_cpu_unit "generic_vec_multi" "pipe0") + (define_insn_reservation "generic_alu" 1 (and (eq_attr "tune" "generic") (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,rotate,atomic,condmove,crypto,mvpair,zicond")) @@ -93,3 +102,112 @@ (define_insn_reservation "generic_fsqrt" 25 (and (eq_attr "tune" "generic") (eq_attr "type" "fsqrt")) "fdivsqrt*25") + +;; Vector load/store +(define_insn_reservation "generic_vec_load" 6 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr,rdfrm")) + "generic_vec_issue,generic_vec_alu") + +(define_insn_reservation "generic_vec_store" 6 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vste,vstm,vsts,vstux,vstox,vstr")) + "generic_vec_issue,generic_vec_alu") + +;; Vector segment loads/stores. +(define_insn_reservation "generic_vec_loadstore_seg" 10 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vlsegde,vlsegds,vlsegdux,vlsegdox,vlsegdff,vssegte,vssegts,vssegtux,vssegtox")) + "generic_vec_issue,generic_vec_alu") + +;; Regular vector operations and integer comparisons. +(define_insn_reservation "generic_generic_vec_alu" 3 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) + "generic_vec_issue,generic_vec_alu") + +;; Vector float comparison, conversion etc. +(define_insn_reservation "generic_vec_fcmp" 3 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vfrecp,vfminmax,vfcmp,vfsgnj,vfclass,vfcvtitof,vfcvtftoi,vfwcvtitof,vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof")) + "generic_vec_issue,generic_vec_alu") + +;; Vector integer multiplication. +(define_insn_reservation "generic_vec_imul" 4 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vimul,viwmul,vimuladd,viwmuladd,vsmul")) + "generic_vec_issue,generic_vec_alu") + +;; Vector float addition. +(define_insn_reservation "generic_vec_fadd" 4 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vfalu,vfwalu")) + "generic_vec_issue,generic_vec_alu") + +;; Vector float multiplication and FMA. +(define_insn_reservation "generic_vec_fmul" 6 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vfmul,vfwmul,vfmuladd,vfwmuladd")) + "generic_vec_issue,generic_vec_alu") + +;; Vector crypto, assumed to be a generic operation for now. +(define_insn_reservation "generic_crypto" 4 + (and (eq_attr "tune" "generic") + (eq_attr "type" "crypto")) + "generic_vec_issue,generic_vec_alu") + +;; Vector permute. +(define_insn_reservation "generic_vec_perm" 3 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vimerge,vfmerge,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,vgather,vcompress")) + "generic_vec_issue,generic_vec_alu") + +;; Vector reduction. +(define_insn_reservation "generic_vec_reduction" 8 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vired,viwred,vfredu,vfwredu")) + "generic_vec_issue,generic_vec_multi") + +;; Vector ordered reduction, assume the latency number is for +;; a 128-bit vector. It is scaled in riscv_sched_adjust_cost +;; for larger vectors. +(define_insn_reservation "generic_vec_ordered_reduction" 10 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vfredo,vfwredo")) + "generic_vec_issue,generic_vec_multi*3") + +;; Vector integer division, assume not pipelined. +(define_insn_reservation "generic_vec_idiv" 16 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vidiv")) + "generic_vec_issue,generic_vec_multi*3") + +;; Vector float divisions and sqrt, assume not pipelined. +(define_insn_reservation "generic_vec_float_divsqrt" 16 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vfdiv,vfsqrt")) + "generic_vec_issue,generic_vec_multi*3") + +;; Vector mask operations. +(define_insn_reservation "generic_vec_mask" 2 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,vfmovvf,vfmovfv")) + "generic_vec_issue,generic_vec_alu") + +;; Vector vsetvl. +(define_insn_reservation "generic_vec_vesetvl" 1 + (and (eq_attr "tune" "generic") + (eq_attr "type" "vsetvl,vsetvl_pre")) + "generic_vec_issue") + +;; Vector rounding mode setters, assume pipeline barrier. +(define_insn_reservation "generic_vec_setrm" 20 + (and (eq_attr "tune" "generic") + (eq_attr "type" "wrvxrm,wrfrm")) + "generic_vec_issue,generic_vec_issue*3") + +;; Vector read vlen/vlenb. +(define_insn_reservation "generic_vec_readlen" 4 + (and (eq_attr "tune" "generic") + (eq_attr "type" "rdvlenb,rdvl")) + "generic_vec_issue,generic_vec_issue") diff --git a/gcc/config/riscv/sifive-7.md b/gcc/config/riscv/sifive-7.md index 65d27cf6dc9..bb71d1c5207 100644 --- a/gcc/config/riscv/sifive-7.md +++ b/gcc/config/riscv/sifive-7.md @@ -12,6 +12,15 @@ (define_cpu_unit "sifive_7_B" "sifive_7") (define_cpu_unit "sifive_7_idiv" "sifive_7") (define_cpu_unit "sifive_7_fpu" "sifive_7") +;; Separate issue queue for vector instructions. +(define_cpu_unit "sifive_7_vec_issue" "sifive_7") + +;; Vector alu unit +(define_cpu_unit "sifive_7_vec_alu" "sifive_7") + +;; Vector mult/div/sqrt unit +(define_cpu_unit "sifive_7_vec_multi" "sifive_7") + (define_insn_reservation "sifive_7_load" 3 (and (eq_attr "tune" "sifive_7") (eq_attr "type" "load")) @@ -112,6 +121,115 @@ (define_insn_reservation "sifive_7_popcount" 2 (eq_attr "type" "cpop,clmul")) "sifive_7_A") +;; Vector load/store +(define_insn_reservation "sifive_7_vec_load" 6 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr,rdfrm")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +(define_insn_reservation "sifive_7_vec_store" 6 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vste,vstm,vsts,vstux,vstox,vstr")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector segment loads/stores. +(define_insn_reservation "sifive_7_vec_loadstore_seg" 10 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vlsegde,vlsegds,vlsegdux,vlsegdox,vlsegdff,vssegte,vssegts,vssegtux,vssegtox")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Regular vector operations and integer comparisons. +(define_insn_reservation "sifive_7_sifive_7_vec_alu" 3 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector float comparison, conversion etc. +(define_insn_reservation "sifive_7_vec_fcmp" 3 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vfrecp,vfminmax,vfcmp,vfsgnj,vfclass,vfcvtitof,vfcvtftoi,vfwcvtitof,vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector integer multiplication. +(define_insn_reservation "sifive_7_vec_imul" 4 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vimul,viwmul,vimuladd,viwmuladd,vsmul")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector float addition. +(define_insn_reservation "sifive_7_vec_fadd" 4 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vfalu,vfwalu")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector float multiplication and FMA. +(define_insn_reservation "sifive_7_vec_fmul" 6 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vfmul,vfwmul,vfmuladd,vfwmuladd")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector crypto, assumed to be a generic operation for now. +(define_insn_reservation "sifive_7_crypto" 4 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "crypto")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector permute. +(define_insn_reservation "sifive_7_vec_perm" 3 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vimerge,vfmerge,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,vgather,vcompress")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector reduction. +(define_insn_reservation "sifive_7_vec_reduction" 8 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vired,viwred,vfredu,vfwredu")) + "sifive_7_vec_issue,sifive_7_vec_multi") + +;; Vector ordered reduction, assume the latency number is for +;; a 128-bit vector. It is scaled in riscv_sched_adjust_cost +;; for larger vectors. +(define_insn_reservation "sifive_7_vec_ordered_reduction" 10 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vfredo,vfwredo")) + "sifive_7_vec_issue,sifive_7_vec_multi*3") + +;; Vector integer division, assume not pipelined. +(define_insn_reservation "sifive_7_vec_idiv" 16 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vidiv")) + "sifive_7_vec_issue,sifive_7_vec_multi*3") + +;; Vector float divisions and sqrt, assume not pipelined. +(define_insn_reservation "sifive_7_vec_float_divsqrt" 16 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vfdiv,vfsqrt")) + "sifive_7_vec_issue,sifive_7_vec_multi*3") + +;; Vector mask operations. +(define_insn_reservation "sifive_7_vec_mask" 2 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,vfmovvf,vfmovfv")) + "sifive_7_vec_issue,sifive_7_vec_alu") + +;; Vector vsetvl. +(define_insn_reservation "sifive_7_vec_vesetvl" 1 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "vsetvl,vsetvl_pre")) + "sifive_7_vec_issue") + +;; Vector rounding mode setters, assume pipeline barrier. +(define_insn_reservation "sifive_7_vec_setrm" 20 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "wrvxrm,wrfrm")) + "sifive_7_vec_issue,sifive_7_vec_issue*3") + +;; Vector read vlen/vlenb. +(define_insn_reservation "sifive_7_vec_readlen" 4 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "rdvlenb,rdvl")) + "sifive_7_vec_issue,sifive_7_vec_issue") + (define_bypass 1 "sifive_7_load,sifive_7_alu,sifive_7_mul,sifive_7_f2i,sifive_7_sfb_alu" "sifive_7_alu,sifive_7_branch") From patchwork Fri Dec 15 18:53:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Edwin Lu X-Patchwork-Id: 179516 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp9504165dys; Fri, 15 Dec 2023 10:54:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IH/fe2G5kGGKiKCa3+sZlQ+0jwYsolACLuD3QLIW1eWThsoPjczGzOmEP5D3yx9JExj88x9 X-Received: by 2002:ad4:40c5:0:b0:67f:21a:d4eb with SMTP id x5-20020ad440c5000000b0067f021ad4ebmr4431656qvp.43.1702666499519; Fri, 15 Dec 2023 10:54:59 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702666499; cv=pass; d=google.com; s=arc-20160816; b=YHlNfFD+fgaIGXHn+aPUKwwAVMM+o+m0AbH/oTe3jHTLLyaPmFD9NsD5YcLNdEtiOa TS798Nn2EPQpysPHpImrIOeNL8Y0xNXGSBZCg5hkRfKaVhDPvilKLm32V87yPBjh2qDd HXzNeXdriZTwFtqvXPbpnxlinDGH4MBUEfr8zyReqH0iq0UEAnP7MOU/9uAbG/bVvGkS rA242aHs3CbRByrhVG+LUfXmcO0casnh68lWYjxh6L6vrY94R5nvu6+xMYmQGdbeUm5D sRNLAwDEKzZZ/0wSBmpM4aqmRzISrdYn3R1/3LnhmVlRB5Tm6FaY8PAVGKytCeWZxK4i N3hw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=1UM5J76VVxuC9Kg6zyjG4VlQ84Rn7fzO0JZP9i0nwqw=; fh=lboOQTAvwFYLZqx2ochlETp/rK4xRvoD+5V5F3p3ZHM=; b=Q/pGNAGP1u+tuOsUlQLFJtj3MpOVXemzL/DSkRS4bqrUN970osseTIsUdTnOZzZu2I LA/s2KYePtQznfN2wX0FX7WhptYWBCOX/Tu+tXTB14VTV+dQGGcr0Ju1Brp6FtitGoak RwuYWtfEUf6c82TEOJ5diAsA6SunJy0Vcb7K7gYWAd20/R/MXCJzB2qAuvwUKwwIDUPY mjCFB6qm6G/p+ABaxOVn383DZ8hvxj9UQvuKvu5+Rge/FHapXl5H63R+O9znEPHaMNen z9dcVR+fmIJ2glbqVX6Yf1yiDdME16SmsgFDArBjJtO4r+T9Bt8znhXBfTCXqttPm0HE YzQw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=k73N0xYP; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id k22-20020a05620a415600b0077d856c0562si17546978qko.322.2023.12.15.10.54.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:54:59 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=k73N0xYP; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3DB933858286 for ; Fri, 15 Dec 2023 18:54:59 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oi1-x22d.google.com (mail-oi1-x22d.google.com [IPv6:2607:f8b0:4864:20::22d]) by sourceware.org (Postfix) with ESMTPS id 5EF32384CB94 for ; Fri, 15 Dec 2023 18:53:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5EF32384CB94 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5EF32384CB94 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::22d ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666422; cv=none; b=cGCyeZ4/AgImNj4AoE9Z4sJx29BOCfjZH1tWkvNg/2dtc/SU/JgVYS17BVZVzlBOTqWnBOa7f663/bwvQ5aya0R32/OIWjyzpMgOwqCzH47urYRCkCRHV62Kuiy6Icio8WmhqA0/U/QlAMiKHQKKZAB12nQg+bEtqMMQJjUyVaU= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666422; c=relaxed/simple; bh=pr/M0QPydpN+q/m8mC65Jdytw6QRRSBNOpUwinxQK4E=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=a0myYNtUgoULg4aGpwDGlZ/boKbVzFShFI//1Wm72Y9QvZc2nq5+rkbtL627iL7lgyCrxakyj8xZ2tIubhQrgrv7STL8Jai5q+eNZwin9JpFjJI9kxIPakAQEWQ5wPoS7MY3tySAqzvkFPPEZwGkQ0EA07n5BUsChqparnKf5Gk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x22d.google.com with SMTP id 5614622812f47-3b86f3cdca0so769051b6e.3 for ; Fri, 15 Dec 2023 10:53:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1702666420; x=1703271220; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1UM5J76VVxuC9Kg6zyjG4VlQ84Rn7fzO0JZP9i0nwqw=; b=k73N0xYP/kP4Mjg0lkGaKHwPCgSsrk97MKwA4vGfX3/WrPaA3P+ABrjrJmUGixKAYC dsmlsjJUmetKPdO2qVy44+1hzJFT/pC9uQoXcPblLvVCqRHcNBjp/kFVDqf9G6VamF69 GdQppNsEoktBFYgxEK2FXCipqyRBRZBKPaHqBgPGg4sAEJVxhcbSZp0IDhRRdhcyOggC xDH5e/rI2znshaGtq+kJ0ED5kC3zvXBxJV9/xnRTFBLxReDkWp8+bfWxKtTITUoepFkN VE7WgmjdbKxvqALFBd4Eh1q6Z2vqvurT/aX5PYGoUNLxJVieO0GGcSOfxPMTU36XiSAV 95fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702666420; x=1703271220; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1UM5J76VVxuC9Kg6zyjG4VlQ84Rn7fzO0JZP9i0nwqw=; b=kUWJ1FXKYi8toVlwN55GGLrpZJOqXzO9Er81n+IdmLhe6RjUV0gM0qBjRzkPSbWqNF Z4KRCDe6VOyxVW/7zlRNAKopVukNHSTMW1/CH8ixmZ2tELy6tVKeLcWUNZmWt5p7B0id EiBAcgFi9nIUof/Ff8ZqElegD/A60yjLyB/9pUbleXoiyKnQmnZrlfJcsJag5b2mioz4 eAlN7Wc+nEnQco3cnr3ChotAjVTYGZCM7BS1LWcf6CWj8TVSFLSa6qsHZyJFKGASgGDf 8k1HArX0mPTgsswhGrY0/u2vugDT67OFIneP7B0X67yJxPRIz/GtzglvBKST4d3AxuF2 taiQ== X-Gm-Message-State: AOJu0YwJw+TxZmjbtWhZpmL6+tEIjsIqZm4veFg851ELOAA0zONBqP5Y nQRYrJ7/Ed/+mhL4XAcd9W2mFLdFZu8bqnvuNWA= X-Received: by 2002:a05:6808:2e92:b0:3b9:fee4:5b3e with SMTP id gt18-20020a0568082e9200b003b9fee45b3emr16063654oib.82.1702666420677; Fri, 15 Dec 2023 10:53:40 -0800 (PST) Received: from ewlu.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id s17-20020a056808209100b003b6caf2accfsm3867639oiw.22.2023.12.15.10.53.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:53:40 -0800 (PST) From: Edwin Lu To: gcc-patches@gcc.gnu.org Cc: gnu-toolchain@rivosinc.com, kito.cheng@gmail.com, jeffreyalaw@gmail.com, Edwin Lu Subject: [PATCH 3/3][RFC] RISC-V: Enable assert for insn_has_dfa_reservation Date: Fri, 15 Dec 2023 10:53:28 -0800 Message-Id: <20231215185328.794425-4-ewlu@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231215185328.794425-1-ewlu@rivosinc.com> References: <20231215185328.794425-1-ewlu@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785375227151076881 X-GMAIL-MSGID: 1785375227151076881 Enables assert that every typed instruction is associated with a dfa reservation gcc/ChangeLog: * config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert Signed-off-by: Edwin Lu --- gcc/config/riscv/riscv.cc | 2 -- 1 file changed, 2 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index ab0f95e5fe9..3adeb415bec 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -8048,9 +8048,7 @@ riscv_sched_variable_issue (FILE *, int, rtx_insn *insn, int more) /* If we ever encounter an insn without an insn reservation, trip an assert so we can find and fix this problem. */ -#if 0 gcc_assert (insn_has_dfa_reservation_p (insn)); -#endif return more - 1; }