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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id z4-20020a0cd784000000b0067ed227e3e9si8729953qvi.448.2023.12.13.17.54.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 17:54:11 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C294138618E8 for ; Thu, 14 Dec 2023 01:54:10 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 0D7C7385E449 for ; Thu, 14 Dec 2023 01:54:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0D7C7385E449 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0D7C7385E449 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702518844; cv=none; b=jKZHvtHpRusdR3GE0yKU3RyJnLVqAMEKI41DYx2QszFYAw6UaZbIl8yrAFup68ILXmjs6S6l+1UKocr3hIf2Xpdkcw2QAiSggrsrM6c89ZEO/nKwVgfIAL/TuzNA/yl36/PAbH1LOlmE1JB9WDfh8TrVg9fnETWB/AiflpbxfaI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702518844; c=relaxed/simple; bh=+cTSkvhEXmQDjJlYrwczz2Jv/k/OQyH7RABVPEXqpDY=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=a2g8Kr8qo20ms8qMTYAqQmp0bTHb8OOY1AA5wS3kIEcOXxnXQ5hkyD3wRKFII4gzLen3WVfNN9Jz/KQqTssgXJL2vpBOjHKMzE3A17vM00q4doVBUxDb601tqMHC3MoKf401ip0uJIUCKFoniID/Bwoi1LkOR9/H5ACuFE3+HXk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8Cx+ug1YHpl5OIAAA--.5227S3; Thu, 14 Dec 2023 09:53:57 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxrnM0YHplq28DAA--.18452S2; Thu, 14 Dec 2023 09:53:56 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, mengqinggang Subject: [PATCH v1] LoongArch: Add support for the third expression of .align for R_LARCH_ALIGN Date: Thu, 14 Dec 2023 09:53:54 +0800 Message-Id: <20231214015354.791925-1-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxrnM0YHplq28DAA--.18452S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW3AFW8XF47Ar48uw47GFW7Awc_yoWDJw43pr y7Zr9xtFW8CFn7W3Wqy345uw45Xw1xCFW2qayftw1Ikr4kJr9Yqw18ArW3WayDWw40k3yr Zr10qay5ZFykA3cCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkjb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AK xVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I 0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j8yCJUUUUU= X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785220406671070067 X-GMAIL-MSGID: 1785220406671070067 If the symbol index is not zero, the addend is used to represent the first and the third expressions of the .align. The lowest 8 bits are used to represent the first expression. Other bits are used to represent the third expression. The addend of R_LARCH_ALIGN for ".align 5, ,4" is 0x405. The addend of R_LARCH_ALIGN for ".balign 32, ,4" is 0x405. --- bfd/elfnn-loongarch.c | 45 ++++++++++++++----- gas/config/tc-loongarch.c | 13 ++++-- gas/config/tc-loongarch.h | 4 +- gas/testsuite/gas/loongarch/relax_align.d | 47 ++++++++++++-------- gas/testsuite/gas/loongarch/relax_align.s | 4 +- ld/testsuite/ld-loongarch-elf/relax-align.dd | 5 ++- ld/testsuite/ld-loongarch-elf/relax-align.s | 5 ++- ld/testsuite/ld-loongarch-elf/relax.exp | 2 +- 8 files changed, 86 insertions(+), 39 deletions(-) diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index 024c5d4cd96..4e6ef4f61c7 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -3852,11 +3852,21 @@ loongarch_relax_align (bfd *abfd, asection *sec, bfd_vma symval) { bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; - bfd_vma alignment = 1, pos; - while (alignment <= rel->r_addend) - alignment *= 2; + bfd_vma alignment = 1, pos, max = 0, addend; - symval -= rel->r_addend; + int index = ELFNN_R_SYM (rel->r_info); + if (index > 0) + { + alignment = 1 << (rel->r_addend & 0xff); + max = rel->r_addend >> 8; + } + else + while (alignment <= rel->r_addend) + alignment *= 2; + + addend = alignment - 4; + + symval -= addend; bfd_vma aligned_addr = ((symval - 1) & ~(alignment - 1)) + alignment; bfd_vma nop_bytes = aligned_addr - symval; @@ -3864,22 +3874,25 @@ loongarch_relax_align (bfd *abfd, asection *sec, sec->sec_flg0 = true; /* Make sure there are enough NOPs to actually achieve the alignment. */ - if (rel->r_addend < nop_bytes) + if (addend < nop_bytes) { _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): %" PRId64 " bytes required for alignment " "to %" PRId64 "-byte boundary, but only %" PRId64 " present"), abfd, sym_sec, (uint64_t) rel->r_offset, - (int64_t) nop_bytes, (int64_t) alignment, (int64_t) rel->r_addend); + (int64_t) nop_bytes, (int64_t) alignment, (int64_t) addend); bfd_set_error (bfd_error_bad_value); return false; } - /* Delete the reloc. */ rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE); + if (max > 0 && nop_bytes > max) + return loongarch_relax_delete_bytes (abfd, sec, rel->r_offset, + addend, link_info); + /* If the number of NOPs is already correct, there's nothing to do. */ - if (nop_bytes == rel->r_addend) + if (nop_bytes == addend) return true; /* Write as many LOONGARCH NOPs as we need. */ @@ -3888,7 +3901,7 @@ loongarch_relax_align (bfd *abfd, asection *sec, /* Delete the excess NOPs. */ return loongarch_relax_delete_bytes (abfd, sec, rel->r_offset + nop_bytes, - rel->r_addend - nop_bytes, link_info); + addend - nop_bytes, link_info); } static bool @@ -3939,6 +3952,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, asection *sym_sec; bfd_vma symval; unsigned long r_symndx = ELFNN_R_SYM (rel->r_info); + unsigned long r_type = ELFNN_R_TYPE (rel->r_info); bool local_got = false; char symtype; struct elf_link_hash_entry *h = NULL; @@ -3950,7 +3964,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC) continue; - if (sym->st_shndx == SHN_UNDEF) + if (sym->st_shndx == SHN_UNDEF || R_LARCH_ALIGN == r_type) { sym_sec = sec; symval = rel->r_offset; @@ -4005,12 +4019,21 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, if (symtype != STT_SECTION) symval += rel->r_addend; } + /* For R_LARCH_ALIGN, symval is sec_addr(sym_sec) + rel->r_offset + + (alingmeng - 4). + If r_symndx is 0, alignmeng-4 is r_addend. + If r_symndx > 0, alignment-4 is 2^(r_addend & 0xff)-4. */ + if (R_LARCH_ALIGN == r_type) + if (r_symndx > 0) + symval += ((1 << (rel->r_addend & 0xff)) - 4); + else + symval += rel->r_addend; else symval += rel->r_addend; symval += sec_addr (sym_sec); - switch (ELFNN_R_TYPE (rel->r_info)) + switch (r_type) { case R_LARCH_ALIGN: if (1 == info->relax_pass) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index 59232832cf7..99c0ac47418 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -1648,12 +1648,14 @@ loongarch_make_nops (char *buf, bfd_vma bytes) the correct alignment now because of other linker relaxations. */ bool -loongarch_frag_align_code (int n) +loongarch_frag_align_code (int n, int max) { bfd_vma bytes = (bfd_vma) 1 << n; bfd_vma insn_alignment = 4; bfd_vma worst_case_bytes = bytes - insn_alignment; char *nops; + + symbolS *s; expressionS ex; /* If we are moving to a smaller alignment than the instruction size, then no @@ -1667,8 +1669,13 @@ loongarch_frag_align_code (int n) nops = frag_more (worst_case_bytes); - ex.X_op = O_constant; - ex.X_add_number = worst_case_bytes; + s = symbol_find (".Lla-relax-align"); + if (s == NULL) + s = colon (".Lla-relax-align"); + ex.X_add_symbol = s; + + ex.X_op = O_symbol; + ex.X_add_number = (max << 8) | n; loongarch_make_nops (nops, worst_case_bytes); diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h index 4afa38422d6..194ee107c0a 100644 --- a/gas/config/tc-loongarch.h +++ b/gas/config/tc-loongarch.h @@ -49,11 +49,11 @@ extern int loongarch_relax_frag (asection *, struct frag *, long); #define md_undefined_symbol(name) (0) #define md_operand(x) -extern bool loongarch_frag_align_code (int); +extern bool loongarch_frag_align_code (int, int); #define md_do_align(N, FILL, LEN, MAX, LABEL) \ if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \ { \ - if (loongarch_frag_align_code (N)) \ + if (loongarch_frag_align_code (N, MAX)) \ goto LABEL; \ } diff --git a/gas/testsuite/gas/loongarch/relax_align.d b/gas/testsuite/gas/loongarch/relax_align.d index 1810eb4cae7..d870e983bb6 100644 --- a/gas/testsuite/gas/loongarch/relax_align.d +++ b/gas/testsuite/gas/loongarch/relax_align.d @@ -1,4 +1,4 @@ -#as: +#as: --no-warn #objdump: -dr #skip: loongarch32-*-* @@ -7,20 +7,31 @@ Disassembly of section .text: -00000000.* : -[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+L1 -[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -[ ]+4:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+L1 -[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -[ ]+8:[ ]+03400000[ ]+nop[ ]+ -[ ]+8:[ ]+R_LARCH_ALIGN[ ]+\*ABS\*\+0xc -[ ]+c:[ ]+03400000[ ]+nop[ ]+ -[ ]+10:[ ]+03400000[ ]+nop[ ]+ -[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -[ ]+14:[ ]+R_LARCH_PCALA_HI20[ ]+L1 -[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -[ ]+18:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -[ ]+18:[ ]+R_LARCH_PCALA_LO12[ ]+L1 -[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* +.* <.Lla-relax-align-0x14>: +[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0, 0 +[ ]+0: R_LARCH_PCALA_HI20[ ]+L1 +[ ]+0: R_LARCH_RELAX[ ]+\*ABS\* +[ ]+4:[ ]+02c00084[ ]+addi.d[ ]+\$a0, \$a0, 0 +[ ]+4: R_LARCH_PCALA_LO12[ ]+L1 +[ ]+4: R_LARCH_RELAX[ ]+\*ABS\* +[ ]+8:[ ]+03400000[ ]+nop.* +[ ]+8: R_LARCH_ALIGN[ ]+.Lla-relax-align\+0x4 +[ ]+c:[ ]+03400000[ ]+nop.* +[ ]+10:[ ]+03400000[ ]+nop.* +0000000000000014 <.Lla-relax-align>: +[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0, 0 +[ ]+14: R_LARCH_PCALA_HI20[ ]+L1 +[ ]+14: R_LARCH_RELAX[ ]+\*ABS\* +[ ]+18:[ ]+02c00084[ ]+addi.d[ ]+\$a0, \$a0, 0 +[ ]+18: R_LARCH_PCALA_LO12[ ]+L1 +[ ]+18: R_LARCH_RELAX[ ]+\*ABS\* +[ ]+1c:[ ]+03400000[ ]+nop.* +[ ]+1c: R_LARCH_ALIGN[ ]+.Lla-relax-align\+0x404 +[ ]+20:[ ]+03400000[ ]+nop.* +[ ]+24:[ ]+03400000[ ]+nop.* +[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0, 0 +[ ]+28: R_LARCH_PCALA_HI20[ ]+L1 +[ ]+28: R_LARCH_RELAX[ ]+\*ABS\* +[ ]+2c:[ ]+02c00084[ ]+addi.d[ ]+\$a0, \$a0, 0 +[ ]+2c: R_LARCH_PCALA_LO12[ ]+L1 +[ ]+2c: R_LARCH_RELAX[ ]+\*ABS\* diff --git a/gas/testsuite/gas/loongarch/relax_align.s b/gas/testsuite/gas/loongarch/relax_align.s index 3880d783e79..c0177c88fc1 100644 --- a/gas/testsuite/gas/loongarch/relax_align.s +++ b/gas/testsuite/gas/loongarch/relax_align.s @@ -1,5 +1,7 @@ .text -L1: +.L1: la.local $a0, L1 .align 4 la.local $a0, L1 + .align 4, , 4 + la.local $a0, L1 diff --git a/ld/testsuite/ld-loongarch-elf/relax-align.dd b/ld/testsuite/ld-loongarch-elf/relax-align.dd index 5fce2255dda..37fdab18fab 100644 --- a/ld/testsuite/ld-loongarch-elf/relax-align.dd +++ b/ld/testsuite/ld-loongarch-elf/relax-align.dd @@ -1,7 +1,8 @@ #... .*pcaddi.* -.*pcaddi.* .*nop.* +.*pcaddi.* .*nop.* -.*0:.*pcaddi.* +.*pcaddi.* +.*pcaddi.* #pass diff --git a/ld/testsuite/ld-loongarch-elf/relax-align.s b/ld/testsuite/ld-loongarch-elf/relax-align.s index 9617c02d8e5..66dfea8f2c9 100644 --- a/ld/testsuite/ld-loongarch-elf/relax-align.s +++ b/ld/testsuite/ld-loongarch-elf/relax-align.s @@ -4,6 +4,9 @@ .text L1: la.local $a0, L1 + .align 3 la.local $a0, L1 - .align 4 + .align 3, ,4 + la.local $a0, L1 + .align 3, ,2 la.local $a0, L1 diff --git a/ld/testsuite/ld-loongarch-elf/relax.exp b/ld/testsuite/ld-loongarch-elf/relax.exp index 24d79ed5c20..77323d8d7a3 100644 --- a/ld/testsuite/ld-loongarch-elf/relax.exp +++ b/ld/testsuite/ld-loongarch-elf/relax.exp @@ -121,7 +121,7 @@ if [istarget loongarch64-*-*] { [list \ "loongarch relax-align" \ "-e 0x0 -z relro" "" \ - "" \ + "--no-warn" \ {relax-align.s} \ [list \ [list objdump -d relax-align.dd] \