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The integration for this SoC is somewhat different here: It needs the PHY's reference clock rate to calculate the ddc bus frequency correctly. This clock is part of a power-domain (PD_VIO), so this gets added as an optional property too. Signed-off-by: Alex Bee --- .../display/rockchip/rockchip,inno-hdmi.yaml | 30 +++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml index 96889c86849a..9f00abcbfb38 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - rockchip,rk3036-inno-hdmi + - rockchip,rk3128-inno-hdmi reg: maxItems: 1 @@ -22,10 +23,21 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: The HDMI controller main clock + - description: The HDMI PHY reference clock clock-names: - const: pclk + minItems: 1 + items: + - const: pclk + - enum: + - pclk + - ref + + power-domains: + maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -55,6 +67,20 @@ required: - pinctrl-names - ports +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3128-inno-hdmi + + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + additionalProperties: false examples: From patchwork Wed Dec 13 19:51:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178274 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030348dys; Wed, 13 Dec 2023 11:51:51 -0800 (PST) X-Google-Smtp-Source: AGHT+IHP/nuKRLgejuCYEmHxVteuu7ncuWq8cDbWBCKnP6hJtjLQp+qOySxv7jIWu9GFm+PlXGfl X-Received: by 2002:a17:90a:e544:b0:28a:d241:eea9 with SMTP id ei4-20020a17090ae54400b0028ad241eea9mr2137244pjb.82.1702497111282; Wed, 13 Dec 2023 11:51:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497111; cv=none; d=google.com; s=arc-20160816; b=N4q2pixXlL5vo2D4j/qjldnKlbp8jXdocVXZ+IjV4w5oeO4C3iGDrrXmUytdBMZ1D9 LpRM3K3sG4QTzLrSvI6GRV7rvX+xlFy4dp/GA5bBn66QxgIzxSwZ4GrFBwn7R2whgKbk /H4faegxFXH0lod+yM0vf/DvUTd/voLMpzNJ2XYzoWQ6vpcOPcASJvT2YaIDG1neWlh1 0UFtbuVCQiLlFrFHY9LJ7sarOjLQqProchRVWdu0hbWGtWalBSnFa9WIoKYFvRuwCTSV OQXpYhkKL493N9r2F6ZR+WQ49mBXH8habZEak/RcUuhIWGJn1jVZYHVlgHce7TsdrR7t wZSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FrtW0qmKYRNQLQV31syGJ5EsohgiI927CfneGFLgIjg=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=fsepPoJnCKdLeUO4F2IV11hyfbcqYlLR+aTryloPs8su/wo7Fukab/wZJFGoNx7JJ5 E2Jtw69YNRMLi9AmUrI4AYLEWkD4+oRmGLI2RVDHELqeg3x0og/wSF+DPwGQxhkFGriZ b2qwACKSY37Ps+xSScNeaGm790KB+3xtsCrX9bvtA/JzyXqWGpPxYnQPgp+GlLX+OqI2 v7RPBB+e1GmDosQCZCzrX3I1UYl0Ue5N1ktKntz/DQNdLTx53bSDP8urlK8WJUywmLjj qqGKsLV0N8+HcDKOq0qEoKu1XE8ER5JeYHnMBpKOp1JskyXjup3flytX5Wk7IwAUy+h2 BK+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=Mrd6M3Pt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from pete.vger.email (pete.vger.email. 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Wed, 13 Dec 2023 11:51:27 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 02/11] drm/rockchip: vop: Add output selection registers for RK312x Date: Wed, 13 Dec 2023 20:51:16 +0100 Message-ID: <20231213195125.212923-3-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:51:46 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197610890140272 X-GMAIL-MSGID: 1785197610890140272 In contrast to RK3036, RK312x SoCs have multiple output channels such as RGB (i.e. LVDS TTL), LVDS, DSI and HDMI. In order to support that, this adds a new vop_output struct for rk3126_vop with the registers required to enable the appropriate output and setup the correct polarity. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 13 ++++++++++++- drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 3 +++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index c51ca82320cb..b9ee02061d5b 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -227,11 +227,22 @@ static const struct vop_win_data rk3126_vop_win_data[] = { .type = DRM_PLANE_TYPE_CURSOR }, }; +static const struct vop_output rk3126_output = { + .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4), + .hdmi_pin_pol = VOP_REG(RK3126_INT_SCALER, 0x7, 4), + .hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22), + .hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23), + .rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24), + .rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25), + .mipi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28), + .mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29), +}; + static const struct vop_data rk3126_vop = { .intr = &rk3036_intr, .common = &rk3036_common, .modeset = &rk3036_modeset, - .output = &rk3036_output, + .output = &rk3126_output, .win = rk3126_vop_win_data, .win_size = ARRAY_SIZE(rk3126_vop_win_data), .max_output = { 1920, 1080 }, diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h index 406e981c75bd..fbf1bcc68625 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -872,6 +872,9 @@ /* rk3036 register definition end */ /* rk3126 register definition */ +#define RK3126_INT_SCALER 0x0c + +/* win1 register */ #define RK3126_WIN1_MST 0x4c #define RK3126_WIN1_DSP_INFO 0x50 #define RK3126_WIN1_DSP_ST 0x54 From patchwork Wed Dec 13 19:51:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178280 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030555dys; Wed, 13 Dec 2023 11:52:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IHSSA9jhyBu/sG9B6DoNgD7blZ2fs56r7yIVxts67Rt2Ol3/3VN9xmS7hqU5kfphKAC2w8r X-Received: by 2002:a05:6a20:96db:b0:18f:97c:4f53 with SMTP id hq27-20020a056a2096db00b0018f097c4f53mr4381643pzc.95.1702497137950; Wed, 13 Dec 2023 11:52:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497137; cv=none; d=google.com; s=arc-20160816; b=lqesjgOUTh+Mfu/GN1HMh6uBdFCZcMrHL+nbPq5pB0nkdXXZEWdC+iWz/m8pwDXVA3 HabGdeZZoIU/fymf1sJ9YI9tsMIRNqJCNT38q8KnRRF8OKd/nqanSboKJXfVmG6fKKum n4lxPvKrWlACL50wFJ9/ZN2hJitwYOHl2ko9hIxymooefzZzGxAdEFGl6KDpQ6uJbUn1 pkJhjN0D+ji9EkfkR2QTndtVvYZQd2AO3kudYwnZ+NvxucYHkw09eaKm3xLzfzdI39GG Whx6NUdVwgUSVcg41yFP3UO2DWkIq68Ek9aFkRg0dshDmFCrJSg1PwBQWV9WCDnW6PCb eIUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5MfDHxrabIf+gmAYTXlhPOQXkHPRDrfLTxd0p36e6Hg=; fh=3pXLQkDnu6mfL79fDWl5gUQ2rlGZpcfH88MDE/DTze4=; b=PFLeyk8a8yoCLJmovu3T/X+cqBQBWfe2xeOwh+jMTFj4WJFrgSMB19xPEy8XqHAGHZ JyB1MBb6jussYxZI+hddqukNC4bm8WCeP8ajrAnkJsr7QE+zSuihN7AWF86pi95ymsja avtPeNPZt7odzb1h3WW7l5jptWi6Wj0sg+pJ/4R5Smkx8U+gQDE+kv6pi9dAfJ+QSec2 1rX9mIoSctKxDbX17OnhxrxawxiK/jhHfhpGSgbH0b6H9BtrQpRWiN0y1nbOQl7ARD2g 1trcw83SOUpGFOqi+K0+VTJa08TmlsmW6SVCB3vCF0Descz/sJ1zNP3+K6NiM9thTHGJ Yk+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=dTDxRp59; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. 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Otherwise the signal is very unstable for certain non-VIC modes. See downstream commit [0] [0] https://github.com/rockchip-linux/kernel/commit/8eb559f2502c Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") Co-developed-by: Zheng Yang Signed-off-by: Zheng Yang Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 6e5b922a121e..345253e033c5 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -412,7 +412,7 @@ static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi, hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF); - value = mode->hsync_start - mode->hdisplay; + value = mode->htotal - mode->hsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF); @@ -427,7 +427,7 @@ static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi, value = mode->vtotal - mode->vdisplay; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF); - value = mode->vsync_start - mode->vdisplay; + value = mode->vtotal - mode->vsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF); value = mode->vsync_end - mode->vsync_start; From patchwork Wed Dec 13 19:51:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178282 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030562dys; Wed, 13 Dec 2023 11:52:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IGqI/RauuhoJf54/Bh8RP3B0sjepxGgyOEdpxFN02xF+hBaqzIv6wLGNm6q12QGAoFUG/Zs X-Received: by 2002:a05:6a20:5656:b0:18f:97c:4f6c with SMTP id is22-20020a056a20565600b0018f097c4f6cmr4514290pzc.120.1702497138773; Wed, 13 Dec 2023 11:52:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497138; cv=none; d=google.com; s=arc-20160816; b=Zd5JkwYtr5xmHDPC3RyteWq6qXR1nnVi0sehTYjZ7nFFqjIFQPSN4sZo1NPxZV6foK a+xAZ7byNxbvtxt25RgJoFjUVaKTdkOH7TRoA3ETz1l+WeRXc9nm14sEyK8tUdXiq3FC OfPZosQOCoTMI+zor96mwr924Yqqw9FXS/HG59DySI0nvXouSa/NnwyxzLOt4uZ9A0Dz 98uHijhkXP9fIOY0/v5/upiCrwbcq/mzPM7xmFYNitYVde4gG6INl0vyZsqd8TNWT8ef 74yHnFquWeKq6ANlFxe/pD2UP4zg01RiY0HQC6WxD5Nlny1TRxIUCYQdmouwqlwdtoWj 8evA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sSS4lcTIGbMXkzXHnajhTMjU7KSYMMCUlsf0C4cS0VI=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=xWgIhJuJIKxBFiXAwWsW+YYOumFRDhJtwjVuZhx+Df/EKyG57lJerFWdWzBzNWTeu2 i0CHr5O3j9KEFQriQS6Gl2u7UQvnwmVEn7ThGtZTE3sH97QtW6Ry0Moa7IzPPTAAIluu i6EiISH+qrIw0f+k1GbZ0WP2RuJW0Tr/ei5ggZ4d467GIN5DciMSdnHQRp8l0ejb8CE+ kr8H19NFvvdoNC/LetAJ8W5zN5M9GTWiSWrVduN0Dyu6lHayQv80b/3yKDegKvIbpkFh a8wbeHQJUgb1VLuWZa3EJ+McvzGxeBEe++bZUfGPtTEgZVX47cK1U+EnN4Mpu8q6dxzJ 9NEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=DA42hTmN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. 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Wed, 13 Dec 2023 11:51:29 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 04/11] drm/rockchip: inno_hdmi: Correctly setup HDMI quantization range Date: Wed, 13 Dec 2023 20:51:18 +0100 Message-ID: <20231213195125.212923-5-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:51:59 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197639871063350 X-GMAIL-MSGID: 1785197639871063350 The display controller will always give full range RGB regardless of the mode set, but HDMI requires certain modes to be transmitted in limited range RGB. This is especially required for HDMI sinks which do not support non-standard quantization ranges. This enables color space conversion for those modes and sets the quantization range accordingly in the AVI infoframe. Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 40 ++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 345253e033c5..32626a75723c 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -33,6 +33,7 @@ struct hdmi_data_info { unsigned int enc_in_format; unsigned int enc_out_format; unsigned int colorimetry; + bool rgb_limited_range; }; struct inno_hdmi_i2c { @@ -308,6 +309,18 @@ static int inno_hdmi_config_video_avi(struct inno_hdmi *hdmi, else frame.avi.colorspace = HDMI_COLORSPACE_RGB; + if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_RGB) { + drm_hdmi_avi_infoframe_quant_range(&frame.avi, + &hdmi->connector, mode, + hdmi->hdmi_data.rgb_limited_range ? + HDMI_QUANTIZATION_RANGE_LIMITED : + HDMI_QUANTIZATION_RANGE_FULL); + } else { + frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; + frame.avi.ycc_quantization_range = + HDMI_YCC_QUANTIZATION_RANGE_LIMITED; + } + return inno_hdmi_upload_frame(hdmi, rc, &frame, INFOFRAME_AVI, 0, 0, 0); } @@ -334,14 +347,22 @@ static int inno_hdmi_config_video_csc(struct inno_hdmi *hdmi) if (data->enc_in_format == data->enc_out_format) { if ((data->enc_in_format == HDMI_COLORSPACE_RGB) || (data->enc_in_format >= HDMI_COLORSPACE_YUV444)) { - value = v_SOF_DISABLE | v_COLOR_DEPTH_NOT_INDICATED(1); - hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value); - - hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, - m_VIDEO_AUTO_CSC | m_VIDEO_C0_C2_SWAP, - v_VIDEO_AUTO_CSC(AUTO_CSC_DISABLE) | - v_VIDEO_C0_C2_SWAP(C0_C2_CHANGE_DISABLE)); - return 0; + if (data->enc_in_format == HDMI_COLORSPACE_RGB && + data->enc_out_format == HDMI_COLORSPACE_RGB && + hdmi->hdmi_data.rgb_limited_range) { + csc_mode = CSC_RGB_0_255_TO_RGB_16_235_8BIT; + auto_csc = AUTO_CSC_DISABLE; + c0_c2_change = C0_C2_CHANGE_DISABLE; + csc_enable = v_CSC_ENABLE; + } else { + value = v_SOF_DISABLE | v_COLOR_DEPTH_NOT_INDICATED(1); + hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value); + hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, + m_VIDEO_AUTO_CSC | m_VIDEO_C0_C2_SWAP, + v_VIDEO_AUTO_CSC(AUTO_CSC_DISABLE) | + v_VIDEO_C0_C2_SWAP(C0_C2_CHANGE_DISABLE)); + return 0; + } } } @@ -458,6 +479,9 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, else hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709; + hdmi->hdmi_data.rgb_limited_range = + drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED; + /* Mute video and audio output */ hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK, v_AUDIO_MUTE(1) | v_VIDEO_MUTE(1)); From patchwork Wed Dec 13 19:51:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178276 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030446dys; Wed, 13 Dec 2023 11:52:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IH/nDwnizpQ6/y82nXsB9m+jZ65lhvbR6sCPM34SxMXDtTw80zkowg5XDGoGuUkkizGdyQ8 X-Received: by 2002:a05:6358:7248:b0:172:93c5:5913 with SMTP id i8-20020a056358724800b0017293c55913mr1548060rwa.48.1702497121737; Wed, 13 Dec 2023 11:52:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497121; cv=none; d=google.com; s=arc-20160816; b=JsNvJkK9pzDNlxqqbHtEae4aKOf/c3w/I3z2rvs8pyr3U/jBRyHS3Kvts3xcbp0yBD J6DRTI6l8emoZq991EEiRLSqh0HSL0/9+Q4P3H1Fbl9z6rtaOCjanpY9khMYDi2zVx+E GwoqBG18jjMFzP+ie/BNE+vrw2Zcm6+C4U4jbfHU+A612XYCFn1iVgEHYRQYcJ9r4gzq 2EVr6yhiJ1EPucjhZvZf11/RN9BflmVEAL2QEcNbcFuFw61RSinz40trdpuaOSu+fa01 2bCeRKDAuPxorCV1QMolY6iYZBf8Zfl0stIdhpLvHXT/6XjkAnLvCdDFd8BVM33i9vWU yyXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SouF/Ke6EpeUvfoqZ3rKNuHloSyd05Y/ZVCgaagWqrY=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=UmuNaGsD44H3+9JML2IKSI5fKWVeP4Hzfe97SMLyZE/fDxzsz+395tO3bfc7v0X0AF UR3rHCMOEULrnMLrIF7RoIsCF+H5bSMVVX/hCZ6mouZJuCs333kAIzdcXZYDWDTWfJra F2XMfwFSw2JLBdkJ14opmkHWwJA1WkcgKHuhkZCZuGfjpcnrdMjeq+Jgw/taj+CqqRWS rHaRz/7N9IsHwPiBqjfNo9DgWsIvBDGPIj5My+wUO4cJQlPdxeH/8iIV79m1/MQ85i2E 6c8mP+tDQmuI10AW74iACuMXSvTqm2DqXSmqx5KdaRRbmU7auStynKV9CMaFLZWs1vKG owlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=L9JrxHP5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from howler.vger.email (howler.vger.email. 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Wed, 13 Dec 2023 11:51:30 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 05/11] drm/rockchip: inno_hdmi: Add variant support Date: Wed, 13 Dec 2023 20:51:19 +0100 Message-ID: <20231213195125.212923-6-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:51:56 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197621789955281 X-GMAIL-MSGID: 1785197621789955281 In preparation to support RK3128's integration of the controller, this patch adds a simple variant implementation. They mainly differ in the phy configuration required, so those are part of the match_data. The values have been taken from downstream. The pixelclocks in there are meant to be max-inclusive. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 68 +++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 32626a75723c..593b184bd0ad 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -27,6 +27,17 @@ #include "inno_hdmi.h" +struct inno_hdmi_phy_config { + unsigned int pixelclock; + u8 pre_emphasis; + u8 voltage_level_control; +}; + +struct inno_hdmi_variant { + struct inno_hdmi_phy_config *phy_configs; + struct inno_hdmi_phy_config *default_phy_config; +}; + struct hdmi_data_info { int vic; bool sink_has_audio; @@ -64,6 +75,14 @@ struct inno_hdmi { struct hdmi_data_info hdmi_data; struct drm_display_mode previous_mode; + + const struct inno_hdmi_variant *variant; +}; + +static struct inno_hdmi_phy_config rk3036_hdmi_phy_configs[] = { + { 74250000, 0x3f, 0xbb }, + { 165000000, 0x6f, 0xbb }, + { ~0UL, 0x00, 0x00 } }; static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) @@ -176,6 +195,24 @@ static inline void hdmi_modb(struct inno_hdmi *hdmi, u16 offset, hdmi_writeb(hdmi, offset, temp); } +static int inno_hdmi_find_phy_config(struct inno_hdmi *hdmi, + unsigned int pixelclk) +{ + const struct inno_hdmi_phy_config *phy_configs = + hdmi->variant->phy_configs; + int i; + + for (i = 0; phy_configs[i].pixelclock != ~0UL; i++) { + if (pixelclk <= phy_configs[i].pixelclock) + return i; + } + + DRM_DEV_DEBUG(hdmi->dev, "No phy configuration for pixelclock %u\n", + pixelclk); + + return -EINVAL; +} + static void inno_hdmi_i2c_init(struct inno_hdmi *hdmi) { int ddc_bus_freq; @@ -200,12 +237,25 @@ static void inno_hdmi_sys_power(struct inno_hdmi *hdmi, bool enable) static void inno_hdmi_set_pwr_mode(struct inno_hdmi *hdmi, int mode) { + int ret; + struct inno_hdmi_phy_config *phy_config; + switch (mode) { case NORMAL: inno_hdmi_sys_power(hdmi, false); - hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, 0x6f); - hdmi_writeb(hdmi, HDMI_PHY_DRIVER, 0xbb); + ret = inno_hdmi_find_phy_config(hdmi, hdmi->tmds_rate); + if (ret < 0) { + phy_config = hdmi->variant->default_phy_config; + DRM_DEV_ERROR(hdmi->dev, + "Using default phy configuration for TMDS rate %u", + hdmi->tmds_rate); + } else { + phy_config = &hdmi->variant->phy_configs[ret]; + } + + hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, phy_config->pre_emphasis); + hdmi_writeb(hdmi, HDMI_PHY_DRIVER, phy_config->voltage_level_control); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x14); @@ -845,6 +895,8 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, struct platform_device *pdev = to_platform_device(dev); struct drm_device *drm = data; struct inno_hdmi *hdmi; + const struct inno_hdmi_variant *variant; + int irq; int ret; @@ -853,6 +905,12 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, return -ENOMEM; hdmi->dev = dev; + + variant = of_device_get_match_data(hdmi->dev); + if (!variant) + return -EINVAL; + + hdmi->variant = variant; hdmi->drm_dev = drm; hdmi->regs = devm_platform_ioremap_resource(pdev, 0); @@ -949,8 +1007,14 @@ static void inno_hdmi_remove(struct platform_device *pdev) component_del(&pdev->dev, &inno_hdmi_ops); } +static const struct inno_hdmi_variant rk3036_inno_hdmi_variant = { + .phy_configs = rk3036_hdmi_phy_configs, + .default_phy_config = &rk3036_hdmi_phy_configs[1], +}; + static const struct of_device_id inno_hdmi_dt_ids[] = { { .compatible = "rockchip,rk3036-inno-hdmi", + .data = &rk3036_inno_hdmi_variant, }, {}, }; From patchwork Wed Dec 13 19:51:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178275 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030388dys; Wed, 13 Dec 2023 11:51:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IGEJwnSLQQKzYrSYT7k16/HMvhc2IsveqsjOzg2z9O2DvXI/tmW1lkxmzjMBSERo7CzbPiI X-Received: by 2002:a17:903:40ce:b0:1cf:7bf7:e655 with SMTP id t14-20020a17090340ce00b001cf7bf7e655mr9860311pld.8.1702497116340; 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Wed, 13 Dec 2023 11:51:30 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 06/11] drm/rockchip: inno_hdmi: Add RK3128 support Date: Wed, 13 Dec 2023 20:51:20 +0100 Message-ID: <20231213195125.212923-7-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:51:53 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197616278343899 X-GMAIL-MSGID: 1785197616278343899 This variant requires the phy reference clock to be enabled before the DDC block can work and the (initial) DDC bus frequency is calculated based on the rate of this clock. Besides the only difference is phy configuration which is required to make the driver working for this variant as well. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 46 +++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 593b184bd0ad..f7f0bec725f9 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -63,6 +63,7 @@ struct inno_hdmi { int irq; struct clk *pclk; + struct clk *refclk; void __iomem *regs; struct drm_connector connector; @@ -85,6 +86,12 @@ static struct inno_hdmi_phy_config rk3036_hdmi_phy_configs[] = { { ~0UL, 0x00, 0x00 } }; +static struct inno_hdmi_phy_config rk3128_hdmi_phy_configs[] = { + { 74250000, 0x3f, 0xaa }, + { 165000000, 0x5f, 0xaa }, + { ~0UL, 0x00, 0x00 } +}; + static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) { struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); @@ -930,6 +937,20 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, return ret; } + hdmi->refclk = devm_clk_get_optional(hdmi->dev, "ref"); + if (IS_ERR(hdmi->refclk)) { + DRM_DEV_ERROR(hdmi->dev, "Unable to get HDMI reference clock\n"); + ret = PTR_ERR(hdmi->refclk); + goto err_disable_pclk; + } + + ret = clk_prepare_enable(hdmi->refclk); + if (ret) { + DRM_DEV_ERROR(hdmi->dev, + "Cannot enable HDMI reference clock: %d\n", ret); + goto err_disable_pclk; + } + irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; @@ -946,12 +967,16 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, } /* - * When IP controller haven't configured to an accurate video - * timing, then the TMDS clock source would be switched to - * PCLK_HDMI, so we need to init the TMDS rate to PCLK rate, - * and reconfigure the DDC clock. + * When IP controller isn't configured to an accurate + * video timing and there is no reference clock available, + * then the TMDS clock source would be switched to PCLK_HDMI, + * so we need to init the TMDS rate to PCLK rate, and + * reconfigure the DDC clock. */ - hdmi->tmds_rate = clk_get_rate(hdmi->pclk); + if (hdmi->refclk) + hdmi->tmds_rate = clk_get_rate(hdmi->refclk); + else + hdmi->tmds_rate = clk_get_rate(hdmi->pclk); inno_hdmi_i2c_init(hdmi); ret = inno_hdmi_register(drm, hdmi); @@ -976,6 +1001,8 @@ static int inno_hdmi_bind(struct device *dev, struct device *master, err_put_adapter: i2c_put_adapter(hdmi->ddc); err_disable_clk: + clk_disable_unprepare(hdmi->refclk); +err_disable_pclk: clk_disable_unprepare(hdmi->pclk); return ret; } @@ -989,6 +1016,7 @@ static void inno_hdmi_unbind(struct device *dev, struct device *master, hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); i2c_put_adapter(hdmi->ddc); + clk_disable_unprepare(hdmi->refclk); clk_disable_unprepare(hdmi->pclk); } @@ -1012,10 +1040,18 @@ static const struct inno_hdmi_variant rk3036_inno_hdmi_variant = { .default_phy_config = &rk3036_hdmi_phy_configs[1], }; +static const struct inno_hdmi_variant rk3128_inno_hdmi_variant = { + .phy_configs = rk3128_hdmi_phy_configs, + .default_phy_config = &rk3128_hdmi_phy_configs[1], +}; + static const struct of_device_id inno_hdmi_dt_ids[] = { { .compatible = "rockchip,rk3036-inno-hdmi", .data = &rk3036_inno_hdmi_variant, }, + { .compatible = "rockchip,rk3128-inno-hdmi", + .data = &rk3128_inno_hdmi_variant, + }, {}, }; MODULE_DEVICE_TABLE(of, inno_hdmi_dt_ids); From patchwork Wed Dec 13 19:51:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178278 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030494dys; Wed, 13 Dec 2023 11:52:08 -0800 (PST) X-Google-Smtp-Source: AGHT+IEqdcaMfxrs3tB/eu36uVOJazlX31xAM8YPmIERNUm2zGQaol9T7rcJxiQoo2EEmXjVt47z X-Received: by 2002:a05:6a00:cd3:b0:6ce:2e39:97d5 with SMTP id b19-20020a056a000cd300b006ce2e3997d5mr11109820pfv.38.1702497128605; Wed, 13 Dec 2023 11:52:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497128; cv=none; d=google.com; s=arc-20160816; b=Hrpue1BG7YaQIPAoYFwPrH2krxWTk19lcloi2q6x257MCMWuOHTWZFPGo1Yh0fvbv5 37h21SPeQ4I/YB+83MJnRTo+JviOQvD6yaN6Kce2tbm0B0McovmTwz5EcqCX09tLhQbo eqIPUa0myaw0MyZLT9h6F0+k2x1HI7nroejotGeHL3WbEsmasqNauKkMSoq2JR94P9Zo /FxgxyhBQH9q4RTFLEHssF4lwpqcXTVM+d5JvgpW2jMt26VVAA0GV1R3/qj8cTwWcJMH XSpG4uKWCo7kEDGaC//4eJSmjAHAr6RYniv3r6qB8h/arSorAqZVPZ7JpvwvrpzKqrhn 00DA== ARC-Message-Signature: i=1; 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Wed, 13 Dec 2023 11:51:31 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 07/11] drm/rockchip: inno_hdmi: Add basic mode validation Date: Wed, 13 Dec 2023 20:51:21 +0100 Message-ID: <20231213195125.212923-8-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:52:05 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197629458529688 X-GMAIL-MSGID: 1785197629458529688 As per TRM this controller supports pixelclocks starting from 25 MHz. The maximum supported pixelclocks are defined by the phy configurations we have. Also it can't support modes that require doubled clocks. If there is a phy reference clock we can additionally validate against VESA DMT's recommendations. Those checks are added to the mode_valid hook of the connector and encoder's mode_fixup hook. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 38 ++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index f7f0bec725f9..2f839ff31c1c 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -38,6 +38,8 @@ struct inno_hdmi_variant { struct inno_hdmi_phy_config *default_phy_config; }; +#define INNO_HDMI_MIN_TMDS_CLOCK 25000000U + struct hdmi_data_info { int vic; bool sink_has_audio; @@ -572,6 +574,34 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, return 0; } +static enum drm_mode_status inno_hdmi_mode_valid(struct inno_hdmi *hdmi, + struct drm_display_mode *mode) +{ + /* No support for double-clock modes */ + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + return MODE_BAD; + + unsigned int mpixelclk = mode->clock * 1000; + + if (mpixelclk < INNO_HDMI_MIN_TMDS_CLOCK) + return MODE_CLOCK_LOW; + + if (inno_hdmi_find_phy_config(hdmi, mpixelclk) < 0) + return MODE_CLOCK_HIGH; + + if (hdmi->refclk) { + long refclk = clk_round_rate(hdmi->refclk, mpixelclk); + unsigned int max_tolerance = mpixelclk / 5000; + + /* Vesa DMT standard mentions +/- 0.5% max tolerance */ + if (abs(refclk - mpixelclk) > max_tolerance || + mpixelclk - refclk > max_tolerance) + return MODE_NOCLOCK; + } + + return MODE_OK; +} + static void inno_hdmi_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) @@ -602,7 +632,9 @@ static bool inno_hdmi_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adj_mode) { - return true; + struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder); + + return inno_hdmi_mode_valid(hdmi, adj_mode) == MODE_OK; } static int @@ -659,7 +691,9 @@ static enum drm_mode_status inno_hdmi_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { - return MODE_OK; + struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector); + + return inno_hdmi_mode_valid(hdmi, mode); } static int From patchwork Wed Dec 13 19:51:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178277 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030479dys; Wed, 13 Dec 2023 11:52:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IGrwjNN8aYK8j0m1Tv4T9DA4TynGqJitYM06VXNUdbEAtK4xdrIDfoiY2x8VRWplvZ56ph2 X-Received: by 2002:a05:6a20:728f:b0:18c:30:f408 with SMTP id o15-20020a056a20728f00b0018c0030f408mr11913266pzk.0.1702497125402; Wed, 13 Dec 2023 11:52:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497125; cv=none; d=google.com; s=arc-20160816; b=Gpx2ZsylD42qxcX7mpgESWQa37V3GhQ2XpDO9b2Lrda8cvsQOFcPQR2ZPTF/Fop8w2 +/mWIdgjLGpqbJYs6jsyry6CQJNjMnS6g1BOCytU2Q3XSWiAXZTQBsN/YSoS1cnIMvvN JA+gl4NLgNkHbezudWs5NcnSBxbFxn6dmmRPhivTCxuw5JHBidQyMY4JlMwsS88nEp1b 3lOHk2v8SbUet/gwFCPMKJ6wA0K8ZNHE5seIoWzyVkxcgnoFoqVvjZa6nRjyy1uSCzPr JJ6vxqWNaokk2CW3SwA7w4kJN0btMLqR9nmsEdGRtojmORREg1DJXNOwzH7Zn8oW76Or Fv5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SDq2fLVuR6T1GPARTMOS6b3H20znzfoIBUzVKBtShU4=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=LeDxmc0pJ94B2D2ghDArXxAvkl2fYgUQxvCVLFp9iU8HxmcKNJz0ptptEvm0qQG6JN OdYVD3ak1UvPS2/JQhEkIJmqD6N63zsN7/cpMQ+7CEj2HuzQ3UnMa8GjZLMRsseTjJtL xqKLLb3PHAS+jLJFuynAhgzbq6rTggHtffbW6i93wD/1UEgpCn50MEw4arLokFUkcU1k M+4z+70zouUmqq3jXkXHsy33LQGfU86Heb3CB0uwiMPrego9AdhVGVW1WD9MqCIhL1Ro gAt7xuk6TSIlya+7zfXabLNJnHhAUXSiUA8L4q/Eoehgwn+edcxWAloHucaAI5AUtZID aJfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=cQcwtWuJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from lipwig.vger.email (lipwig.vger.email. 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Wed, 13 Dec 2023 11:51:32 -0800 (PST) From: Alex Bee To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 08/11] drm/rockchip: inno_hdmi: Drop custom fill_modes hook Date: Wed, 13 Dec 2023 20:51:22 +0100 Message-ID: <20231213195125.212923-9-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 13 Dec 2023 11:52:01 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785197626223791558 X-GMAIL-MSGID: 1785197626223791558 Now that we have proper pixelclock-based validation we can drop the custom fill_modes hook. CRTC size validation for the display controller has been added with Commit 8e140cb60270 ("drm/rockchip: vop: limit maximum resolution to hardware capabilities") Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c index 2f839ff31c1c..84520da8c995 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -696,13 +696,6 @@ inno_hdmi_connector_mode_valid(struct drm_connector *connector, return inno_hdmi_mode_valid(hdmi, mode); } -static int -inno_hdmi_probe_single_connector_modes(struct drm_connector *connector, - uint32_t maxX, uint32_t maxY) -{ - return drm_helper_probe_single_connector_modes(connector, 1920, 1080); -} - static void inno_hdmi_connector_destroy(struct drm_connector *connector) { drm_connector_unregister(connector); @@ -710,7 +703,7 @@ static void inno_hdmi_connector_destroy(struct drm_connector *connector) } static const struct drm_connector_funcs inno_hdmi_connector_funcs = { - .fill_modes = inno_hdmi_probe_single_connector_modes, + .fill_modes = drm_helper_probe_single_connector_modes, .detect = inno_hdmi_connector_detect, .destroy = inno_hdmi_connector_destroy, .reset = drm_atomic_helper_connector_reset, From patchwork Wed Dec 13 19:51:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178279 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030523dys; Wed, 13 Dec 2023 11:52:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IFaR4FDwu+jJTvVdRyYvvUu3QmJsCgfI5R17sFGCreHiAijCBTpIuGJstjgz1x4IeNb5Dm9 X-Received: by 2002:a17:90a:4594:b0:285:d6a2:3bf9 with SMTP id v20-20020a17090a459400b00285d6a23bf9mr7471546pjg.11.1702497133936; Wed, 13 Dec 2023 11:52:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497133; cv=none; d=google.com; s=arc-20160816; b=r4rkdK8iI9cg/0G82eavFksW53AAmZzA3g24OPkDeQ0SEEYPnZ8ymm6Eh4/uOksClq h498KpScm2Bv4m9GBx/Wh4VmTLhS6LAyz2aODBuSTir+gFF5te3HtJCA6ykEeEo3AMOF FvpJG+7Ex1Zr+jKmUHw/I//b/ylPSSnrgwtIQDyUbPj6ekCOWoCpd+VbAOQGc/sR3jpW UlXmtyJRkc8yvLdsBwwgXpMdmVIOLcVAYYnCqTby3YwJ6usI1VaSG9e+F7wt2DDUxFMy oKYvZHaL98OYewRevs9r2jD/JWOUenHFgfHqoXfp9P0W1u3tla1Rvflv1n0YXPzBVJ9A lzqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=res/nVyNjutOW8BN3aTB9WUo0BBvwS0hIxu7mxFR92s=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=q1qjg46n7KwLtTtNFi4CvHeBls5Wuca4M9dySIQzpvicq/8BBikbIk2j/ZRBT6UUzW A7KRBoTYJ76L8ulejoGizv+dBvhfWJQc2blmvox6MHLBGbrY7d+R7M0sYo3S4LraKIzY D2aQG2R3LFIibvFpH8OKj5zQn753xJoDu3FwKF5zcKzDfAyrFuUCCWTWN9gx2OKrQJOk 5pnt2WKObXfCsY9X5zFL2RefN+DHtFcJH1L3JtXLFeb7E5FEDHFA0HqzweVHKhoOOXEu mPZOQDaanQ8Zc7k1nGge7DEj2MFiXipBgePF0z7XjmS9quIrA/AtmkqC7mrX3e4hozn4 s7AA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=GtzYy5AQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from morse.vger.email (morse.vger.email. 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Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 27 ++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index e2264c40b924..1a3bc8b2bc6e 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -115,6 +115,12 @@ opp-1200000000 { }; }; + display_subsystem: display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + status = "disabled"; + }; + gpu_opp_table: opp-table-1 { compatible = "operating-points-v2"; @@ -246,6 +252,27 @@ power-domain@RK3128_PD_GPU { }; }; + vop: vop@1010e000 { + compatible = "rockchip,rk3126-vop"; + reg = <0x1010e000 0x300>; + interrupts = ; + clocks = <&cru ACLK_LCDC0>, <&cru DCLK_VOP>, + <&cru HCLK_LCDC0>; + clock-names = "aclk_vop", "dclk_vop", + "hclk_vop"; + resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, + <&cru SRST_VOP_D>; + reset-names = "axi", "ahb", + "dclk"; + power-domains = <&power RK3128_PD_VIO>; + status = "disabled"; + + vop_out: port { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + qos_gpu: qos@1012d000 { compatible = "rockchip,rk3128-qos", "syscon"; reg = <0x1012d000 0x20>; From patchwork Wed Dec 13 19:51:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178281 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030563dys; Wed, 13 Dec 2023 11:52:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IGj1gSrJbfG5Go+rog+1aFR1U/X6i57hWCiuy1aSZELinuoqV4WaRvalR2K7fMDUEfvb4Vj X-Received: by 2002:a17:902:da82:b0:1cf:d660:5b09 with SMTP id j2-20020a170902da8200b001cfd6605b09mr11041710plx.0.1702497138847; Wed, 13 Dec 2023 11:52:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497138; cv=none; d=google.com; s=arc-20160816; b=nh8E1pRZ7QSbiimTq8w7z14ltVSitPlXucvDAxx7vcctTjrzRpaWI7NVDusUtj1YdP KkPcmyf3xZdPLnfk7jJnXDzS3dgHSe1hIsHUJvCI9y2HEu5CxMifmVR7BxPDdS8tdVlP izkU0+uLBfUbL9OrMAZCOT+GFZMtN06dDPXOH2kdr23z4sZ4rZFdv2vxS/j12hbrH6Xo VgK1F5OcJA09DRiNOpU52wQc4cvQRtN0eAM/ftkcM4o5Wg+tAFCkAy/lY7jWNoiRsPkU qUfoKBbFdTgtfRZzBCVAvoXX9UMPvz/qUSuHrml3lFTuD6j4KV4kIUJsbC/s0T1qlyY1 oTiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+bG6mHprJzSYZBwi1h+X+EBITVK9IcgyHPusQHlrEts=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=Cjk7+27sA51I6LMmuPfD7s+ChOpVGZQXMYgH4WXYLJgJs4xByftPvv4BH9N/yBMaYG 9V/CPJnf23r9IE/yUg8AkDs0VdcEVBNwEBImggNS/0Nh2JoxaE1sgRQdd+rWayeY00nT EJ5FeH6TApycmhB0ANkdwah7HBCDeIgR1JfVIOZZ8VRX9Msxmb1njAhPO/1IBteudfSh zkF/Ytjyi2o1Mm+OwDi+scRoMAP1zdt+vm6MX5Hue0WeLxQA9RFU/7ehSXi3WDrh/0SZ RV3U2HQQGuu5SeQtmEkLqjXZ87KlReyeE65HlEu4GAda/CMzf3sAc2bzzod4Lzex0/Zb FV1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=Xny2VQsd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. 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Add it and the respective port nodes to the SoC device tree. Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 33 ++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 1a3bc8b2bc6e..fb98873fd94e 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -270,6 +270,11 @@ vop: vop@1010e000 { vop_out: port { #address-cells = <1>; #size-cells = <0>; + + vop_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_vop>; + }; }; }; @@ -463,6 +468,34 @@ usb2phy_otg: otg-port { }; }; + hdmi: hdmi@20034000 { + compatible = "rockchip,rk3128-inno-hdmi"; + reg = <0x20034000 0x4000>; + interrupts = ; + clocks = <&cru PCLK_HDMI>, <&cru DCLK_VOP>; + clock-names = "pclk", "ref"; + pinctrl-names = "default"; + pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; + power-domains = <&power RK3128_PD_VIO>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + hdmi_in_vop: endpoint { + remote-endpoint = <&vop_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg = <1>; + }; + }; + }; + timer0: timer@20044000 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044000 0x20>; From patchwork Wed Dec 13 19:51:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 178283 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp8030623dys; Wed, 13 Dec 2023 11:52:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IFZZNalXzQuir61QKZGX0pqXXrkZvQFVKQwteZthc2jgJ//QrjiXX+seEFaMg9ME1WsMOYw X-Received: by 2002:a05:6e02:19c9:b0:35d:59a2:6459 with SMTP id r9-20020a056e0219c900b0035d59a26459mr11135734ill.44.1702497145776; Wed, 13 Dec 2023 11:52:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702497145; cv=none; d=google.com; s=arc-20160816; b=0+xbzLVgxeIgLKMX1ATzPmPjYy5RvXE2PWP4pKIYs3hXmKVaf5oYOj5EfzI8NQO+6B PxeRu78TZdF6QwohFMduuvm/5rIJu0kv2GGKIa88nOl/BTvU5/zXzwDloqpfaVcse6Yx uyZmFUc4yQbydBqGNCmkjDP+X3f2BAy0c8PqF3kEtUzhsodYmDNbQ9AIXestp4rIsMuE SbDgwg5hqsQh/gn4zJYa3YRHo3vYOg7+DEI8TdweX2KxTea0S8qWzRasAexISlIMQFMJ 9wy9g3neBX7v8YYoot/PJLFI8Xx9nKjHQgNCJxmZOC/2l/jzOyZA2m604sSerlgEmPwd k7MQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=26TYtvJWQfom93EELDFR0hGRGZIq8W0h3c/9XO+9E4k=; fh=nzMX5Jolb3GculGR3f1Z1ReHOqdNjcdazDY5R3X+7M0=; b=mfAC4GM4bhj99raTYvLImhPY7MI8x5PrnBEa8mnm/pBrf3raFP3aZcFn+/DpepwFNj XgLlNB8ykkr4APoT7EE/Y9ow90sbps7gcaKBcDWDZuhHlQ+3V6El4EZiZeW0BAEaC/QQ 2UkE/U4ZMrI37zs0fbeGJzj9z0qr8NC1jevZlIlzQCugkQ9FMmxKql7Jrh5/innewoyK hv51qKeD9cgorvspXCpOOfdVPpwWuuLfGVLq2kZRlscBQVOaAz6K828wm6n4aSHmNaSO p/NnFRxgaYINGDOGvFPE46+4R1EsItLVTEub3ar4C9kKDSxvNuND3Df93ztaE5j1Q9u5 L8AA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=f0vLLl5Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. 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Signed-off-by: Alex Bee --- .../arm/boot/dts/rockchip/rk3128-xpi-3128.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts index 03a97881519a..21c1678f4e91 100644 --- a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts +++ b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts @@ -47,6 +47,17 @@ dc_5v: dc-5v-regulator { regulator-boot-on; }; + hdmi-connnector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_connector_out>; + }; + }; + }; + /* * This is a vbus-supply, which also supplies the GL852G usb hub, * thus has to be always-on @@ -239,6 +250,10 @@ &cpu0 { cpu-supply = <&vdd_arm>; }; +&display_subsystem { + status = "okay"; +}; + &emmc { bus-width = <8>; vmmc-supply = <&vcc_io>; @@ -328,6 +343,16 @@ &gpu { status = "okay"; }; +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_connector_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &mdio { phy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; @@ -423,3 +448,7 @@ &usb2phy_host { &usb2phy_otg { status = "okay"; }; + +&vop { + status = "okay"; +};