From patchwork Fri Nov 11 08:56:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18568 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626184wru; Fri, 11 Nov 2022 01:00:14 -0800 (PST) X-Google-Smtp-Source: AA0mqf7RVVM8S5ZtGdxesQhfamPvhjPLPPRkD6UGopgCFHpzeItVFOB/wLN7wkZ8pUuA72LGaGhm X-Received: by 2002:aa7:d759:0:b0:463:fec2:dfb1 with SMTP id a25-20020aa7d759000000b00463fec2dfb1mr620763eds.303.1668157213838; Fri, 11 Nov 2022 01:00:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157213; cv=none; d=google.com; s=arc-20160816; b=vCzpnad3Lq2vaFcGcTGBHMG7crsh5G3m7sdx6FuZ+zN3zl4Q0cU4jvQ4WRfzkhOpDk 8aWnBLtlpL8YaJdOHbXqqGQKoxzCpM9XgrJsPvOuUDHo/UYXbB6USU9epTIXRBmBQBJz TZQYiR1j64jfrvd5nqm/dx8JVhejweon9JMSD1gEG8DqrFfQyjf56TbWO7J7weBFqtYS xmDF+MFl+h7u0v8zlIKsUf6+kmesIH6kn3XAao6QC0tdY9eRh/9eVpD8slOfDgfBsJzs eXjfX+LLAT0j4fpcbjiRzcrS811aKJwi/83EDScGnRTwtemDO7NiMWpfRaGrBzMLT9Tg PQ3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iUElBEpLv4RbmbG6k9cQJkNt9k7nmxEsuHbF8AmVx1M=; b=fl59zG9tC41JSeOmg+1zCndNYNRqGOzjaifVv0QsOUN982sThtDsI0v2el9jMheCCo LwAcIcZnkf7UBZmNbW3AJX1Yv6Y/d1pl4E9XRRc/5MKDXOItMVdEIZ4vfIeTmebxZJBO SSOjbpxNBvK9DOhfwV21YumD63nlVZdNEGUJk54MM7LFyPmIQtfEnZ9t+IPnJvjvezji A5KDPs1jogIHYAdZoO9uVz/sCr3natWb86hRO5RBfqwQIqaa6J+UctfnTbjKwQHD4ht/ F9mGnIrRBEzaThMpjbwSCA/XS0/UwhPbD9PvnIBdHJMkapUHwtOZ/63rtti6QmA+L2LJ 2XNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=F1zJPWUp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hr40-20020a1709073fa800b00791a3dd01b1si1659139ejc.865.2022.11.11.00.59.49; Fri, 11 Nov 2022 01:00:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=F1zJPWUp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233207AbiKKI6O (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233444AbiKKI51 (ORCPT ); Fri, 11 Nov 2022 03:57:27 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8834B77202; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 44CABB82473; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DFABBC43144; Fri, 11 Nov 2022 08:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157042; bh=PuggCD58nq+PhXPokd4Y/KT/cjFel9nb2sJGZeDZkwk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F1zJPWUpLTLdcFrTX3JaiReORdH5riWRG6qnj8hrE3arCZi3lL29O3I7QRZVKk0Ce MZKs6zSxLYAXvHeji8pa9bYRfZCnvrkNXjteR3FIXZpR6USEUhgkIovIYRggMP5u9q JvbsmnCc2o3OnnHz76UwgnxDQCG5ZYRlfYRB+iLEQSH8NBY3em6bi0er/tBttnKUxQ kJfdcXyCQHELV2EOmZNQW88MCEML09ZiVrQmRaJ9JNY1rB0lqJ/hCjQ8OcOegMRvJC zLLl+jzfnL/dFLiOfNvJY2vjtLsozwVgnVy43dOUg3WGqiWt4AwllsntpBeJfWEQbT 556p3bvv7rf3Q== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqI-0002Tp-U6; Fri, 11 Nov 2022 09:56:54 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 01/22] phy: qcom-qmp-combo: sort device-id table Date: Fri, 11 Nov 2022 09:56:22 +0100 Message-Id: <20221111085643.9478-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189618756510292?= X-GMAIL-MSGID: =?utf-8?q?1749189618756510292?= Sort the device-id table by compatible string to make it easier to find and add new entries. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index c7a926d548d8..d6a031bcfc30 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2651,14 +2651,6 @@ static const struct of_device_id qmp_combo_of_match_table[] = { .compatible = "qcom,sc7180-qmp-usb3-dp-phy", .data = &sc7180_usb3dpphy_cfg, }, - { - .compatible = "qcom,sdm845-qmp-usb3-dp-phy", - .data = &sdm845_usb3dpphy_cfg, - }, - { - .compatible = "qcom,sm8250-qmp-usb3-dp-phy", - .data = &sm8250_usb3dpphy_cfg, - }, { .compatible = "qcom,sc8180x-qmp-usb3-dp-phy", .data = &sc8180x_usb3dpphy_cfg, @@ -2667,6 +2659,14 @@ static const struct of_device_id qmp_combo_of_match_table[] = { .compatible = "qcom,sc8280xp-qmp-usb43dp-phy", .data = &sc8280xp_usb43dpphy_combo_cfg, }, + { + .compatible = "qcom,sdm845-qmp-usb3-dp-phy", + .data = &sdm845_usb3dpphy_cfg, + }, + { + .compatible = "qcom,sm8250-qmp-usb3-dp-phy", + .data = &sm8250_usb3dpphy_cfg, + }, { } }; MODULE_DEVICE_TABLE(of, qmp_combo_of_match_table); From patchwork Fri Nov 11 08:56:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18571 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626252wru; Fri, 11 Nov 2022 01:00:21 -0800 (PST) X-Google-Smtp-Source: AA0mqf4po+mSfFViCfoQI1sX6cpj4O8dDJ/j24VLfFsVp/mlXUBdUpO07xsKrp5zWv7uPs1vtlXR X-Received: by 2002:aa7:c543:0:b0:458:dbc5:67c5 with SMTP id s3-20020aa7c543000000b00458dbc567c5mr649865edr.214.1668157221042; Fri, 11 Nov 2022 01:00:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157221; cv=none; d=google.com; s=arc-20160816; b=Hh9cLOKhdSF1opnIcpPe5JmYVfgkjoPXKeh9CP9oavrdXGcOhHN6dwZ+zy2WftWKX6 3UIVrFQ1TiHRmduIQBRydjj8109XNWmcJUYn+c+2LVvdBndVEccMhhkbBLp01REmXwj8 fnBvh7nWcK5zGCXlFwYMS1B2SWDlq63pxhJ0VpJxvOgrldc1ZwzmBYtj+PUCBJje7y5N JdV8/QFBQUuxAwuy1ko55Qy96hIt6XeVk1GkyrIkA7V3FhOonVKHrFN7ayaE37RzUzTi 7fKcOXVG32HVe2061boiEqhSqPjK45arKJSsBJfOuLwVo8sLkS6PmG1A/ueoQxIkMqL8 bo0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=py+Xu85zOiKXxTNrqvCdPylfWOrXic2xkYfjTRSF5ZY=; b=uL3KrjQTxjJPl189SJcAu4bwqntujXAOmXUH88wKFtjI6AvjTTev6W27POkxdY5Tqu m4U3FPKSj55XfRp4uyAMM0radobam0e2ssD9dUp4IxtwP0To2tkosZMsT1fxowERfmhW sRSnJUcqMvfQDWQ3Od/4kRT9kUNaKAlNbns4nvsnEl6NUyqOuycR61oWLtYOZhFcJhzN o9cOq4trGriThk37qj27eKIC3zJvEb4ohz3n+c7p8ruI7wtnWa/GQg7DMMhgKlfZ84q2 vfwkR6EsRpvVNW2nsy3dUwkMlb/ZBYy6RB7TvwzemmYl5o5f1AohqyzYinpVBL5NC1dG pe/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=upfsRCUt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w1-20020a17090652c100b0078849a014e9si1241185ejn.196.2022.11.11.00.59.57; Fri, 11 Nov 2022 01:00:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=upfsRCUt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233583AbiKKI6Y (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233455AbiKKI52 (ORCPT ); Fri, 11 Nov 2022 03:57:28 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 986DF77212; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 47582B82454; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DA09DC43142; Fri, 11 Nov 2022 08:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157042; bh=7irE5wSxKlSV0vo/oWIr5RUOEU51KJQ65oYsgILjvqo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=upfsRCUt+W5g0mCCEo2L8LjiRNLT99l3NfxxjEVNSlSxQkxsAll1ANsqHAusFdZHg fAAiF2xVKh1orVoaaHF2rqWGSZNoI+K2Oc3p+aDYophm1mPVutygBxsTmh8msNVjLt y946Kff8/MJmtzPNL7W/+3RPWeu1n4dZeIa74tRBzZ6MTsa+DFGGbEqQ8TD5X5ir4g koMTBV1aK5Xf4CaBjAnPTyeR4qpsx5EH9JKvRQOo2ouTngvwFXP0gjG9NU/TLZamcc 89YI+4G2hCkNIW2qBquQjTgPpxp+yNAX/lSoeYG97bQhtZVUJ1rQ/+xxkLBCNUFiyt 8bR/hnF/Fc8Xg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002Tr-0M; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 02/22] phy: qcom-qmp-combo: move device-id table Date: Fri, 11 Nov 2022 09:56:23 +0100 Message-Id: <20221111085643.9478-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189626327929587?= X-GMAIL-MSGID: =?utf-8?q?1749189626327929587?= Move the device-id table after probe() and next to the driver structure to keep the driver callback functions grouped together. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 50 +++++++++++------------ 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index d6a031bcfc30..e7c8c4417142 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2646,31 +2646,6 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id, return 0; } -static const struct of_device_id qmp_combo_of_match_table[] = { - { - .compatible = "qcom,sc7180-qmp-usb3-dp-phy", - .data = &sc7180_usb3dpphy_cfg, - }, - { - .compatible = "qcom,sc8180x-qmp-usb3-dp-phy", - .data = &sc8180x_usb3dpphy_cfg, - }, - { - .compatible = "qcom,sc8280xp-qmp-usb43dp-phy", - .data = &sc8280xp_usb43dpphy_combo_cfg, - }, - { - .compatible = "qcom,sdm845-qmp-usb3-dp-phy", - .data = &sdm845_usb3dpphy_cfg, - }, - { - .compatible = "qcom,sm8250-qmp-usb3-dp-phy", - .data = &sm8250_usb3dpphy_cfg, - }, - { } -}; -MODULE_DEVICE_TABLE(of, qmp_combo_of_match_table); - static const struct dev_pm_ops qmp_combo_pm_ops = { SET_RUNTIME_PM_OPS(qmp_combo_runtime_suspend, qmp_combo_runtime_resume, NULL) @@ -2815,6 +2790,31 @@ static int qmp_combo_probe(struct platform_device *pdev) return ret; } +static const struct of_device_id qmp_combo_of_match_table[] = { + { + .compatible = "qcom,sc7180-qmp-usb3-dp-phy", + .data = &sc7180_usb3dpphy_cfg, + }, + { + .compatible = "qcom,sc8180x-qmp-usb3-dp-phy", + .data = &sc8180x_usb3dpphy_cfg, + }, + { + .compatible = "qcom,sc8280xp-qmp-usb43dp-phy", + .data = &sc8280xp_usb43dpphy_combo_cfg, + }, + { + .compatible = "qcom,sdm845-qmp-usb3-dp-phy", + .data = &sdm845_usb3dpphy_cfg, + }, + { + .compatible = "qcom,sm8250-qmp-usb3-dp-phy", + .data = &sm8250_usb3dpphy_cfg, + }, + { } +}; +MODULE_DEVICE_TABLE(of, qmp_combo_of_match_table); + static struct platform_driver qmp_combo_driver = { .probe = qmp_combo_probe, .driver = { From patchwork Fri Nov 11 08:56:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18567 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626163wru; Fri, 11 Nov 2022 01:00:10 -0800 (PST) X-Google-Smtp-Source: AA0mqf7DIetpuCDtENAjJRgcr9nobDQEX4+Loa60RAH03JgHnuT7/LwrRZzoG+AehUGns2vR35hN X-Received: by 2002:a05:6402:2b88:b0:461:b825:d7cb with SMTP id fj8-20020a0564022b8800b00461b825d7cbmr623580edb.167.1668157210163; Fri, 11 Nov 2022 01:00:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157210; cv=none; d=google.com; s=arc-20160816; b=L2r9f1c31c54OK30XvM3Asbq2bf4uPDnstuudIpVay9eLBuCVAi5eyNta57icxw2ag TzUaa9uZlvAKQfWtVtln5U5gqQYOIS3R2Eo/MGWwEHnDBf7C6NaeBrVVSb4tzCO2p9/H 6wROk3gOyvG5te41pPsL3yhL2A3LzpepkyzjjzyM5J3t+2oK8DDn+lfdfQK+esNShLIo mGr4k7McAZIfg1tFU2IJDvuBGdLEqNuDsLEwvx1CUkTZcW8fj6aiKW+qt+s4WEbQ1VW1 GmXx9f0RUW+7ypsy+YLX7+E+gdW2LW2Vxmwemt6Iu4wwAzgiImPoNBUYnLCAzleMeEL/ jYgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ePtMYhK5Xx5laOMjrvdqzRhoqzpCt4cdHvp/cn686DM=; b=nfU48UGOEl0J8WYWkY/U/TrG8VNw6EbkgiAhElni7SDFWz21tu25H4jq+zTgWNsw3U g3RbVQwo0ihwJIBGAjS3jXfhRfdu8L7HTK6xWOHHsPx3R3BezWgAra5uyLdZadPd7x9O b8bNWWzStS0mRBLx5bQJ37aC5ehlDJo9Fjp8JobyncjSt2Ua35J2QE3UhKr/NXzlzk5p yJGJT+TsH30n1uVafp5jxKRnLsBKBd/VxuiE4/MuE9WvuzZHVKrtnzggNYnmBeoDeaKn Yxf+/kIT4hESMqD1abd8JKTcm4PtHlZvytEgwg+IRinWlWV5Hw2p4Q0YSwWtDg54po/C ztvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=cL2LKzyt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c26-20020a056402159a00b00463c5d64f30si1587055edv.557.2022.11.11.00.59.45; Fri, 11 Nov 2022 01:00:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=cL2LKzyt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233490AbiKKI6J (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233430AbiKKI51 (ORCPT ); Fri, 11 Nov 2022 03:57:27 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A97F7E98F; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 15346B82471; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B99E7C433D6; Fri, 11 Nov 2022 08:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157042; bh=5C1jlX48Nchjosb1BQmNB/f76zJc6sJZFDo1LuueAHo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cL2LKzytOHLTFSgAlq6dcatonUfAx1IbS/M6FwfHn2FLFNRRHhCkJXl3V1UHe/WcB 6FxG4lCSssoFbGaxrWrLCxb5Ykq4NIOAEx/2wyDWpGNhCyJtxUP8zOIv+sNbbncUqn dRSYe8BdNj6voTXiVX2UpOkTt9A/VmkuKuYcrLDCEuIdcq+ojqIvKJeCN7R9EjSogc Mei5LIiGAM2C/8b+KivMMZTwy70coBtwA4yqwqtcQU6aZqXuoeGjiBWTg02BsjJ69g 1b5Kl98CA59OaQZu/b0gQrG2bLu6+g1hbaY43en5EBN1q3s8LNZvLXS7+beHFNUhJx 53W4D+jqUcIXg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002Tt-2r; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 03/22] phy: qcom-qmp-combo: move pm ops Date: Fri, 11 Nov 2022 09:56:24 +0100 Message-Id: <20221111085643.9478-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189614778867274?= X-GMAIL-MSGID: =?utf-8?q?1749189614778867274?= Move the PM ops structure next to the implementation to keep the driver callbacks grouped. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index e7c8c4417142..2ac29b71d3b7 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2216,6 +2216,11 @@ static int __maybe_unused qmp_combo_runtime_resume(struct device *dev) return 0; } +static const struct dev_pm_ops qmp_combo_pm_ops = { + SET_RUNTIME_PM_OPS(qmp_combo_runtime_suspend, + qmp_combo_runtime_resume, NULL) +}; + static int qmp_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg) { struct qcom_qmp *qmp = dev_get_drvdata(dev); @@ -2646,11 +2651,6 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id, return 0; } -static const struct dev_pm_ops qmp_combo_pm_ops = { - SET_RUNTIME_PM_OPS(qmp_combo_runtime_suspend, - qmp_combo_runtime_resume, NULL) -}; - static int qmp_combo_probe(struct platform_device *pdev) { struct qcom_qmp *qmp; From patchwork Fri Nov 11 08:56:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18558 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp625821wru; Fri, 11 Nov 2022 00:59:17 -0800 (PST) X-Google-Smtp-Source: AA0mqf5HKVF+45HN/q+PTBiGUyZiuq3uJXlL7TFP87wiyAZVdS/al215Wf5LWiyrhJRixaF9JxWd X-Received: by 2002:a50:9f61:0:b0:463:b8dc:893f with SMTP id b88-20020a509f61000000b00463b8dc893fmr683723edf.28.1668157157243; Fri, 11 Nov 2022 00:59:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157157; cv=none; d=google.com; s=arc-20160816; b=yR5KxW42kU9rcsUpmXGmrIw7kXDOOYcGeL8mI0L06dHNfuAzx+ibONwf/AbesWA4J1 frI3PJ4N4RACH1qmUd9yJ1xiW17+IRIG8tvFUb2L1YF/PsDxvwgApvVFTeaEp3F0V+XG BzOfw57GVl0Rrg4nX9mcr9RYSEVA5cObZQeeSleXFwQEAZAXHb+lERtx3Q9Eeubtm3td tvj+kbu4pCenL5EZawCUIbjpivcC6t+B5dRE4RjAS3R6IGwKuZEJa+zMNo7ivf6MurM2 qYmHkTC/Rc1UwWb+/B4YbC9HPiK24F6X7Pm8wi36tX8VLFgqgUuiYnlYiJkmaDVUEBvm zDoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ROS2/afw++g0wOqRFIf4QccHH79GRHYXQYe92qIJ1F4=; b=yOluHORyD9Ml5G4BVH678L12tCDNH+1Yi9F0hoMaIjEVAcEA/j+nLf5YV2FIDzcpT3 DFLva4IrZydiWvOnQp5iReL7AeMVVLPAn7vvxOku5ntx5plOGYhBBghQ5dx/AMXmpZyc ThrOa6UdC6ugg3CqD6sZO4ru9jRePjtXZzDgOKzVDcZl6UAsuk+XPCaYClYZbTpQNw5v 9w2j1GjJyUVJZ7xwV1ZlOJDTZM54JymLtYRu8TKqPFj2ZBoKLW/b7FsWkzRO/t5sgEa5 i51+d7rXiu387lpwWvnvKPyJLDcGhfWUbuwdgPPnkhjVHIzVFqwVKrltWaAQ4+15954F qCXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Hr+iCVqa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nb36-20020a1709071ca400b007a45e4f4ff2si1885008ejc.853.2022.11.11.00.58.53; Fri, 11 Nov 2022 00:59:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Hr+iCVqa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233428AbiKKI50 (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231167AbiKKI5Y (ORCPT ); Fri, 11 Nov 2022 03:57:24 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0966B79D18; Fri, 11 Nov 2022 00:57:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 99ED661EFC; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8B40C43145; Fri, 11 Nov 2022 08:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=8dymqpuzXcztunwC+qLMQlrAR1UOIg2+qt0/dP7pvt4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hr+iCVqaHcQ81ybHqTryh/Vjay9sVzbzUN5Liko9sRi9WDwl6HPV8BD/FN5Wyk+4F CtY0Nxb8UB8Ofkku8HI/Dlfhhs9LBRU+EGPd3GC/FShdfu/JTrWcJoV+aU1LQa5xfb S1kBXGjDr05FlcrnfOtx4P4YLpILMZz5SEmyCU14cmPjK1woaIOubrPN6eVzPP94f/ HbKxM3egKSb3wWam7N3WKxC9Gxh3krqaxXVkPU3lE75RMhh4uCzhajmg09TC0eiT2T 22wEmzAUHfxdR3PlaWlpfT4bH/prJ/xisQ/yOIoJctrfSyJGg/a+TxbdtN/xuGWZmH 5KgPORDx5/b5A== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002Tv-52; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 04/22] phy: qcom-qmp-combo: rename PHY ops structures Date: Fri, 11 Nov 2022 09:56:25 +0100 Message-Id: <20221111085643.9478-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189559212138630?= X-GMAIL-MSGID: =?utf-8?q?1749189559212138630?= Rename the PHY operation structures so that they have a "phy_ops" suffix and move them next to the implementation. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 40 +++++++++++------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 2ac29b71d3b7..13800c2243e1 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2118,6 +2118,24 @@ static int qmp_combo_set_mode(struct phy *phy, enum phy_mode mode, int submode) return 0; } +static const struct phy_ops qmp_combo_usb_phy_ops = { + .init = qmp_combo_enable, + .exit = qmp_combo_disable, + .set_mode = qmp_combo_set_mode, + .owner = THIS_MODULE, +}; + +static const struct phy_ops qmp_combo_dp_phy_ops = { + .init = qmp_combo_init, + .configure = qcom_qmp_dp_phy_configure, + .power_on = qmp_combo_power_on, + .calibrate = qcom_qmp_dp_phy_calibrate, + .power_off = qmp_combo_power_off, + .exit = qmp_combo_exit, + .set_mode = qmp_combo_set_mode, + .owner = THIS_MODULE, +}; + static void qmp_combo_enable_autonomous_mode(struct qmp_phy *qphy) { const struct qmp_phy_cfg *cfg = qphy->cfg; @@ -2542,24 +2560,6 @@ static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static const struct phy_ops qmp_combo_usb_ops = { - .init = qmp_combo_enable, - .exit = qmp_combo_disable, - .set_mode = qmp_combo_set_mode, - .owner = THIS_MODULE, -}; - -static const struct phy_ops qmp_combo_dp_ops = { - .init = qmp_combo_init, - .configure = qcom_qmp_dp_phy_configure, - .power_on = qmp_combo_power_on, - .calibrate = qcom_qmp_dp_phy_calibrate, - .power_off = qmp_combo_power_off, - .exit = qmp_combo_exit, - .set_mode = qmp_combo_set_mode, - .owner = THIS_MODULE, -}; - static int qmp_combo_create(struct device *dev, struct device_node *np, int id, void __iomem *serdes, const struct qmp_phy_cfg *cfg) { @@ -2632,9 +2632,9 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id, } if (cfg->type == PHY_TYPE_DP) - ops = &qmp_combo_dp_ops; + ops = &qmp_combo_dp_phy_ops; else - ops = &qmp_combo_usb_ops; + ops = &qmp_combo_usb_phy_ops; generic_phy = devm_phy_create(dev, np, ops); if (IS_ERR(generic_phy)) { From patchwork Fri Nov 11 08:56:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18572 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626265wru; Fri, 11 Nov 2022 01:00:22 -0800 (PST) X-Google-Smtp-Source: AA0mqf7SNn5K4d44qAtEnXLDy7al67Jwhtpp/uncVHAPrkoA3AHfIwHP4m8xDrWwOvThk0uin2q8 X-Received: by 2002:a17:906:79a:b0:73d:715c:5730 with SMTP id l26-20020a170906079a00b0073d715c5730mr1090121ejc.293.1668157222527; Fri, 11 Nov 2022 01:00:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157222; cv=none; d=google.com; s=arc-20160816; b=0FiGYaP5lmsWGeQq6i6aEVTdadQFUUwdLTaHJJ2QZJkR/uhFqblyRbv/MGLRi0YEVS iaXhW5zw73Cdv7jGL6jP0IOlvH10tR/BHmhqe7O7puxYySUNxAF3yekb54byuXyI5zTj MFLHtliez3aRnAl32tGODKk1sxRqQZrQdIICKmN48Tv1+G5DxCmWuqkpbpsJGBE+E6D2 Sj2st1UYxYznATJ6oM4U8P/ErXxWIW2QpjhXPhfrHGjjc3NXhdyKwB3/jxCOgivdy0Cx 2k2Hjz7lJCHiL1GSQx02cBbIgqHjQ90V/hffdar/Ru249euqs7raG/1T9B3SYUC33IZD g3Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DAK+J6TIaGa4Xo1QRQj6IW1T6SbWQfwV5jmpnbcb4mo=; b=UT+tMeh/mlDeCtIJefOBy8sVxT3ZTQLsIIGWmHWprVS3Ohcxp4xPL7b3rpb9AL+JPb a7pOHNLGGG0XFzyyNNzgmTqwiVemrAuVVyBLviLRm7KJ6I+IC7A1yYPc9i8NWAhVnzLk LqXwkZegifWrCzivr4PKTrH0UMsQv+GKAnyH56EbEO5hxp0TwkLGICkQYJve1IPnT/0W O1cI0shHMIIoSaYttBwy4xlbymV1rgcU4IPPkhEuFghi39rr5x4kI0VNODrSGLUQcHqT GkOK30TemwAluY4ZzNZ5xcIANdd2c+Mr5Mca6K1Om8U23MiesE3iHhBldRR+l/pErALg CAzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="YEfts/lO"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 13800c2243e1..cec487560fd7 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2132,7 +2132,6 @@ static const struct phy_ops qmp_combo_dp_phy_ops = { .calibrate = qcom_qmp_dp_phy_calibrate, .power_off = qmp_combo_power_off, .exit = qmp_combo_exit, - .set_mode = qmp_combo_set_mode, .owner = THIS_MODULE, }; From patchwork Fri Nov 11 08:56:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18581 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp627333wru; Fri, 11 Nov 2022 01:02:26 -0800 (PST) X-Google-Smtp-Source: AA0mqf6OejDewmOw+97oMNq/xgaMwFAhpQ/WpVY6MJOzhRD1exZbo5O8A0pH0zqIFf5Z+KVbUEOw X-Received: by 2002:a17:902:d395:b0:187:3a54:9b93 with SMTP id e21-20020a170902d39500b001873a549b93mr1836773pld.2.1668157346337; Fri, 11 Nov 2022 01:02:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157346; cv=none; d=google.com; s=arc-20160816; b=HLWbvvxq/51aso1F8GKpt270y0mujGbWocock3dvrrQmvMWTjxz4VpK06owi9Z4EZq FcB1IRYliwT2hHuW9Hdb8+1EMMPd7r1Z+HTPGDH+QdYXj3ijDlaQRskSnDJoFkJ/oRxU VAikyVhq0byftfcPwlH4PZCcvkuHdBD4Wuopi2IDbmY/TAXYmb+wJrDkY05Y/3oztTmZ n2onoAmVNVh/4bHjkRNJ0JgJhhdIdm4BFOnL9hqD1mCzVgRq/kYQjo8ImK0yuOiHyIWS R9w8bxr1MFTf3BT47X5x8drziOlZDQV3z7i8W/iRWwICgSHCSy0NiVzMb4aaOS1rl5Am XQBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=i32wchHhySV3t1zu8rNTpTtY9Xh7yaUA7o3YejVIk0E=; b=uAJ6nNnGHxmDWQn6MetfaZ0L1BdpKlcx3MVcOiyZI3ikdfKwQHCjXEAz7TNKFtmdHl Fb6a/MJCl5DGW+g6uNAnCHBG6+f652WUap/bjADBsuIa1KegG65vPuFQZJMDOzYfSlVx k2UBXGy+4dwJItmOjXi2NkCyvKWvjhyNPaqSrIZzvCXaNZDcO+7VPiKw5IknlFxhpgzf cSdG+F/JrsaNIwF0MvYWa4N196CtIx/SxjSCBulBra25Lsw1fa6CcJIMedh3xx3gatZx WXiasxKcU78LxtpXcUzW7ybihLxJJUup4NQWwNqCMsv1B1p5uuO+Ouf+2hBDxV0T6SwU Xyeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bRtsd4n+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nl18-20020a17090b385200b00213b10313efsi7483724pjb.175.2022.11.11.01.02.12; Fri, 11 Nov 2022 01:02:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bRtsd4n+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233287AbiKKI6l (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233460AbiKKI52 (ORCPT ); Fri, 11 Nov 2022 03:57:28 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D3997C8EC; Fri, 11 Nov 2022 00:57:26 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id DB495B8247D; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2E053C4314E; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=i+5rmFasy+HGgD2rie4c9TgbQa/4v2XZWs6Frs5NDiI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bRtsd4n+QyCas2kMMqxpJoyNk8OATXZQVT6PZJQKixJX+627i3conExRA9/Kh+9Py gxpvPDdz5XXy368p3ZzkwI5tJ2kuagtne2wThvBboFGV7P93aAfwzHpb9LC4+nSrHo 2raRnE1QUXSfMnrQnVjwmMK8UXWv3mk23HwhVC6LBkr44zykaPR1qmHmqfZ9268D5A Jn6IizBfnuMOzA+G9hU5RAeFXKEDH+FDzGCisAv2Tee95x4k47vUm8eMdkoF6y4jHL pJ7TiIe1CGRbBZAWCkOUqxWqh+7r3vdshWVgmJs+EdjSM8Zdf9enPO8mMtioUtb2HF tpBbJrzb4ic/w== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002U2-9i; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 06/22] phy: qcom-qmp-combo: rename USB PHY ops Date: Fri, 11 Nov 2022 09:56:27 +0100 Message-Id: <20221111085643.9478-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189757725082534?= X-GMAIL-MSGID: =?utf-8?q?1749189757725082534?= Add a "usb" infix to the USB PHY operation functions and name them after the corresponding operations (e.g. "init" rather than "enable"). Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index cec487560fd7..bf0874d22d91 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2084,7 +2084,7 @@ static int qmp_combo_exit(struct phy *phy) return 0; } -static int qmp_combo_enable(struct phy *phy) +static int qmp_combo_usb_init(struct phy *phy) { int ret; @@ -2099,7 +2099,7 @@ static int qmp_combo_enable(struct phy *phy) return ret; } -static int qmp_combo_disable(struct phy *phy) +static int qmp_combo_usb_exit(struct phy *phy) { int ret; @@ -2109,7 +2109,7 @@ static int qmp_combo_disable(struct phy *phy) return qmp_combo_exit(phy); } -static int qmp_combo_set_mode(struct phy *phy, enum phy_mode mode, int submode) +static int qmp_combo_usb_set_mode(struct phy *phy, enum phy_mode mode, int submode) { struct qmp_phy *qphy = phy_get_drvdata(phy); @@ -2119,9 +2119,9 @@ static int qmp_combo_set_mode(struct phy *phy, enum phy_mode mode, int submode) } static const struct phy_ops qmp_combo_usb_phy_ops = { - .init = qmp_combo_enable, - .exit = qmp_combo_disable, - .set_mode = qmp_combo_set_mode, + .init = qmp_combo_usb_init, + .exit = qmp_combo_usb_exit, + .set_mode = qmp_combo_usb_set_mode, .owner = THIS_MODULE, }; From patchwork Fri Nov 11 08:56:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18559 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp625845wru; Fri, 11 Nov 2022 00:59:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf4H9VFKZW/7px7Gt0zxSpS2R3yedNr7iASCIcYMgfqIt7bSYmSuAPoyDwXugmsstWfARuRj X-Received: by 2002:a05:6402:f03:b0:463:e963:5149 with SMTP id i3-20020a0564020f0300b00463e9635149mr622086eda.219.1668157163581; Fri, 11 Nov 2022 00:59:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157163; cv=none; d=google.com; s=arc-20160816; b=I4KburNcnNXIHMLNRJxJH928E7AqHPROm06Y97/9NLc0c9UI6w+vx/7/+o2XMAFMMX RgakjZbudmyy9fMp9IGA6mK0dzdAn0L0Q3u4WCdHaZczJ4UwPuQ9qSlhcrlv8ZiFvSkY 4g9cqu9Zg8nUKNztUbPrsotxcw+hIjsGdIev4KFXpUiCtBZEmsibnWcn+Ry5BeQv3W0G hO54K6JOYrZWzC1bKc27q5TDQIFYABeDBwPpG4VLMfGEFpBBkAb6a38Tfcc9M3SRWJIY Z4ShddyOah2yrI+guC1QAXTzcY1sSEduVZ0t/cXAu9Bl8jyPCwcEEMWDmmTO/yqfQahM RiWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sIeluqYliPSWpQj8zXzqq2wZqnizNr290oJURK4Clms=; b=scGKpoiizoIZvnk9yevzEtDGDPKeqxbIqvIAuzApgSiW17t9evALkd9b/ErOWO2byo IyWAqg+QyXCKQpeoJuQUT3LA2BXGCu9BZTlfRJ/Bx8nW49UJ3VMqTAxWVMD2Bamrcetv gUkYHaxfBXunLGu7ED1EQMcN65dERkmntpwTHtROtcRbP5yIbIOh/kp1xidw679qXhX4 iq1QVgVNPIoMDyhxyPGQyoAQQusoAyt8afC1uvkNTcwYRI9AtxToQTBkJLDYpAvH0WG7 1+DsiOrpnOjKogfPfb3/fOyA3VJ8XWd3QA7RijUw/xmQPDyXlMA4aGAj/jXi4YCfCc9I tiAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Sy3FsnIK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index bf0874d22d91..ae04f6219fd2 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1967,10 +1967,8 @@ static int qmp_combo_com_exit(struct qmp_phy *qphy) static int qmp_combo_init(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; const struct qmp_phy_cfg *cfg = qphy->cfg; int ret; - dev_vdbg(qmp->dev, "Initializing QMP phy\n"); ret = qmp_combo_com_init(qphy); if (ret) From patchwork Fri Nov 11 08:56:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18579 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626944wru; Fri, 11 Nov 2022 01:01:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf5S9P187Y52EWHy+Aj0WyPvJCmZ0bgxafA5T+PPCryBiN35+Zr3ALAxbZ8g3lr5BiNIFnkr X-Received: by 2002:a05:6402:70e:b0:459:7673:6f33 with SMTP id w14-20020a056402070e00b0045976736f33mr670278edx.30.1668157303138; Fri, 11 Nov 2022 01:01:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157303; cv=none; d=google.com; s=arc-20160816; b=El3RyZTvtrOh9TYvS9Ada/bwdTS8elqs1gbNEsxbolE0pN2K/1YJa66H7PcfslotNW ofFPTeim94001fqDH5b1ykYYOh6TylXxFKP3kYfpKDHuddEkbBPmqxUbu8NnRljAAVmM BtZrJOiR4QeWi+C51Cihp+X1ZA5C4aNA88z8BgvD8hHyP9FqKF46gT5Fsp3yqN3cgaqI WtdNTBg1ZY46V4qDeBmngvBlngn8dcEzhg2H+Hh+gRZDfvCxq7rmwSAHI/pxKcqj9b+t NcSmr8ezE59onA7J4DBd8Vsyn9DeP9Vq9XRd0l8j+R6hBoDcP4xj9R9zidjIEQrGfDvJ 9IEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+m/oU0ErpRfT3pHymIPVwwbpVNHZA1BQkFmrpnC1kzs=; b=lHJ0jm6mBr6wyKsOJDKkc+r5B5brZyHGyohCSpLPfuCs5+dhKwSFuRyQm/E5+6CQnA 6XnMKhfCNtedOi+FhUeIjT6t8Mh27TODf/aSJaYuQcKb5B1/8Em33niOOHnZzNjG7Fzb C3uSVjygxVcf+9YvFzaj+Do23tzQyt3W5FSMy3JlyA0Pt5oyXTXmmlJZPHFde+TEVhtW AZVt4T7tN8+AYnaVJ2lP/V1dP+6GT/cWAf7ddmfqYn0pCyWmULKZDPM4d6I/irM7c4mA 39qCUCBAeJd7HBkPMW1vTHnGTIss65zo+C23FF+Di1uIGkZbhxv0ArYT6wzD4VgpRMqh /BxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=oxhMWewm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g13-20020a1709065d0d00b007adfe2889efsi1430168ejt.607.2022.11.11.01.01.15; Fri, 11 Nov 2022 01:01:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=oxhMWewm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233509AbiKKI5j (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233384AbiKKI5Z (ORCPT ); Fri, 11 Nov 2022 03:57:25 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B41467C8D0; Fri, 11 Nov 2022 00:57:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 38C1361EFE; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F7D9C43166; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=zZ3R6y73sAEmGUBnoaMqt7CyCvH2RDT2V8L5CYQqJvM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oxhMWewmJZN7bkeAxI7wKBy/HmVmuHaVdhNt+xX5XrOo/S8e/GJNrCChBqSmF3sB0 XMUQ3Mgq1vk31ygaxjj6glEszZIl8WNcQkDT/hNTMet5dOhHDvHAiqYMx39+ArsdSO 3k6RFhlC2pyCJc4KinFnTCTIpDVuk/PfrPPxoxEYWfskcgpvM+SOqontdikEkRnfO+ 2Q08sniNOsr7pEw/oqqIPuP4qfYz0AeXNhMtogEe1JbfB2BHqyoQxpbGdCL0zo/P/H kxoHPIai4+9s2ZI5Ivcx3kHjObX2kJPGT2VxFLUMVnY7EUJsWhyRuWg3a0irGCgw6f 47BqEmbI34dcQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002U7-FY; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 08/22] phy: qcom-qmp-combo: separate USB and DP init ops Date: Fri, 11 Nov 2022 09:56:29 +0100 Message-Id: <20221111085643.9478-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189711999762400?= X-GMAIL-MSGID: =?utf-8?q?1749189711999762400?= Separate the USB and DP init and exit operations by calling the common initialisation code directly from the USB operation and adding a "dp" infix to the DP callbacks. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 36 ++++++++++++----------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index ae04f6219fd2..5d985195df38 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1964,7 +1964,7 @@ static int qmp_combo_com_exit(struct qmp_phy *qphy) return 0; } -static int qmp_combo_init(struct phy *phy) +static int qmp_combo_dp_init(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg = qphy->cfg; @@ -1974,8 +1974,16 @@ static int qmp_combo_init(struct phy *phy) if (ret) return ret; - if (cfg->type == PHY_TYPE_DP) - cfg->dp_aux_init(qphy); + cfg->dp_aux_init(qphy); + + return 0; +} + +static int qmp_combo_dp_exit(struct phy *phy) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + + qmp_combo_com_exit(qphy); return 0; } @@ -2073,38 +2081,32 @@ static int qmp_combo_power_off(struct phy *phy) return 0; } -static int qmp_combo_exit(struct phy *phy) -{ - struct qmp_phy *qphy = phy_get_drvdata(phy); - - qmp_combo_com_exit(qphy); - - return 0; -} - static int qmp_combo_usb_init(struct phy *phy) { + struct qmp_phy *qphy = phy_get_drvdata(phy); int ret; - ret = qmp_combo_init(phy); + ret = qmp_combo_com_init(qphy); if (ret) return ret; ret = qmp_combo_power_on(phy); if (ret) - qmp_combo_exit(phy); + qmp_combo_com_exit(qphy); return ret; } static int qmp_combo_usb_exit(struct phy *phy) { + struct qmp_phy *qphy = phy_get_drvdata(phy); int ret; ret = qmp_combo_power_off(phy); if (ret) return ret; - return qmp_combo_exit(phy); + + return qmp_combo_com_exit(qphy); } static int qmp_combo_usb_set_mode(struct phy *phy, enum phy_mode mode, int submode) @@ -2124,12 +2126,12 @@ static const struct phy_ops qmp_combo_usb_phy_ops = { }; static const struct phy_ops qmp_combo_dp_phy_ops = { - .init = qmp_combo_init, + .init = qmp_combo_dp_init, .configure = qcom_qmp_dp_phy_configure, .power_on = qmp_combo_power_on, .calibrate = qcom_qmp_dp_phy_calibrate, .power_off = qmp_combo_power_off, - .exit = qmp_combo_exit, + .exit = qmp_combo_dp_exit, .owner = THIS_MODULE, }; From patchwork Fri Nov 11 08:56:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18565 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626141wru; Fri, 11 Nov 2022 01:00:07 -0800 (PST) X-Google-Smtp-Source: AA0mqf7dlGAg38Dnppyb7qvyadplj/ro66h2yRa3I+J2YZ2erEaBHRTZsFGYyg1Jgu0qCbU0PXFY X-Received: by 2002:aa7:c9c2:0:b0:45c:c64d:a6ac with SMTP id i2-20020aa7c9c2000000b0045cc64da6acmr578619edt.416.1668157207782; Fri, 11 Nov 2022 01:00:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157207; cv=none; d=google.com; s=arc-20160816; b=xMvPfbPBNyzlRLpxkTuGTY38Lba1JnurYdWCeTKxAXbmamUNdrvqI1zpI0e1ljJFcN JtxEPqvN8WrQcHthvgIK697IZw9JjtcjId3ppPXKWwrs43ADuEYQv/5ba0OK3i4+/VEy VYt1sJU4ovTeNCNyYBSYGiCajvO6VgyCiyo/Bus2geVSaRHsGwt/i7jqhQZvFJt4/WmO XIrseK4GHFmYGx+vICML3vk3yjYYrFCWgAKoQOJ2zUJFAUKG6v7DGM/LIM0nRGtIYbty hNLgfo+oYPanzQwYJeHSfdniBNevoi8U+D1OSegig/TqoSCIpzE5AwqxzWIU0CCnhuOn 7b4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uBs3nJJGsMStlJaJkL4l1ZY9LkVN2V2/x95yBtAWyLU=; b=fcz2PkP9IVW9RAfLSxndU+94MYKXu7SCmaW18go98xDywoz4oOwx8K8kuklQWglQuC kBKF/8fSc8JJGyjCvYhEtY84yIWLY/C5N4gHw+DoAFUcFm8NX4o0Xey5ICq+fkbz3qLa 631gIw1vBYLVv9Fftl9Ng9N8uN2G9aMcKypVRHAPqRHSyp458r4QMI1dU2CiunMEQ7EN irESL2k4opK7c8yhhST2Stnw/fs5wMYRaO2APuhIibM2znP2/UCXv4k1vyPa9G+io8Cz +fcwKJea1k5zfNxT8HGkLjYYKjXOITL1u/5ginrG5zc/xOOvdV+SQ4Ah1Dd+CoLtCLHl 0AiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mxDnJheg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a2-20020a1709065f8200b0078db594808dsi1079039eju.588.2022.11.11.00.59.42; Fri, 11 Nov 2022 01:00:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mxDnJheg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233521AbiKKI5m (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233394AbiKKI5Z (ORCPT ); Fri, 11 Nov 2022 03:57:25 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8DE87C8EC; Fri, 11 Nov 2022 00:57:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 562D061EFD; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 52AC8C43162; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=UcjQPB9m1Y/nqixRql/KGV5QHSLIloXxZBPzAAJt1eI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mxDnJheg/YmYxRIQJfUkUj4qVyKalxgGT27Fvr4wfAPP6SMAPYly3BjLR5ES59b1Y U6eX2/ZH4tyxfxGJeIX39eUgD83JKRrjlv6LE/Ez2VKkw7fLyKNcj5ZKSuGOCn+b+b 6xJRxrh2k4epKNbBvm7WxbgFLp77C/mYFzcgiVkOsrElk1vZNvPmA1RlhM/nByi7Cz NX784g06yky8g/DCyvd8yoetlG82kz5avkVWzziKwTMiaJQ74etK9RbY0seRWeJWZ8 P6yBvvOrS7G+D0EimD3TEut1OOWEFUeqNiLeBE4TNrFgfhT+iC3v77r7W2Qmw4Lv4g JpCujZxRRxkHg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002UA-In; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 09/22] phy: qcom-qmp-combo: rename DP PHY ops Date: Fri, 11 Nov 2022 09:56:30 +0100 Message-Id: <20221111085643.9478-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189612274763738?= X-GMAIL-MSGID: =?utf-8?q?1749189612274763738?= Rename the configure and calibrate DP PHY ops using the common prefix for consistency. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 5d985195df38..7392ae460fd7 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1842,7 +1842,7 @@ static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_phy *qphy) return 0; } -static int qcom_qmp_dp_phy_configure(struct phy *phy, union phy_configure_opts *opts) +static int qmp_combo_dp_configure(struct phy *phy, union phy_configure_opts *opts) { const struct phy_configure_opts_dp *dp_opts = &opts->dp; struct qmp_phy *qphy = phy_get_drvdata(phy); @@ -1857,7 +1857,7 @@ static int qcom_qmp_dp_phy_configure(struct phy *phy, union phy_configure_opts * return 0; } -static int qcom_qmp_dp_phy_calibrate(struct phy *phy) +static int qmp_combo_dp_calibrate(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg = qphy->cfg; @@ -2127,9 +2127,9 @@ static const struct phy_ops qmp_combo_usb_phy_ops = { static const struct phy_ops qmp_combo_dp_phy_ops = { .init = qmp_combo_dp_init, - .configure = qcom_qmp_dp_phy_configure, + .configure = qmp_combo_dp_configure, .power_on = qmp_combo_power_on, - .calibrate = qcom_qmp_dp_phy_calibrate, + .calibrate = qmp_combo_dp_calibrate, .power_off = qmp_combo_power_off, .exit = qmp_combo_dp_exit, .owner = THIS_MODULE, From patchwork Fri Nov 11 08:56:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18561 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp625999wru; Fri, 11 Nov 2022 00:59:50 -0800 (PST) X-Google-Smtp-Source: AA0mqf5SdXpo3PC8RmyEwzmC9b5+rIzA0ONmlaeSzIxEdyj95x2+ih9EL3tTcNwJz1+MhNispkyd X-Received: by 2002:a17:906:4b03:b0:7ae:c9ae:938d with SMTP id y3-20020a1709064b0300b007aec9ae938dmr875386eju.313.1668157190452; Fri, 11 Nov 2022 00:59:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157190; cv=none; d=google.com; s=arc-20160816; b=kwXFrXz60Ylg43XohmdKkWBqJFoALLM149kzPSYb4VCvwZAf12Mjqq/hP8K9TaUr2l Z+jVPWvZFuehxzKYsYsPD01qZywOktV76Sloralb60EIv9s/gYTWgxWDDn/4D/97sAk9 Og5V3pEPNOmSU/zRUABSVJuscwRhfgF7cbL3z4e0zZ+nporPaR6BayfsXFHOhLbqmC1R t7vgrAaJO54WI8TkWGl7Yeveb0/wH0CzRdh9lk8LFkKW1Rhgr+5b+mnEhHa58a+kHKpq dKjL1cFmvDKxKSev2FhS8MI31KDI3QgYK7Y5es1z/cAYT9wl5bYsJIX3dYPeLZVlb3jN zrNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Cf5xrm2FWe0YFLFqX+3w47sOieaJ9MgqzIkily+28Qo=; b=fqlfl4aECO8vrKUIUdYs5v9LUHD3iKRyoDF0xy0mtaI6Mg9aCHQ4Z/n6xJxyRXNKEG 4Tdu9SdaBQGJKuu15X3mm1ANkWC+vrNzaY5EeyjGy56DkieZWAxeg06b/F7lqR7XEJpO Oi0A18BYojWekCbiSOdhaTOYHRGbVYDqt4XEvTKKmjqn7GDSADZIEFfyKWTJKx4SDMfe 1BwCLJ3TNPEQRroIAd5Mb6SzgCLezJOfTNDbM+ExMIgviFd8vul9JLyi5SSnph5FYWcx Ex0TEur7BkjvAqHwurMX527mbb+A8ktTQUWAigMgFMH5cNzjNFd179zSgi+dtn5ljhEb ofWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=peUVhivv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dt5-20020a170907728500b007ae10525563si1673528ejc.991.2022.11.11.00.59.26; Fri, 11 Nov 2022 00:59:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=peUVhivv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233530AbiKKI5r (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233441AbiKKI50 (ORCPT ); Fri, 11 Nov 2022 03:57:26 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FD327E988; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BD7F661EFC; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E502C4167C; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=NgYqnu8giu7mnMoKrxclBRtmdNwR4xrGTvQFfeAwZww=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=peUVhivvhcY8gHVz8f1ZLnUO5lybtKm/A4VqccPFko5OhTjv96Lc7Z9/Q2HCv9RDw 07RyFMhr4Kwa2NE7rr2k3GYINAd/11WtyiKbbpDWIuzO9nc5nlUESIJ+pDRvhJGkMW 14cEps5+c+MHYHXARNdTlZc1GvZeiuGQLlg0uHHLm7MTVGUeVAl4RPuGGzrJCJG+M3 3shnscoaY81DKjuprSv8eSkrgKes3cWm39GeGCvQ+/w9hzfhc90SEIZOprfgWQole0 C+ea01kFQipQmEHvDAcj/hSZuKxjg0lcjWqY5DqNd17wos2QhmRk1EeGSe5XiFvAPL zxKepYZKM9FZQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002UD-LK; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 10/22] phy: qcom-qmp-combo: separate USB and DP power-on ops Date: Fri, 11 Nov 2022 09:56:31 +0100 Message-Id: <20221111085643.9478-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189594224099802?= X-GMAIL-MSGID: =?utf-8?q?1749189594224099802?= Separate the USB and DP power-on and power-off operations in two dedicated implementations. Note that the pipe clock is only used by the USB part of the PHY and that no DP configuration has a pcs (or rx) table or has has_pwrdn_delay set. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 100 +++++++++++++--------- 1 file changed, 59 insertions(+), 41 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 7392ae460fd7..748fd32a6f72 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1988,7 +1988,39 @@ static int qmp_combo_dp_exit(struct phy *phy) return 0; } -static int qmp_combo_power_on(struct phy *phy) +static int qmp_combo_dp_power_on(struct phy *phy) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qphy->cfg; + void __iomem *tx = qphy->tx; + + qmp_combo_serdes_init(qphy); + + qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); + + if (cfg->lanes >= 2) + qmp_combo_configure_lane(qphy->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); + + /* Configure special DP tx tunings */ + cfg->configure_dp_tx(qphy); + + /* Configure link rate, swing, etc. */ + cfg->configure_dp_phy(qphy); + + return 0; +} + +static int qmp_combo_dp_power_off(struct phy *phy) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + + /* Assert DP PHY power down */ + writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); + + return 0; +} + +static int qmp_combo_usb_power_on(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); struct qcom_qmp *qmp = qphy->qmp; @@ -2014,39 +2046,30 @@ static int qmp_combo_power_on(struct phy *phy) if (cfg->lanes >= 2) qmp_combo_configure_lane(qphy->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); - /* Configure special DP tx tunings */ - if (cfg->type == PHY_TYPE_DP) - cfg->configure_dp_tx(qphy); - qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); if (cfg->lanes >= 2) qmp_combo_configure_lane(qphy->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); - /* Configure link rate, swing, etc. */ - if (cfg->type == PHY_TYPE_DP) - cfg->configure_dp_phy(qphy); - else - qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); + qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); if (cfg->has_pwrdn_delay) usleep_range(10, 20); - if (cfg->type != PHY_TYPE_DP) { - /* Pull PHY out of reset state */ - qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); - /* start SerDes and Phy-Coding-Sublayer */ - qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], - SERDES_START | PCS_START); + /* Pull PHY out of reset state */ + qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); - status = pcs + cfg->regs[QPHY_PCS_STATUS]; - ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 200, - PHY_INIT_COMPLETE_TIMEOUT); - if (ret) { - dev_err(qmp->dev, "phy initialization timed-out\n"); - goto err_disable_pipe_clk; - } + /* start SerDes and Phy-Coding-Sublayer */ + qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START); + + status = pcs + cfg->regs[QPHY_PCS_STATUS]; + ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 200, + PHY_INIT_COMPLETE_TIMEOUT); + if (ret) { + dev_err(qmp->dev, "phy initialization timed-out\n"); + goto err_disable_pipe_clk; } + return 0; err_disable_pipe_clk: @@ -2055,28 +2078,23 @@ static int qmp_combo_power_on(struct phy *phy) return ret; } -static int qmp_combo_power_off(struct phy *phy) +static int qmp_combo_usb_power_off(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg = qphy->cfg; clk_disable_unprepare(qphy->pipe_clk); - if (cfg->type == PHY_TYPE_DP) { - /* Assert DP PHY power down */ - writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); - } else { - /* PHY reset */ - qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); + /* PHY reset */ + qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); - /* stop SerDes and Phy-Coding-Sublayer */ - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], - SERDES_START | PCS_START); + /* stop SerDes and Phy-Coding-Sublayer */ + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], + SERDES_START | PCS_START); - /* Put PHY into POWER DOWN state: active low */ - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - SW_PWRDN); - } + /* Put PHY into POWER DOWN state: active low */ + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + SW_PWRDN); return 0; } @@ -2090,7 +2108,7 @@ static int qmp_combo_usb_init(struct phy *phy) if (ret) return ret; - ret = qmp_combo_power_on(phy); + ret = qmp_combo_usb_power_on(phy); if (ret) qmp_combo_com_exit(qphy); @@ -2102,7 +2120,7 @@ static int qmp_combo_usb_exit(struct phy *phy) struct qmp_phy *qphy = phy_get_drvdata(phy); int ret; - ret = qmp_combo_power_off(phy); + ret = qmp_combo_usb_power_off(phy); if (ret) return ret; @@ -2128,9 +2146,9 @@ static const struct phy_ops qmp_combo_usb_phy_ops = { static const struct phy_ops qmp_combo_dp_phy_ops = { .init = qmp_combo_dp_init, .configure = qmp_combo_dp_configure, - .power_on = qmp_combo_power_on, + .power_on = qmp_combo_dp_power_on, .calibrate = qmp_combo_dp_calibrate, - .power_off = qmp_combo_power_off, + .power_off = qmp_combo_dp_power_off, .exit = qmp_combo_dp_exit, .owner = THIS_MODULE, }; From patchwork Fri Nov 11 08:56:32 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id du7-20020a17090772c700b0078db6f5f4b2si1534252ejc.546.2022.11.11.01.00.20; Fri, 11 Nov 2022 01:00:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Lw+V+7JF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233630AbiKKI65 (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233470AbiKKI53 (ORCPT ); Fri, 11 Nov 2022 03:57:29 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47BB27E9A6; Fri, 11 Nov 2022 00:57:28 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 8B29AB82476; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85E2EC4FEBE; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=nWXsAtVF3OLE/Q7SzT/JJOzcMNVMOqmBow0B6bqTAQ8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lw+V+7JFWvL6CAtkw01384p9gGqy9PJamLZQ+LdL35klKe8wxEXphsXiKQI37QjxF 3O1AbVavdV3DXEIXVy5+ZD7ygvutZ9EmAarpvbL3/Qhz28IqdormsDeDm/wMhC3z9k QMF6uLn7nXoaXhdyLAL/WXwq3lqDh5uOHLPJR1r1IiZj3nY5vo1J1dh1oaa7uN+Vi3 i0r8Nh1EIUWFupuiwozqQL4ZemK1ZNeDzJB9NAXm0a8eRgX+U37+5xnH7qk11NDVX9 qjdDnbCz92nl18BWidMJXWtBwAOFIeNbG8WjHmHD+YO23rHsTQgElnHcjmN5H0eEX4 B8kcAtVred9kQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002UH-OC; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 11/22] phy: qcom-qmp-combo: clean up serdes initialisation Date: Fri, 11 Nov 2022 09:56:32 +0100 Message-Id: <20221111085643.9478-12-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189651069522696?= X-GMAIL-MSGID: =?utf-8?q?1749189651069522696?= Clean up serdes initialisation somewhat by making the current helper a dedicated helper for the DP part of the PHY. Note that no error is currently returned for non-supported link rates. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 49 +++++++++++------------ 1 file changed, 24 insertions(+), 25 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 748fd32a6f72..c059e4aeecdb 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1313,7 +1313,7 @@ static void qmp_combo_configure(void __iomem *base, qmp_combo_configure_lane(base, tbl, num, 0xff); } -static int qmp_combo_serdes_init(struct qmp_phy *qphy) +static int qmp_combo_dp_serdes_init(struct qmp_phy *qphy) { const struct qmp_phy_cfg *cfg = qphy->cfg; void __iomem *serdes = qphy->serdes; @@ -1323,28 +1323,26 @@ static int qmp_combo_serdes_init(struct qmp_phy *qphy) qmp_combo_configure(serdes, serdes_tbl, serdes_tbl_num); - if (cfg->type == PHY_TYPE_DP) { - switch (dp_opts->link_rate) { - case 1620: - qmp_combo_configure(serdes, cfg->serdes_tbl_rbr, - cfg->serdes_tbl_rbr_num); - break; - case 2700: - qmp_combo_configure(serdes, cfg->serdes_tbl_hbr, - cfg->serdes_tbl_hbr_num); - break; - case 5400: - qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2, - cfg->serdes_tbl_hbr2_num); - break; - case 8100: - qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3, - cfg->serdes_tbl_hbr3_num); - break; - default: - /* Other link rates aren't supported */ - return -EINVAL; - } + switch (dp_opts->link_rate) { + case 1620: + qmp_combo_configure(serdes, cfg->serdes_tbl_rbr, + cfg->serdes_tbl_rbr_num); + break; + case 2700: + qmp_combo_configure(serdes, cfg->serdes_tbl_hbr, + cfg->serdes_tbl_hbr_num); + break; + case 5400: + qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2, + cfg->serdes_tbl_hbr2_num); + break; + case 8100: + qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3, + cfg->serdes_tbl_hbr3_num); + break; + default: + /* Other link rates aren't supported */ + return -EINVAL; } return 0; @@ -1994,7 +1992,7 @@ static int qmp_combo_dp_power_on(struct phy *phy) const struct qmp_phy_cfg *cfg = qphy->cfg; void __iomem *tx = qphy->tx; - qmp_combo_serdes_init(qphy); + qmp_combo_dp_serdes_init(qphy); qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); @@ -2025,6 +2023,7 @@ static int qmp_combo_usb_power_on(struct phy *phy) struct qmp_phy *qphy = phy_get_drvdata(phy); struct qcom_qmp *qmp = qphy->qmp; const struct qmp_phy_cfg *cfg = qphy->cfg; + void __iomem *serdes = qphy->serdes; void __iomem *tx = qphy->tx; void __iomem *rx = qphy->rx; void __iomem *pcs = qphy->pcs; @@ -2032,7 +2031,7 @@ static int qmp_combo_usb_power_on(struct phy *phy) unsigned int val; int ret; - qmp_combo_serdes_init(qphy); + qmp_combo_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); ret = clk_prepare_enable(qphy->pipe_clk); if (ret) { From patchwork Fri Nov 11 08:56:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18563 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626037wru; Fri, 11 Nov 2022 00:59:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf7drwroNFn9zwZKoebkooPLs4MnX0BkZUNq+RxiIznTf3bPKF0rWMAAyVWv7eqCOmSZf97q X-Received: by 2002:a17:906:6d88:b0:7aa:7c3f:8603 with SMTP id h8-20020a1709066d8800b007aa7c3f8603mr1122338ejt.322.1668157194891; Fri, 11 Nov 2022 00:59:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157194; cv=none; d=google.com; s=arc-20160816; b=Kv6nIJjlDDzTnQm1Xg0vZqMIc7Loq7CaemA66gsmOZ5HQhZxJTJgvkczo3Sgfonp4I vdzxSt9RQsh6Gk4j1vbZVEGGqjOPVWXtfvrueScmkc9RODCCHlql1H0EFhDptxpN8gxL eoR1zzCXbiCkFTghb4XFRtDfowJTmqPNJe8mlWVAHNbwzYTjDPWyfVnPNkxFHfbY0b8H FpVwhr812Dq9c7haV3Pg0YQjVbbaEtx+6MO6mKujjLYZPnBTraddY6i2dPK+8+EjgLoE cQhXnpdB28dJY+XX98ecwo4hkUSZjSVp5sHHHRaRlOSIJ5eWV+WfNT0jCXM1jsOns53M A/QA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sBKmQVBDOuvU/tUEjaneOFQgTgZ1lpQ3dm0CtlJfZUw=; b=flxZ1zgOtHYwSV41yzFLWkIWn6DEm2nNmXjtJzD0f9jhZ/uz1lgVggevlgNBOvifQD dqDYO/TIQDLfvhw1qy2N5eUYJ8zXJ+qvMC9al1jzV9bn0CSd6EROSuIEz4nN16ZjujOW VDGs5H568yUE4b+lvBPcpHZFNj8003nLWJnYDtOj2zafkPCQW7P7dwnk5kp9oVTsjc7i kF/6o+TDJj4mg0XvR4BuAR6GxGFIUMrbFsnhFHC1VqYhYpxAhoCf0cGRu1HVsFcG0HN2 prqr7k4nTW1zmidtrqPdz+1y3N8TgL/cDBRoe+8nqWIHM8VS863ZqQz+Tl4fL2hFCs3d yCKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=rfxiPQRH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id co2-20020a0564020c0200b0045d25cf222csi1719609edb.362.2022.11.11.00.59.30; Fri, 11 Nov 2022 00:59:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=rfxiPQRH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233536AbiKKI5w (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233439AbiKKI50 (ORCPT ); Fri, 11 Nov 2022 03:57:26 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D9FB7833D; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CF1C861EF7; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 821EBC43470; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=fh/aqnYcDidigo48XuRvbr/aFFT5zxzhUQfJq7vVMG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rfxiPQRHfzAt95l4LJpnuAF7Pzw9Gp4/ZwqO7Zty+yVe2Tcu+BxnblSQCqryF4dQO mkDuzFRtapMYFAb9TcOSgQ0URJkzPbYIvXa4fladf71F2b2PmI5i3f8c8Qsy2aZL3z UEqNc+UHxvOpQQVmPVe9xGBajROG+/nsSs/Y/qVlnMqqv/0HMP4CfRRWgtraYSJ2+7 CiMZOO/05485peqK96J84zq0vypzJ2JeSZK860g+PTWy3Dduud8HQkd1iZ2irYL6uR 3Ghg1ykCjXX/Rm5SupmugRq5nfX0CmpCHuOnVjCHvf+Sm6yvqrKqzsNiA+G+Ea0w+j BxeW51ad7bBtg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002UK-RQ; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 12/22] phy: qcom-qmp-combo: separate USB and DP devicetree parsing Date: Fri, 11 Nov 2022 09:56:33 +0100 Message-Id: <20221111085643.9478-13-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189598727464021?= X-GMAIL-MSGID: =?utf-8?q?1749189598727464021?= Separate the devicetree parsing of the USB and DP child nodes in two dedicated helpers in preparation for merging the driver data. Note that only the USB part of the PHY has a pipe clock and that the DP implementation only uses the tx/tx2 and pcs register regions. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 81 ++++++++++++++++------- 1 file changed, 58 insertions(+), 23 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index c059e4aeecdb..52a00b51f09a 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2576,13 +2576,63 @@ static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static int qmp_combo_create(struct device *dev, struct device_node *np, int id, +static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int id, + void __iomem *serdes, const struct qmp_phy_cfg *cfg) +{ + struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct phy *generic_phy; + struct qmp_phy *qphy; + int ret; + + qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); + if (!qphy) + return -ENOMEM; + + qphy->cfg = cfg; + qphy->serdes = serdes; + /* + * Get memory resources for each PHY: + * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. + * For dual lane PHYs: tx2 -> 3, rx2 -> 4, pcs_misc (optional) -> 5 + * For single lane PHYs: pcs_misc (optional) -> 3. + * + * Note that only tx/tx2 and pcs are used by the DP implementation. + */ + qphy->tx = devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(qphy->tx)) + return PTR_ERR(qphy->tx); + + qphy->pcs = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qphy->pcs)) + return PTR_ERR(qphy->pcs); + + if (cfg->lanes >= 2) { + qphy->tx2 = devm_of_iomap(dev, np, 3, NULL); + if (IS_ERR(qphy->tx2)) + return PTR_ERR(qphy->tx2); + } + + generic_phy = devm_phy_create(dev, np, &qmp_combo_dp_phy_ops); + if (IS_ERR(generic_phy)) { + ret = PTR_ERR(generic_phy); + dev_err(dev, "failed to create DP PHY: %d\n", ret); + return ret; + } + + qphy->phy = generic_phy; + qphy->qmp = qmp; + qmp->phys[id] = qphy; + phy_set_drvdata(generic_phy, qphy); + + return 0; +} + +static int qmp_combo_create_usb(struct device *dev, struct device_node *np, int id, void __iomem *serdes, const struct qmp_phy_cfg *cfg) { struct qcom_qmp *qmp = dev_get_drvdata(dev); struct phy *generic_phy; struct qmp_phy *qphy; - const struct phy_ops *ops; int ret; qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); @@ -2631,31 +2681,16 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id, qphy->pcs_misc = NULL; } - /* - * Get PHY's Pipe clock, if any. USB3 and PCIe are PIPE3 - * based phys, so they essentially have pipe clock. So, - * we return error in case phy is USB3 or PIPE type. - * Otherwise, we initialize pipe clock to NULL for - * all phys that don't need this. - */ qphy->pipe_clk = devm_get_clk_from_child(dev, np, NULL); if (IS_ERR(qphy->pipe_clk)) { - if (cfg->type == PHY_TYPE_USB3) - return dev_err_probe(dev, PTR_ERR(qphy->pipe_clk), - "failed to get lane%d pipe_clk\n", - id); - qphy->pipe_clk = NULL; + return dev_err_probe(dev, PTR_ERR(qphy->pipe_clk), + "failed to get lane%d pipe_clk\n", id); } - if (cfg->type == PHY_TYPE_DP) - ops = &qmp_combo_dp_phy_ops; - else - ops = &qmp_combo_usb_phy_ops; - - generic_phy = devm_phy_create(dev, np, ops); + generic_phy = devm_phy_create(dev, np, &qmp_combo_usb_phy_ops); if (IS_ERR(generic_phy)) { ret = PTR_ERR(generic_phy); - dev_err(dev, "failed to create qphy %d\n", ret); + dev_err(dev, "failed to create USB PHY: %d\n", ret); return ret; } @@ -2752,7 +2787,7 @@ static int qmp_combo_probe(struct platform_device *pdev) serdes = dp_serdes; /* Create per-lane phy */ - ret = qmp_combo_create(dev, child, id, serdes, cfg); + ret = qmp_combo_create_dp(dev, child, id, serdes, cfg); if (ret) { dev_err(dev, "failed to create lane%d phy, %d\n", id, ret); @@ -2770,7 +2805,7 @@ static int qmp_combo_probe(struct platform_device *pdev) serdes = usb_serdes; /* Create per-lane phy */ - ret = qmp_combo_create(dev, child, id, serdes, cfg); + ret = qmp_combo_create_usb(dev, child, id, serdes, cfg); if (ret) { dev_err(dev, "failed to create lane%d phy, %d\n", id, ret); From patchwork Fri Nov 11 08:56:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18574 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626356wru; Fri, 11 Nov 2022 01:00:36 -0800 (PST) X-Google-Smtp-Source: AA0mqf4heqcR/ePcMrGxl8Yo9qwQbltIvgbBUEPJwKNdf6vqLoF4FAwKBJWz38XATWHGLILc0zyy X-Received: by 2002:a17:906:e24d:b0:7ad:934f:abc2 with SMTP id gq13-20020a170906e24d00b007ad934fabc2mr976907ejb.690.1668157236217; Fri, 11 Nov 2022 01:00:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157236; cv=none; d=google.com; s=arc-20160816; b=Nz0BRETuvJ+2Pd3enIxC31IzXkcspVZlul5hiy1CSKSgl8BpqykQG35DizJz7ZGtDj xvprCAUE7L7+Iu6B/xMo+Z3CtfTycMlGcBAss/Z1f7rKNSd1MXHg6aOr4rN6vkgktGAK EKVUrm+hyL1LKvRGUuR9vVYOonx8TfoEPjTYfKueNsBEZrVwwPsvp6m91OSQcz5wJGf2 bYjFklJN2s+az10XId3OCz0kI5yuCMDMZm3Twcw9s430kGTlWG/9i+taWw2aOlvH9gDg 9C2Pmaz4A+hA0fnHhuTvb9H3q3z7cBIP1QNYpe4O/URR0YGtokQgSnFa6LIZ+k8L/U3Y hjYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rFmo6gSRVwmg8ZkKRYLHWFt9ajpHZyjjRZ6KyTNFbSc=; b=Ka1R4TnzAujRBHaXkPWmhuhbijQ7trMwY2lKzvWWnPSFGMZjD7fWyRESZprM4zAvQc 3YLpwSsxdhTiwnaLOxk8MXRS4miVRW71lHuIDy9yEGD7tbqQWd3QXcWNazXzQBjmc/lT gK417C96q55GZb0W6CI1VKZxFTGFhwTJTzzVRIs8vKrbudf41CON7CPPGUT71Gx8z7KS dEe1shXgDBT5xaCdPqZDxeg4kPUbcxax9C3dGwTp24Y415y+2lsUnp5HKVbioP3FM4DL kN5jCG+eLdf5UZlSF/8ea/VGmZN8Qlo9hba/5rsflK+/Rj15lvcqeV9KCtp3yQakaugJ 2Qcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WyE8e8AJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o3-20020aa7c503000000b004574aae3f47si1468315edq.509.2022.11.11.01.00.12; Fri, 11 Nov 2022 01:00:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WyE8e8AJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233622AbiKKI6v (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233448AbiKKI53 (ORCPT ); Fri, 11 Nov 2022 03:57:29 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFF6E7E997; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0574D61EFA; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99E8DC4FEE2; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=fP1QOh8RM0qP+P4pU9D34/ZZVOjPMoHn8Vlr3Ym//HQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WyE8e8AJuhgRS2xS4oTUOr+aKITCQS7u/DsYbbwOloMSvvqiOk/1DKaQUVAQRpZxM W5NFuzP+LJ3qn/0RYnp4mudMUyj3gzne5tDkenID2NpqShhS4nuDkJqnmBxrze18oJ JYCLyOnHtPCpIFITiNNB8JM6V8UNRx/zyPGgdcTgaaHyPPPzVfgeIXMLJunCf+rFco qDXrc2rEbdDAq3zj39G+DYwHMlouJvADYx20KLsKuya3Z012spXxCIxdNM4JnL5bcg XQITOMJ7XQk+VFEaJ/Fc4wsnN9ORzYTNL1DgkX5RcT2jULbqkCmTxH1l3dtXHkS8nr Z6QcX085/BogA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqJ-0002UO-UP; Fri, 11 Nov 2022 09:56:55 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 13/22] phy: qcom-qmp-combo: add dedicated DP iomem pointers Date: Fri, 11 Nov 2022 09:56:34 +0100 Message-Id: <20221111085643.9478-14-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189641946524523?= X-GMAIL-MSGID: =?utf-8?q?1749189641946524523?= In preparation for merging the driver data, add separate iomem pointers for the DP part of the PHY. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 246 +++++++++++----------- 1 file changed, 126 insertions(+), 120 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 52a00b51f09a..bd7b6f72e866 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -895,6 +895,12 @@ struct qmp_phy { void __iomem *rx2; void __iomem *pcs_misc; void __iomem *pcs_usb; + + void __iomem *dp_serdes; + void __iomem *dp_tx; + void __iomem *dp_tx2; + void __iomem *dp_pcs; + struct clk *pipe_clk; struct qcom_qmp *qmp; enum phy_mode mode; @@ -1316,7 +1322,7 @@ static void qmp_combo_configure(void __iomem *base, static int qmp_combo_dp_serdes_init(struct qmp_phy *qphy) { const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *serdes = qphy->serdes; + void __iomem *serdes = qphy->dp_serdes; const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl; int serdes_tbl_num = cfg->serdes_tbl_num; @@ -1352,43 +1358,43 @@ static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_phy *qphy) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->pcs + QSERDES_DP_PHY_PD_CTL); + qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL, - qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); + qphy->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->pcs + QSERDES_DP_PHY_PD_CTL); + qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL | QSERDES_V3_COM_CLKBUF_RX_DRIVE_L, - qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - - writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0x24, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qphy->pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xbb, qphy->pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG9); + qphy->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); + + writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0x24, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); + writel(0xbb, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); qphy->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); + qphy->dp_pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); } static int qmp_combo_configure_dp_swing(struct qmp_phy *qphy, @@ -1421,10 +1427,10 @@ static int qmp_combo_configure_dp_swing(struct qmp_phy *qphy, voltage_swing_cfg |= DP_PHY_TXn_TX_DRV_LVL_MUX_EN; pre_emphasis_cfg |= DP_PHY_TXn_TX_EMP_POST1_LVL_MUX_EN; - writel(voltage_swing_cfg, qphy->tx + drv_lvl_reg); - writel(pre_emphasis_cfg, qphy->tx + emp_post_reg); - writel(voltage_swing_cfg, qphy->tx2 + drv_lvl_reg); - writel(pre_emphasis_cfg, qphy->tx2 + emp_post_reg); + writel(voltage_swing_cfg, qphy->dp_tx + drv_lvl_reg); + writel(pre_emphasis_cfg, qphy->dp_tx + emp_post_reg); + writel(voltage_swing_cfg, qphy->dp_tx2 + drv_lvl_reg); + writel(pre_emphasis_cfg, qphy->dp_tx2 + emp_post_reg); return 0; } @@ -1446,10 +1452,10 @@ static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_phy *qphy) drvr_en = 0x10; } - writel(drvr_en, qphy->tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); - writel(bias_en, qphy->tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); - writel(drvr_en, qphy->tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); - writel(bias_en, qphy->tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); + writel(drvr_en, qphy->dp_tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); + writel(bias_en, qphy->dp_tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); + writel(drvr_en, qphy->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); + writel(bias_en, qphy->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); } static bool qmp_combo_configure_dp_mode(struct qmp_phy *qphy) @@ -1472,12 +1478,12 @@ static bool qmp_combo_configure_dp_mode(struct qmp_phy *qphy) * if (lane_cnt == 4 || orientation == ORIENTATION_CC1) * val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; * if (orientation == ORIENTATION_CC2) - * writel(0x4c, qphy->pcs + QSERDES_V3_DP_PHY_MODE); + * writel(0x4c, qphy->dp_pcs + QSERDES_V3_DP_PHY_MODE); */ val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; - writel(val, qphy->pcs + QSERDES_DP_PHY_PD_CTL); + writel(val, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); - writel(0x5c, qphy->pcs + QSERDES_DP_PHY_MODE); + writel(0x5c, qphy->dp_pcs + QSERDES_DP_PHY_MODE); return reverse; } @@ -1491,8 +1497,8 @@ static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy) qmp_combo_configure_dp_mode(qphy); - writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qphy->dp_pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qphy->dp_pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1515,40 +1521,40 @@ static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qphy->pcs + QSERDES_V3_DP_PHY_VCO_DIV); + writel(phy_vco_div, qphy->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); - writel(0x04, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x04, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x05, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x09, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x20, qphy->serdes + QSERDES_V3_COM_RESETSM_CNTRL); + writel(0x20, qphy->dp_serdes + QSERDES_V3_COM_RESETSM_CNTRL); - if (readl_poll_timeout(qphy->serdes + QSERDES_V3_COM_C_READY_STATUS, + if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V3_COM_C_READY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, + if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x18, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - return readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, + return readl_poll_timeout(qphy->dp_pcs + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1568,7 +1574,7 @@ static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_phy *qphy) qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qphy->dp_aux_cfg]; - writel(val, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1577,37 +1583,37 @@ static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_phy *qphy) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->pcs + QSERDES_DP_PHY_PD_CTL); + qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ - writel(0x17, qphy->serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); - - writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qphy->pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xb7, qphy->pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG9); + writel(0x17, qphy->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); + + writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); + writel(0xb7, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); qphy->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qphy->pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); + qphy->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); } static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_phy *qphy) { /* Program default values before writing proper values */ - writel(0x27, qphy->tx + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x27, qphy->tx2 + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x20, qphy->tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); qmp_combo_configure_dp_swing(qphy, QSERDES_V4_TX_TX_DRV_LVL, QSERDES_V4_TX_TX_EMP_POST1_LVL); @@ -1620,15 +1626,15 @@ static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_phy *qphy) u32 phy_vco_div, status; unsigned long pixel_freq; - writel(0x0f, qphy->pcs + QSERDES_V4_DP_PHY_CFG_1); + writel(0x0f, qphy->dp_pcs + QSERDES_V4_DP_PHY_CFG_1); qmp_combo_configure_dp_mode(qphy); - writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x05, qphy->pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qphy->pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qphy->dp_pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qphy->dp_pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1651,49 +1657,49 @@ static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_phy *qphy) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qphy->pcs + QSERDES_V4_DP_PHY_VCO_DIV); + writel(phy_vco_div, qphy->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); - writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x05, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x09, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x20, qphy->serdes + QSERDES_V4_COM_RESETSM_CNTRL); + writel(0x20, qphy->dp_serdes + QSERDES_V4_COM_RESETSM_CNTRL); - if (readl_poll_timeout(qphy->serdes + QSERDES_V4_COM_C_READY_STATUS, + if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_C_READY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->serdes + QSERDES_V4_COM_CMN_STATUS, + if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_CMN_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->serdes + QSERDES_V4_COM_CMN_STATUS, + if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_CMN_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1737,30 +1743,30 @@ static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_phy *qphy) drvr1_en = 0x10; } - writel(drvr0_en, qphy->tx + QSERDES_V4_TX_HIGHZ_DRVR_EN); - writel(bias0_en, qphy->tx + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(drvr1_en, qphy->tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); - writel(bias1_en, qphy->tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); + writel(drvr0_en, qphy->dp_tx + QSERDES_V4_TX_HIGHZ_DRVR_EN); + writel(bias0_en, qphy->dp_tx + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); + writel(drvr1_en, qphy->dp_tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); + writel(bias1_en, qphy->dp_tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x0a, qphy->tx + QSERDES_V4_TX_TX_POL_INV); - writel(0x0a, qphy->tx2 + QSERDES_V4_TX_TX_POL_INV); + writel(0x0a, qphy->dp_tx + QSERDES_V4_TX_TX_POL_INV); + writel(0x0a, qphy->dp_tx2 + QSERDES_V4_TX_TX_POL_INV); - writel(0x27, qphy->tx + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x27, qphy->tx2 + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x20, qphy->tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); return 0; } @@ -1794,30 +1800,30 @@ static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_phy *qphy) drvr1_en = 0x10; } - writel(drvr0_en, qphy->tx + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); - writel(bias0_en, qphy->tx + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(drvr1_en, qphy->tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); - writel(bias1_en, qphy->tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); + writel(drvr0_en, qphy->dp_tx + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); + writel(bias0_en, qphy->dp_tx + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); + writel(drvr1_en, qphy->dp_tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); + writel(bias1_en, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x0a, qphy->tx + QSERDES_V5_5NM_TX_TX_POL_INV); - writel(0x0a, qphy->tx2 + QSERDES_V5_5NM_TX_TX_POL_INV); + writel(0x0a, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_POL_INV); + writel(0x0a, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_POL_INV); - writel(0x27, qphy->tx + QSERDES_V5_5NM_TX_TX_DRV_LVL); - writel(0x27, qphy->tx2 + QSERDES_V5_5NM_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_DRV_LVL); + writel(0x27, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_DRV_LVL); - writel(0x20, qphy->tx + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->tx2 + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); + writel(0x20, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); return 0; } @@ -1835,7 +1841,7 @@ static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_phy *qphy) qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); val = cfg1_settings[qphy->dp_aux_cfg]; - writel(val, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1990,14 +1996,14 @@ static int qmp_combo_dp_power_on(struct phy *phy) { struct qmp_phy *qphy = phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *tx = qphy->tx; + void __iomem *tx = qphy->dp_tx; qmp_combo_dp_serdes_init(qphy); qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); if (cfg->lanes >= 2) - qmp_combo_configure_lane(qphy->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); + qmp_combo_configure_lane(qphy->dp_tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); /* Configure special DP tx tunings */ cfg->configure_dp_tx(qphy); @@ -2013,7 +2019,7 @@ static int qmp_combo_dp_power_off(struct phy *phy) struct qmp_phy *qphy = phy_get_drvdata(phy); /* Assert DP PHY power down */ - writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); return 0; } @@ -2589,7 +2595,7 @@ static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int i return -ENOMEM; qphy->cfg = cfg; - qphy->serdes = serdes; + qphy->dp_serdes = serdes; /* * Get memory resources for each PHY: * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. @@ -2598,18 +2604,18 @@ static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int i * * Note that only tx/tx2 and pcs are used by the DP implementation. */ - qphy->tx = devm_of_iomap(dev, np, 0, NULL); - if (IS_ERR(qphy->tx)) - return PTR_ERR(qphy->tx); + qphy->dp_tx = devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(qphy->dp_tx)) + return PTR_ERR(qphy->dp_tx); - qphy->pcs = devm_of_iomap(dev, np, 2, NULL); - if (IS_ERR(qphy->pcs)) - return PTR_ERR(qphy->pcs); + qphy->dp_pcs = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qphy->dp_pcs)) + return PTR_ERR(qphy->dp_pcs); if (cfg->lanes >= 2) { - qphy->tx2 = devm_of_iomap(dev, np, 3, NULL); - if (IS_ERR(qphy->tx2)) - return PTR_ERR(qphy->tx2); + qphy->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); + if (IS_ERR(qphy->dp_tx2)) + return PTR_ERR(qphy->dp_tx2); } generic_phy = devm_phy_create(dev, np, &qmp_combo_dp_phy_ops); From patchwork Fri Nov 11 08:56:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18564 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626076wru; Fri, 11 Nov 2022 01:00:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf7l9i5V9LtLCfwAUumgJfPkREpCFChdUU6YnEQjyl9TmItCQcCrEQBPRWeHGR38bfUKCj6N X-Received: by 2002:a17:906:b1d7:b0:7ae:4373:c8aa with SMTP id bv23-20020a170906b1d700b007ae4373c8aamr1132757ejb.466.1668157201667; Fri, 11 Nov 2022 01:00:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157201; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qa6-20020a170907868600b007a45e4f4ff0si1515067ejc.885.2022.11.11.00.59.36; Fri, 11 Nov 2022 01:00:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GfW1aFP1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232702AbiKKI6B (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233431AbiKKI50 (ORCPT ); Fri, 11 Nov 2022 03:57:26 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F29637E983; Fri, 11 Nov 2022 00:57:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7F6B561F01; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ABB01C4FEBF; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=tyyEAO0MeHCFRKb2QNccz6P5Y4KnbzNicaaQkfoQ46g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GfW1aFP1R1g3LCvT2RI1JB9QW3vq52CqH9XOXUBis7ga9Uur1DZKBREpiQ7giFkIc +bgSRzs5ldoccUzehcV6mbhSphBlnbhpvt985/mVO1DL7IscKusPBO7bAa5eujwuqY aUeh6qITMJFFIJUcnoSOro47/PzZeRTD8gCKhYxgY5wve3Yj71h75D/QS6Zzlo1hC4 CSGXgbZMtLluvhKfGn/4lCaExR19vwZ9ouZJkyHba6KztdBY+5+O/9vNRAyRXWZLTC ITPusvTf5SEzGkdfAfAVH0EfrLVXe7ulfim0NP6a1IiiQoJkvduGke60vsvuez/ZEb 195sUgRNzPaJg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002UR-10; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 14/22] phy: qcom-qmp-combo: clean up DP configurations Date: Fri, 11 Nov 2022 09:56:35 +0100 Message-Id: <20221111085643.9478-15-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189605821733157?= X-GMAIL-MSGID: =?utf-8?q?1749189605821733157?= In preparation for merging the USB and DP configurations, align the initialisations of the DP function pointers. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 40 +++++++++++------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index bd7b6f72e866..c01cedda221c 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1049,10 +1049,10 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, + .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, + .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, + .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, + .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, }; static const struct qmp_phy_combo_cfg sc7180_usb3dpphy_cfg = { @@ -1106,10 +1106,10 @@ static const struct qmp_phy_cfg sdm845_dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, + .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, + .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, + .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, + .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, }; static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = { @@ -1166,10 +1166,10 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, + .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, + .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, + .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, }; static const struct qmp_phy_combo_cfg sc8180x_usb3dpphy_cfg = { @@ -1222,10 +1222,10 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v5_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v5_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, + .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, + .configure_dp_phy = qcom_qmp_v5_phy_configure_dp_phy, + .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, }; static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_combo_cfg = { @@ -1282,10 +1282,10 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, + .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, + .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, + .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, }; static const struct qmp_phy_combo_cfg sm8250_usb3dpphy_cfg = { From patchwork Fri Nov 11 08:56:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18569 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626237wru; Fri, 11 Nov 2022 01:00:19 -0800 (PST) X-Google-Smtp-Source: AA0mqf5beFqY+LqzcsGvTupJsbr7oT1eESFoLuz1jAuehv/G4WmHBzBOdanlLiLBUVk9jV0i8Xs4 X-Received: by 2002:a17:906:793:b0:78c:ad86:d3 with SMTP id l19-20020a170906079300b0078cad8600d3mr1070529ejc.643.1668157219448; Fri, 11 Nov 2022 01:00:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157219; cv=none; d=google.com; s=arc-20160816; b=dNN3AsFswALPZLlxqXdYMcDHWz7tTv5D3xwwhpMvd2uBqPPUUiH865q9VMMGsSN7BJ 7kzIkBOOZZj6T6qXxVZCq86hR7CdJVZG6XHCxN6g00yzOSwFWgJEK9bM6H45IhLopDfR msr0cqDq7Um+HykwtcLW+VnqEQfzlbdDe2pn0M7FEanpuoUcmPABPeCFXwVK5RbTlpR5 qG+irmzeBzKDzb2W/ufQX2UqXa98XnnQUxLFXW62vbnRUqCMYvz4GDKi34ocCscqgij1 N1Cn8TrwyUVMOrc+vvz/6a9tMo+YPUCjPtm8KHPgenK8H2PeGfusWbLCdHad2ouRLKkO Sx8Q== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u1-20020a1709064ac100b0078def76da94si1211683ejt.437.2022.11.11.00.59.54; Fri, 11 Nov 2022 01:00:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AJF31Wlt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233526AbiKKI5p (ORCPT + 99 others); Fri, 11 Nov 2022 03:57:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233437AbiKKI50 (ORCPT ); Fri, 11 Nov 2022 03:57:26 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11DDE7E984; Fri, 11 Nov 2022 00:57:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 83BC161F02; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC652C4FF0D; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=2e1sFaescafNae6TCenVsXtXuc6P0oDVvqweiOwbJuc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AJF31Wlts6vDFKHbmP8+/NrGyWGC1rKSlhmvQUsixCS/uRKYFBu8jL4h6v1R3XqG3 JHAj3Dc+avslOLqKyqKr8DED6FKmSQa0fsN/03KLaXK4kKoHCoOsxIUc2rF9nRCOBz b0V0yyBepzAjkh0fCEOiTtrvb3LuWxiH7totaznXzdYu7Sy+kj6THycudS5m7J9rZq BRG65UWIdt1IPYqE9FfLmHlKNvDhzkV0uki7Wvhngn+PScmF6SwXBuyoWyXopMMIFQ OI5sK9KZagFrFyio9XER/dUT10gp0jB0bnLvmvhJc97oahjzsZEdukoX9b0A5rngKP UXHSFtzKE9UYw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002UU-3W; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 15/22] phy: qcom-qmp-combo: rename sc8280xp config Date: Fri, 11 Nov 2022 09:56:36 +0100 Message-Id: <20221111085643.9478-16-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189624565764474?= X-GMAIL-MSGID: =?utf-8?q?1749189624565764474?= In preparation for merging the USB and DP configurations, drop the "combo" infix from the SC8280XP combined configuration for consistency with the other platforms. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index c01cedda221c..499368e19e00 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1228,7 +1228,7 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = { .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, }; -static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_combo_cfg = { +static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_cfg = { .usb_cfg = &sc8280xp_usb43dp_usb_cfg, .dp_cfg = &sc8280xp_usb43dp_dp_cfg, }; @@ -2858,7 +2858,7 @@ static const struct of_device_id qmp_combo_of_match_table[] = { }, { .compatible = "qcom,sc8280xp-qmp-usb43dp-phy", - .data = &sc8280xp_usb43dpphy_combo_cfg, + .data = &sc8280xp_usb43dpphy_cfg, }, { .compatible = "qcom,sdm845-qmp-usb3-dp-phy", From patchwork Fri Nov 11 08:56:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18578 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626938wru; Fri, 11 Nov 2022 01:01:41 -0800 (PST) X-Google-Smtp-Source: AA0mqf6Sl9WRFjeZH10bY/jDsypB5uxcsD4Eo4bZxJ0KUlesujQgkOpSoATQylZCPX7W9T8x23cU X-Received: by 2002:aa7:c6d9:0:b0:462:2c1c:8791 with SMTP id b25-20020aa7c6d9000000b004622c1c8791mr682902eds.29.1668157301675; Fri, 11 Nov 2022 01:01:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157301; cv=none; d=google.com; s=arc-20160816; b=bsuZoqrNy3DmmYqVjfGCJuWrAkTLdg6P4EGTYgaZreMhg9QnzdTvXLXzqUJ1uBm22D l2LK5oz242tDH4FfmsqaQxB7RJHAKlEYUaXkMLoMqomNpuNyWYjk4WTXvCV2mQNrHVjn ltlw9tti0JCvU5PXE+heDtsoJEQZI7ZfKk57fCfOtC3AGDMx0GLTMgmR7E0Lvi/kPf47 Dzt8Sr1RUpe271C0KQVzewpelkzbQ2vugxigKvPQdArkswukaIRzV2NFgygC3KbAi5aX /vbom1RHNQEyHIU+OVcd4p/SmG9o/o3xjwmvymayjC8v3FJe8DX3qhtQGuAIpeWQv+GQ AWFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7FnuAJDwj/rO7NKNkEhO88UJ9OoA3qnWnrLsvDz0W9Q=; b=VjLgqFKrV2AndcZnJbJKT3H76An9gvmrC6835xkIBNVMm+ecvfjjfnJHIbS9OA9ygG 9hlj8Ej0vuYWI8HfEOZC8oSwCpVg0TKHdrUG71hoFts5uERD7QBpZXMEp8nZkf8rAtfr pxYkA/mnsoYRU9/ECXmaqKYwd48e22rTIJqBa/gYaGtJdhv3fQhoJ3XYYT/Hp0FHwOJq L4Iv7g9lnHriD4bKN0wu7bUyTUjauJ+WgxdccvYVoF+wCwnc8+EOSt/H/Jrvm+dp7CeN dN4TGZha5wWuQfhY/DzdyjQewM3msX+eq7V7G/22M3YZBxYYhV7sJ1SVOwjBqnQDFqHA /E+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Z7MGCxpe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id xj10-20020a170906db0a00b00792e39c31dcsi1609509ejb.988.2022.11.11.01.01.14; Fri, 11 Nov 2022 01:01:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Z7MGCxpe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233616AbiKKI6r (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233467AbiKKI53 (ORCPT ); Fri, 11 Nov 2022 03:57:29 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD3267B216; Fri, 11 Nov 2022 00:57:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 42458CE2609; Fri, 11 Nov 2022 08:57:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D6FDAC4FF17; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157043; bh=M6PMy71TxpnUyb6Ky8baPh4FO70qJkNnvZrbWxWlYXA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Z7MGCxpemNxM+5ozhYkYo5FcuYBf5u1Fore9VvfWfvgSDHy9U7ILkqLFS3SUUGwBU HoVO2SgVgPlqGVGUeBxEcP7LDrlaZsmcga5aUEfnkaVQ4HpCEKsuY5r1hZQzKmhDN6 xcsulP9jrE4b3fLqdDWNCnX2DNKOUmAJYDY2I4ROk8AuhlgRjoy6izdwl1VDGh4K5n jO0q/5073oc7aebCufriI+XpiLDwbd5eZLl6xLFzIFafSoBlrm9RpvP5YTzkgAnoXO qPu6JJBDoL5YQhMqSkIS1ANmXpqIOzxMydC8CoChFCiPFQSJFkCYY4psnsxOVEetfj s64uKMBoAtxew== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002UW-63; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 16/22] phy: qcom-qmp-combo: add DP configuration tables Date: Fri, 11 Nov 2022 09:56:37 +0100 Message-Id: <20221111085643.9478-17-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189710647958900?= X-GMAIL-MSGID: =?utf-8?q?1749189710647958900?= In preparation for merging the USB and DP configurations, add dedicated pointers for the DP serdes and tx tables to the configurations. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 45 ++++++++++++----------- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 499368e19e00..b27d1821116c 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -816,6 +816,11 @@ struct qmp_phy_cfg { const struct qmp_phy_init_tbl *pcs_usb_tbl; int pcs_usb_tbl_num; + const struct qmp_phy_init_tbl *dp_serdes_tbl; + int dp_serdes_tbl_num; + const struct qmp_phy_init_tbl *dp_tx_tbl; + int dp_tx_tbl_num; + /* Init sequence for DP PHY block link rates */ const struct qmp_phy_init_tbl *serdes_tbl_rbr; int serdes_tbl_rbr_num; @@ -1030,10 +1035,10 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = { .type = PHY_TYPE_DP, .lanes = 2, - .serdes_tbl = qmp_v3_dp_serdes_tbl, - .serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl), - .tx_tbl = qmp_v3_dp_tx_tbl, - .tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl), + .dp_serdes_tbl = qmp_v3_dp_serdes_tbl, + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl), + .dp_tx_tbl = qmp_v3_dp_tx_tbl, + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl), .serdes_tbl_rbr = qmp_v3_dp_serdes_tbl_rbr, .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_rbr), @@ -1147,10 +1152,10 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = { .type = PHY_TYPE_DP, .lanes = 2, - .serdes_tbl = qmp_v4_dp_serdes_tbl, - .serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), - .tx_tbl = qmp_v4_dp_tx_tbl, - .tx_tbl_num = ARRAY_SIZE(qmp_v4_dp_tx_tbl), + .dp_serdes_tbl = qmp_v4_dp_serdes_tbl, + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), + .dp_tx_tbl = qmp_v4_dp_tx_tbl, + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v4_dp_tx_tbl), .serdes_tbl_rbr = qmp_v4_dp_serdes_tbl_rbr, .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl_rbr), @@ -1203,10 +1208,10 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = { .type = PHY_TYPE_DP, .lanes = 2, - .serdes_tbl = qmp_v5_dp_serdes_tbl, - .serdes_tbl_num = ARRAY_SIZE(qmp_v5_dp_serdes_tbl), - .tx_tbl = qmp_v5_5nm_dp_tx_tbl, - .tx_tbl_num = ARRAY_SIZE(qmp_v5_5nm_dp_tx_tbl), + .dp_serdes_tbl = qmp_v5_dp_serdes_tbl, + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v5_dp_serdes_tbl), + .dp_tx_tbl = qmp_v5_5nm_dp_tx_tbl, + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v5_5nm_dp_tx_tbl), .serdes_tbl_rbr = qmp_v4_dp_serdes_tbl_rbr, .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl_rbr), @@ -1263,10 +1268,10 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = { .type = PHY_TYPE_DP, .lanes = 2, - .serdes_tbl = qmp_v4_dp_serdes_tbl, - .serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), - .tx_tbl = qmp_v4_dp_tx_tbl, - .tx_tbl_num = ARRAY_SIZE(qmp_v4_dp_tx_tbl), + .dp_serdes_tbl = qmp_v4_dp_serdes_tbl, + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), + .dp_tx_tbl = qmp_v4_dp_tx_tbl, + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v4_dp_tx_tbl), .serdes_tbl_rbr = qmp_v4_dp_serdes_tbl_rbr, .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl_rbr), @@ -1324,10 +1329,8 @@ static int qmp_combo_dp_serdes_init(struct qmp_phy *qphy) const struct qmp_phy_cfg *cfg = qphy->cfg; void __iomem *serdes = qphy->dp_serdes; const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; - const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl; - int serdes_tbl_num = cfg->serdes_tbl_num; - qmp_combo_configure(serdes, serdes_tbl, serdes_tbl_num); + qmp_combo_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num); switch (dp_opts->link_rate) { case 1620: @@ -2000,10 +2003,10 @@ static int qmp_combo_dp_power_on(struct phy *phy) qmp_combo_dp_serdes_init(qphy); - qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); + qmp_combo_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); if (cfg->lanes >= 2) - qmp_combo_configure_lane(qphy->dp_tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); + qmp_combo_configure_lane(qphy->dp_tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); /* Configure special DP tx tunings */ cfg->configure_dp_tx(qphy); From patchwork Fri Nov 11 08:56:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18570 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626235wru; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id cs10-20020a0564020c4a00b004642b0f237esi1899208edb.115.2022.11.11.00.59.55; Fri, 11 Nov 2022 01:00:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=erLKGARA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233538AbiKKI6R (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233456AbiKKI52 (ORCPT ); Fri, 11 Nov 2022 03:57:28 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A55A97E994; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 021FC61F07; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E626FC4FF18; Fri, 11 Nov 2022 08:57:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157044; bh=PgGXf60hOrrV+h5znX9NVwZsOV30RptApUn5dJYq6ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=erLKGARAbotAUwSe4r7wOfec5RSEDHzcjiqMOqpIFPQGUM6VRxhgapht+STXZo6LB 9q4dLeCg2keU1WZBUkaM1XAHdQ01bX9plCJ3UNwtsesFUTZdZD6zsgaWGkr5iEDKqE F9L598KW/EqHdsMWgUlfo/WKJTyBVoFGuiNJemCSj6V//owPKKcJuqowE2MocYHvCP T+1Q65fAB2O0cZXI4ueOr/xOZSFBedXUCizzmGY+cvyxqi1t30P4NNLG1ftrrXAnlH HhPTV/245y961Y2ae5EAHVI1mfaLYmY9Gpvb1JXjaYd/vxa20Ovaq7uwOW+IH4/yJS F4H1thFQ/giRA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002Ua-9L; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 17/22] phy: qcom-qmp-combo: merge USB and DP configurations Date: Fri, 11 Nov 2022 09:56:38 +0100 Message-Id: <20221111085643.9478-18-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189624034474557?= X-GMAIL-MSGID: =?utf-8?q?1749189624034474557?= It does not really make any sense to keep separate configuration structures for the USB and DP parts of the same PHY so merge them. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 182 +++++++--------------- 1 file changed, 57 insertions(+), 125 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index b27d1821116c..249912b75964 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -798,10 +798,7 @@ static const u8 qmp_dp_v5_voltage_swing_hbr_rbr[4][4] = { struct qmp_phy; -/* struct qmp_phy_cfg - per-PHY initialization config */ struct qmp_phy_cfg { - /* phy-type - PCIE/UFS/USB */ - unsigned int type; int lanes; /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ @@ -864,11 +861,6 @@ struct qmp_phy_cfg { }; -struct qmp_phy_combo_cfg { - const struct qmp_phy_cfg *usb_cfg; - const struct qmp_phy_cfg *dp_cfg; -}; - /** * struct qmp_phy - per-lane phy descriptor * @@ -1008,8 +1000,7 @@ static const char * const sc7180_usb3phy_reset_l[] = { "phy", }; -static const struct qmp_phy_cfg sc7180_usb3phy_cfg = { - .type = PHY_TYPE_USB3, +static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = { .lanes = 2, .serdes_tbl = qmp_v3_usb3_serdes_tbl, @@ -1020,20 +1011,6 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = { .rx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_rx_tbl), .pcs_tbl = qmp_v3_usb3_pcs_tbl, .pcs_tbl_num = ARRAY_SIZE(qmp_v3_usb3_pcs_tbl), - .clk_list = qmp_v3_phy_clk_l, - .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), - .reset_list = sc7180_usb3phy_reset_l, - .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), - .regs = qmp_v3_usb3phy_regs_layout, - - .has_pwrdn_delay = true, -}; - -static const struct qmp_phy_cfg sc7180_dpphy_cfg = { - .type = PHY_TYPE_DP, - .lanes = 2, .dp_serdes_tbl = qmp_v3_dp_serdes_tbl, .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl), @@ -1058,15 +1035,19 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = { .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, -}; -static const struct qmp_phy_combo_cfg sc7180_usb3dpphy_cfg = { - .usb_cfg = &sc7180_usb3phy_cfg, - .dp_cfg = &sc7180_dpphy_cfg, + .clk_list = qmp_v3_phy_clk_l, + .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), + .reset_list = sc7180_usb3phy_reset_l, + .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v3_usb3phy_regs_layout, + + .has_pwrdn_delay = true, }; -static const struct qmp_phy_cfg sdm845_usb3phy_cfg = { - .type = PHY_TYPE_USB3, +static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = { .lanes = 2, .serdes_tbl = qmp_v3_usb3_serdes_tbl, @@ -1077,25 +1058,11 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = { .rx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_rx_tbl), .pcs_tbl = qmp_v3_usb3_pcs_tbl, .pcs_tbl_num = ARRAY_SIZE(qmp_v3_usb3_pcs_tbl), - .clk_list = qmp_v3_phy_clk_l, - .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), - .reset_list = msm8996_usb3phy_reset_l, - .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), - .regs = qmp_v3_usb3phy_regs_layout, - - .has_pwrdn_delay = true, -}; -static const struct qmp_phy_cfg sdm845_dpphy_cfg = { - .type = PHY_TYPE_DP, - .lanes = 2, - - .serdes_tbl = qmp_v3_dp_serdes_tbl, - .serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl), - .tx_tbl = qmp_v3_dp_tx_tbl, - .tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl), + .dp_serdes_tbl = qmp_v3_dp_serdes_tbl, + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl), + .dp_tx_tbl = qmp_v3_dp_tx_tbl, + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl), .serdes_tbl_rbr = qmp_v3_dp_serdes_tbl_rbr, .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_rbr), @@ -1115,15 +1082,18 @@ static const struct qmp_phy_cfg sdm845_dpphy_cfg = { .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, -}; -static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = { - .usb_cfg = &sdm845_usb3phy_cfg, - .dp_cfg = &sdm845_dpphy_cfg, -}; + .clk_list = qmp_v3_phy_clk_l, + .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), + .reset_list = msm8996_usb3phy_reset_l, + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v3_usb3phy_regs_layout, -static const struct qmp_phy_cfg sm8150_usb3phy_cfg = { - .type = PHY_TYPE_USB3, + .has_pwrdn_delay = true, +}; +static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = { .lanes = 2, .serdes_tbl = sm8150_usb3_serdes_tbl, @@ -1136,21 +1106,6 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = { .pcs_tbl_num = ARRAY_SIZE(sm8150_usb3_pcs_tbl), .pcs_usb_tbl = sm8150_usb3_pcs_usb_tbl, .pcs_usb_tbl_num = ARRAY_SIZE(sm8150_usb3_pcs_usb_tbl), - .clk_list = qmp_v4_phy_clk_l, - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), - .reset_list = msm8996_usb3phy_reset_l, - .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), - .regs = qmp_v4_usb3phy_regs_layout, - .pcs_usb_offset = 0x300, - - .has_pwrdn_delay = true, -}; - -static const struct qmp_phy_cfg sc8180x_dpphy_cfg = { - .type = PHY_TYPE_DP, - .lanes = 2, .dp_serdes_tbl = qmp_v4_dp_serdes_tbl, .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), @@ -1175,15 +1130,20 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = { .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, -}; -static const struct qmp_phy_combo_cfg sc8180x_usb3dpphy_cfg = { - .usb_cfg = &sm8150_usb3phy_cfg, - .dp_cfg = &sc8180x_dpphy_cfg, + .clk_list = qmp_v4_phy_clk_l, + .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), + .reset_list = msm8996_usb3phy_reset_l, + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v4_usb3phy_regs_layout, + .pcs_usb_offset = 0x300, + + .has_pwrdn_delay = true, }; -static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = { - .type = PHY_TYPE_USB3, +static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { .lanes = 2, .serdes_tbl = sc8280xp_usb43dp_serdes_tbl, @@ -1194,19 +1154,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = { .rx_tbl_num = ARRAY_SIZE(sc8280xp_usb43dp_rx_tbl), .pcs_tbl = sc8280xp_usb43dp_pcs_tbl, .pcs_tbl_num = ARRAY_SIZE(sc8280xp_usb43dp_pcs_tbl), - .clk_list = qmp_v4_phy_clk_l, - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), - .reset_list = msm8996_usb3phy_reset_l, - .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), - .regs = qmp_v4_usb3phy_regs_layout, - .pcs_usb_offset = 0x300, -}; - -static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = { - .type = PHY_TYPE_DP, - .lanes = 2, .dp_serdes_tbl = qmp_v5_dp_serdes_tbl, .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v5_dp_serdes_tbl), @@ -1231,15 +1178,18 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = { .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, .configure_dp_phy = qcom_qmp_v5_phy_configure_dp_phy, .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, -}; -static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_cfg = { - .usb_cfg = &sc8280xp_usb43dp_usb_cfg, - .dp_cfg = &sc8280xp_usb43dp_dp_cfg, + .clk_list = qmp_v4_phy_clk_l, + .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), + .reset_list = msm8996_usb3phy_reset_l, + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v4_usb3phy_regs_layout, + .pcs_usb_offset = 0x300, }; -static const struct qmp_phy_cfg sm8250_usb3phy_cfg = { - .type = PHY_TYPE_USB3, +static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = { .lanes = 2, .serdes_tbl = sm8150_usb3_serdes_tbl, @@ -1252,21 +1202,6 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = { .pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_pcs_tbl), .pcs_usb_tbl = sm8250_usb3_pcs_usb_tbl, .pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_pcs_usb_tbl), - .clk_list = qmp_v4_sm8250_usbphy_clk_l, - .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l), - .reset_list = msm8996_usb3phy_reset_l, - .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), - .regs = qmp_v4_usb3phy_regs_layout, - .pcs_usb_offset = 0x300, - - .has_pwrdn_delay = true, -}; - -static const struct qmp_phy_cfg sm8250_dpphy_cfg = { - .type = PHY_TYPE_DP, - .lanes = 2, .dp_serdes_tbl = qmp_v4_dp_serdes_tbl, .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl), @@ -1291,11 +1226,17 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = { .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, -}; -static const struct qmp_phy_combo_cfg sm8250_usb3dpphy_cfg = { - .usb_cfg = &sm8250_usb3phy_cfg, - .dp_cfg = &sm8250_dpphy_cfg, + .clk_list = qmp_v4_sm8250_usbphy_clk_l, + .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l), + .reset_list = msm8996_usb3phy_reset_l, + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v4_usb3phy_regs_layout, + .pcs_usb_offset = 0x300, + + .has_pwrdn_delay = true, }; static void qmp_combo_configure_lane(void __iomem *base, @@ -2720,10 +2661,7 @@ static int qmp_combo_probe(struct platform_device *pdev) void __iomem *serdes; void __iomem *usb_serdes; void __iomem *dp_serdes = NULL; - const struct qmp_phy_combo_cfg *combo_cfg = NULL; const struct qmp_phy_cfg *cfg = NULL; - const struct qmp_phy_cfg *usb_cfg = NULL; - const struct qmp_phy_cfg *dp_cfg = NULL; int num, id, expected_phys; int ret; @@ -2734,13 +2672,10 @@ static int qmp_combo_probe(struct platform_device *pdev) qmp->dev = dev; dev_set_drvdata(dev, qmp); - combo_cfg = of_device_get_match_data(dev); - if (!combo_cfg) + cfg = of_device_get_match_data(dev); + if (!cfg) return -EINVAL; - usb_cfg = combo_cfg->usb_cfg; - cfg = usb_cfg; /* Setup clks and regulators */ - usb_serdes = serdes = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(serdes)) return PTR_ERR(serdes); @@ -2753,7 +2688,6 @@ static int qmp_combo_probe(struct platform_device *pdev) if (IS_ERR(dp_serdes)) return PTR_ERR(dp_serdes); - dp_cfg = combo_cfg->dp_cfg; expected_phys = 2; mutex_init(&qmp->phy_mutex); @@ -2792,7 +2726,6 @@ static int qmp_combo_probe(struct platform_device *pdev) id = 0; for_each_available_child_of_node(dev->of_node, child) { if (of_node_name_eq(child, "dp-phy")) { - cfg = dp_cfg; serdes = dp_serdes; /* Create per-lane phy */ @@ -2810,7 +2743,6 @@ static int qmp_combo_probe(struct platform_device *pdev) goto err_node_put; } } else if (of_node_name_eq(child, "usb3-phy")) { - cfg = usb_cfg; serdes = usb_serdes; /* Create per-lane phy */ From patchwork Fri Nov 11 08:56:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18576 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626471wru; Fri, 11 Nov 2022 01:00:49 -0800 (PST) X-Google-Smtp-Source: AA0mqf7zAHW7Y4MUasiNyh1uoV8gaXrAF7tP4Mym6TBIicKUI8icPDMc2E8w6aza5VEwSBd3BGC7 X-Received: by 2002:a17:906:2445:b0:78d:e26f:bfe4 with SMTP id a5-20020a170906244500b0078de26fbfe4mr1083652ejb.523.1668157249057; Fri, 11 Nov 2022 01:00:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ne23-20020a1709077b9700b007815a44de91si1786744ejc.771.2022.11.11.01.00.23; Fri, 11 Nov 2022 01:00:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YmZ+p5aD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233635AbiKKI7C (ORCPT + 99 others); Fri, 11 Nov 2022 03:59:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233466AbiKKI53 (ORCPT ); Fri, 11 Nov 2022 03:57:29 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69F057E98B; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B5F5461F05; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1155BC4FF0E; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157044; bh=Zk41rYS/mD6UeZ/7xUGOLA6Q2ojmVkgiGVNAlvzFQ9k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YmZ+p5aDmdxx9wWoiikPYPVEagKMVHGARyXzBg9+ObGDdASCMYrz7RPkVaq7xDkCO +iS/OD0rSXOGv5HxfP72Pmajb68SHBuBbiAEL0sn2vmYHQ7mdrdwTS50fptbRDw7y2 +8pQJCYJWSIdOc9zaRL5aJi58cf/EAoJG0Nnx1VeToIGXAsaMKy1y7UzDpVTmydMgZ z0/lhj5q5F+mOv991FAICcT5g+UWWChMIieZ05yCroApAjx0/iB1hQyYgSSIyPqloO MKZSuZrDSL3q1lDQ8IcqXqSoCYlN9uRTLDiBqwILw1w+3aqSj2Etm57hOBXqPPSYaE rArNtQ4jiMYdg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002Ud-Cf; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 18/22] phy: qcom-qmp-combo: merge driver data Date: Fri, 11 Nov 2022 09:56:39 +0100 Message-Id: <20221111085643.9478-19-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189655974601459?= X-GMAIL-MSGID: =?utf-8?q?1749189655974601459?= The QMP combo driver manages a single PHY (even if it provides two interfaces for USB and DP, respectively) so merge the old qcom_qmp and qmp_phy structures and drop the PHY array. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 690 ++++++++++------------ 1 file changed, 313 insertions(+), 377 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 249912b75964..43b7ea5d2edc 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -796,7 +796,7 @@ static const u8 qmp_dp_v5_voltage_swing_hbr_rbr[4][4] = { { 0x3f, 0xff, 0xff, 0xff } }; -struct qmp_phy; +struct qmp_combo; struct qmp_phy_cfg { int lanes; @@ -835,10 +835,10 @@ struct qmp_phy_cfg { const u8 (*pre_emphasis_hbr3_hbr2)[4][4]; /* DP PHY callbacks */ - int (*configure_dp_phy)(struct qmp_phy *qphy); - void (*configure_dp_tx)(struct qmp_phy *qphy); - int (*calibrate_dp_phy)(struct qmp_phy *qphy); - void (*dp_aux_init)(struct qmp_phy *qphy); + int (*configure_dp_phy)(struct qmp_combo *qmp); + void (*configure_dp_tx)(struct qmp_combo *qmp); + int (*calibrate_dp_phy)(struct qmp_combo *qmp); + void (*dp_aux_init)(struct qmp_combo *qmp); /* clock ids to be requested */ const char * const *clk_list; @@ -861,29 +861,19 @@ struct qmp_phy_cfg { }; -/** - * struct qmp_phy - per-lane phy descriptor - * - * @phy: generic phy - * @cfg: phy specific configuration - * @serdes: iomapped memory space for phy's serdes (i.e. PLL) - * @tx: iomapped memory space for lane's tx - * @rx: iomapped memory space for lane's rx - * @pcs: iomapped memory space for lane's pcs - * @tx2: iomapped memory space for second lane's tx (in dual lane PHYs) - * @rx2: iomapped memory space for second lane's rx (in dual lane PHYs) - * @pcs_misc: iomapped memory space for lane's pcs_misc - * @pcs_usb: iomapped memory space for lane's pcs_usb - * @pipe_clk: pipe clock - * @qmp: QMP phy to which this lane belongs - * @mode: current PHY mode - * @dp_aux_cfg: Display port aux config - * @dp_opts: Display port optional config - * @dp_clks: Display port clocks - */ -struct qmp_phy { - struct phy *phy; +struct qmp_phy_dp_clks { + struct qmp_combo *qmp; + struct clk_hw dp_link_hw; + struct clk_hw dp_pixel_hw; +}; + +struct qmp_combo { + struct device *dev; + const struct qmp_phy_cfg *cfg; + + void __iomem *dp_com; + void __iomem *serdes; void __iomem *tx; void __iomem *rx; @@ -899,59 +889,33 @@ struct qmp_phy { void __iomem *dp_pcs; struct clk *pipe_clk; - struct qcom_qmp *qmp; - enum phy_mode mode; - unsigned int dp_aux_cfg; - struct phy_configure_opts_dp dp_opts; - struct qmp_phy_dp_clks *dp_clks; -}; - -struct qmp_phy_dp_clks { - struct qmp_phy *qphy; - struct clk_hw dp_link_hw; - struct clk_hw dp_pixel_hw; -}; - -/** - * struct qcom_qmp - structure holding QMP phy block attributes - * - * @dev: device - * @dp_com: iomapped memory space for phy's dp_com control block - * - * @clks: array of clocks required by phy - * @resets: array of resets required by phy - * @vregs: regulator supplies bulk data - * - * @phys: array of per-lane phy descriptors - * @phy_mutex: mutex lock for PHY common block initialization - * @init_count: phy common block initialization count - */ -struct qcom_qmp { - struct device *dev; - void __iomem *dp_com; - struct clk_bulk_data *clks; struct reset_control_bulk_data *resets; struct regulator_bulk_data *vregs; - struct qmp_phy **phys; - struct qmp_phy *usb_phy; - struct mutex phy_mutex; int init_count; + + struct phy *usb_phy; + enum phy_mode mode; + + struct phy *dp_phy; + unsigned int dp_aux_cfg; + struct phy_configure_opts_dp dp_opts; + struct qmp_phy_dp_clks *dp_clks; }; -static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_phy *qphy); -static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_phy *qphy); -static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy); -static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_phy *qphy); +static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_combo *qmp); +static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_combo *qmp); +static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_combo *qmp); +static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_combo *qmp); -static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_phy *qphy); -static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_phy *qphy); -static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_phy *qphy); -static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_phy *qphy); +static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_combo *qmp); +static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_combo *qmp); +static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp); +static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_combo *qmp); -static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_phy *qphy); +static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp); static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) { @@ -1265,11 +1229,11 @@ static void qmp_combo_configure(void __iomem *base, qmp_combo_configure_lane(base, tbl, num, 0xff); } -static int qmp_combo_dp_serdes_init(struct qmp_phy *qphy) +static int qmp_combo_dp_serdes_init(struct qmp_combo *qmp) { - const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *serdes = qphy->dp_serdes; - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct qmp_phy_cfg *cfg = qmp->cfg; + void __iomem *serdes = qmp->dp_serdes; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; qmp_combo_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num); @@ -1298,54 +1262,54 @@ static int qmp_combo_dp_serdes_init(struct qmp_phy *qphy) return 0; } -static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_phy *qphy) +static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL, - qphy->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); + qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN | QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL | QSERDES_V3_COM_CLKBUF_RX_DRIVE_L, - qphy->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); - - writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0x24, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xbb, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); - qphy->dp_aux_cfg = 0; + qmp->dp_serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); + + writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0x24, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); + writel(0xbb, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qphy->dp_pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); } -static int qmp_combo_configure_dp_swing(struct qmp_phy *qphy, +static int qmp_combo_configure_dp_swing(struct qmp_combo *qmp, unsigned int drv_lvl_reg, unsigned int emp_post_reg) { - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; - const struct qmp_phy_cfg *cfg = qphy->cfg; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; + const struct qmp_phy_cfg *cfg = qmp->cfg; unsigned int v_level = 0, p_level = 0; u8 voltage_swing_cfg, pre_emphasis_cfg; int i; @@ -1371,20 +1335,20 @@ static int qmp_combo_configure_dp_swing(struct qmp_phy *qphy, voltage_swing_cfg |= DP_PHY_TXn_TX_DRV_LVL_MUX_EN; pre_emphasis_cfg |= DP_PHY_TXn_TX_EMP_POST1_LVL_MUX_EN; - writel(voltage_swing_cfg, qphy->dp_tx + drv_lvl_reg); - writel(pre_emphasis_cfg, qphy->dp_tx + emp_post_reg); - writel(voltage_swing_cfg, qphy->dp_tx2 + drv_lvl_reg); - writel(pre_emphasis_cfg, qphy->dp_tx2 + emp_post_reg); + writel(voltage_swing_cfg, qmp->dp_tx + drv_lvl_reg); + writel(pre_emphasis_cfg, qmp->dp_tx + emp_post_reg); + writel(voltage_swing_cfg, qmp->dp_tx2 + drv_lvl_reg); + writel(pre_emphasis_cfg, qmp->dp_tx2 + emp_post_reg); return 0; } -static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_phy *qphy) +static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_combo *qmp) { - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias_en, drvr_en; - if (qmp_combo_configure_dp_swing(qphy, QSERDES_V3_TX_TX_DRV_LVL, + if (qmp_combo_configure_dp_swing(qmp, QSERDES_V3_TX_TX_DRV_LVL, QSERDES_V3_TX_TX_EMP_POST1_LVL) < 0) return; @@ -1396,13 +1360,13 @@ static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_phy *qphy) drvr_en = 0x10; } - writel(drvr_en, qphy->dp_tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); - writel(bias_en, qphy->dp_tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); - writel(drvr_en, qphy->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); - writel(bias_en, qphy->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); + writel(drvr_en, qmp->dp_tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); + writel(bias_en, qmp->dp_tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); + writel(drvr_en, qmp->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); + writel(bias_en, qmp->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); } -static bool qmp_combo_configure_dp_mode(struct qmp_phy *qphy) +static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) { u32 val; bool reverse = false; @@ -1422,27 +1386,27 @@ static bool qmp_combo_configure_dp_mode(struct qmp_phy *qphy) * if (lane_cnt == 4 || orientation == ORIENTATION_CC1) * val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; * if (orientation == ORIENTATION_CC2) - * writel(0x4c, qphy->dp_pcs + QSERDES_V3_DP_PHY_MODE); + * writel(0x4c, qmp->dp_pcs + QSERDES_V3_DP_PHY_MODE); */ val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN; - writel(val, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(val, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); - writel(0x5c, qphy->dp_pcs + QSERDES_DP_PHY_MODE); + writel(0x5c, qmp->dp_pcs + QSERDES_DP_PHY_MODE); return reverse; } -static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy) +static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qphy->dp_clks; - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; - qmp_combo_configure_dp_mode(qphy); + qmp_combo_configure_dp_mode(qmp); - writel(0x05, qphy->dp_pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qphy->dp_pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1465,40 +1429,40 @@ static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qphy->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV); clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); - writel(0x04, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x20, qphy->dp_serdes + QSERDES_V3_COM_RESETSM_CNTRL); + writel(0x20, qmp->dp_serdes + QSERDES_V3_COM_RESETSM_CNTRL); - if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V3_COM_C_READY_STATUS, + if (readl_poll_timeout(qmp->dp_serdes + QSERDES_V3_COM_C_READY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - return readl_poll_timeout(qphy->dp_pcs + QSERDES_V3_DP_PHY_STATUS, + return readl_poll_timeout(qmp->dp_pcs + QSERDES_V3_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1509,76 +1473,76 @@ static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_phy *qphy) * We need to calibrate the aux setting here as many times * as the caller tries */ -static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_phy *qphy) +static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_combo *qmp) { static const u8 cfg1_settings[] = { 0x13, 0x23, 0x1d }; u8 val; - qphy->dp_aux_cfg++; - qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); - val = cfg1_settings[qphy->dp_aux_cfg]; + qmp->dp_aux_cfg++; + qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); + val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); return 0; } -static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_phy *qphy) +static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, - qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); /* Turn on BIAS current for PHY/PLL */ - writel(0x17, qphy->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); - - writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); - writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x00, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); - writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); - writel(0x26, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); - writel(0x0a, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); - writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); - writel(0xb7, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); - writel(0x03, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); - qphy->dp_aux_cfg = 0; + writel(0x17, qmp->dp_serdes + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); + + writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG0); + writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x00, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG3); + writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG4); + writel(0x26, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG5); + writel(0x0a, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG6); + writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG7); + writel(0xb7, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG8); + writel(0x03, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG9); + qmp->dp_aux_cfg = 0; writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | PHY_AUX_REQ_ERR_MASK, - qphy->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); + qmp->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); } -static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_phy *qphy) +static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_combo *qmp) { /* Program default values before writing proper values */ - writel(0x27, qphy->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x27, qphy->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x20, qphy->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); - qmp_combo_configure_dp_swing(qphy, QSERDES_V4_TX_TX_DRV_LVL, + qmp_combo_configure_dp_swing(qmp, QSERDES_V4_TX_TX_DRV_LVL, QSERDES_V4_TX_TX_EMP_POST1_LVL); } -static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_phy *qphy) +static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_combo *qmp) { - const struct qmp_phy_dp_clks *dp_clks = qphy->dp_clks; - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 phy_vco_div, status; unsigned long pixel_freq; - writel(0x0f, qphy->dp_pcs + QSERDES_V4_DP_PHY_CFG_1); + writel(0x0f, qmp->dp_pcs + QSERDES_V4_DP_PHY_CFG_1); - qmp_combo_configure_dp_mode(qphy); + qmp_combo_configure_dp_mode(qmp); - writel(0x13, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); - writel(0xa4, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); + writel(0x13, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(0xa4, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2); - writel(0x05, qphy->dp_pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); - writel(0x05, qphy->dp_pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); + writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); + writel(0x05, qmp->dp_pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); switch (dp_opts->link_rate) { case 1620: @@ -1601,49 +1565,49 @@ static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_phy *qphy) /* Other link rates aren't supported */ return -EINVAL; } - writel(phy_vco_div, qphy->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); + writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV); clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000); clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq); - writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x05, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x01, qphy->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x09, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x09, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - writel(0x20, qphy->dp_serdes + QSERDES_V4_COM_RESETSM_CNTRL); + writel(0x20, qmp->dp_serdes + QSERDES_V4_COM_RESETSM_CNTRL); - if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_C_READY_STATUS, + if (readl_poll_timeout(qmp->dp_serdes + QSERDES_V4_COM_C_READY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_CMN_STATUS, + if (readl_poll_timeout(qmp->dp_serdes + QSERDES_V4_COM_CMN_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->dp_serdes + QSERDES_V4_COM_CMN_STATUS, + if (readl_poll_timeout(qmp->dp_serdes + QSERDES_V4_COM_CMN_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(0)) > 0), 500, 10000)) return -ETIMEDOUT; - if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, @@ -1653,15 +1617,15 @@ static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_phy *qphy) return 0; } -static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_phy *qphy) +static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp) { - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias0_en, drvr0_en, bias1_en, drvr1_en; bool reverse = false; u32 status; int ret; - ret = qcom_qmp_v45_phy_configure_dp_phy(qphy); + ret = qcom_qmp_v45_phy_configure_dp_phy(qmp); if (ret < 0) return ret; @@ -1687,43 +1651,43 @@ static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_phy *qphy) drvr1_en = 0x10; } - writel(drvr0_en, qphy->dp_tx + QSERDES_V4_TX_HIGHZ_DRVR_EN); - writel(bias0_en, qphy->dp_tx + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(drvr1_en, qphy->dp_tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); - writel(bias1_en, qphy->dp_tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); + writel(drvr0_en, qmp->dp_tx + QSERDES_V4_TX_HIGHZ_DRVR_EN); + writel(bias0_en, qmp->dp_tx + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); + writel(drvr1_en, qmp->dp_tx2 + QSERDES_V4_TX_HIGHZ_DRVR_EN); + writel(bias1_en, qmp->dp_tx2 + QSERDES_V4_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x0a, qphy->dp_tx + QSERDES_V4_TX_TX_POL_INV); - writel(0x0a, qphy->dp_tx2 + QSERDES_V4_TX_TX_POL_INV); + writel(0x0a, qmp->dp_tx + QSERDES_V4_TX_TX_POL_INV); + writel(0x0a, qmp->dp_tx2 + QSERDES_V4_TX_TX_POL_INV); - writel(0x27, qphy->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x27, qphy->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx2 + QSERDES_V4_TX_TX_DRV_LVL); - writel(0x20, qphy->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx + QSERDES_V4_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL); return 0; } -static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_phy *qphy) +static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp) { - const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias0_en, drvr0_en, bias1_en, drvr1_en; bool reverse = false; u32 status; int ret; - ret = qcom_qmp_v45_phy_configure_dp_phy(qphy); + ret = qcom_qmp_v45_phy_configure_dp_phy(qmp); if (ret < 0) return ret; @@ -1744,30 +1708,30 @@ static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_phy *qphy) drvr1_en = 0x10; } - writel(drvr0_en, qphy->dp_tx + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); - writel(bias0_en, qphy->dp_tx + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(drvr1_en, qphy->dp_tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); - writel(bias1_en, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); + writel(drvr0_en, qmp->dp_tx + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); + writel(bias0_en, qmp->dp_tx + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); + writel(drvr1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_HIGHZ_DRVR_EN); + writel(bias1_en, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TRANSCEIVER_BIAS_EN); - writel(0x18, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x18, qmp->dp_pcs + QSERDES_DP_PHY_CFG); udelay(2000); - writel(0x19, qphy->dp_pcs + QSERDES_DP_PHY_CFG); + writel(0x19, qmp->dp_pcs + QSERDES_DP_PHY_CFG); - if (readl_poll_timeout(qphy->dp_pcs + QSERDES_V4_DP_PHY_STATUS, + if (readl_poll_timeout(qmp->dp_pcs + QSERDES_V4_DP_PHY_STATUS, status, ((status & BIT(1)) > 0), 500, 10000)) return -ETIMEDOUT; - writel(0x0a, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_POL_INV); - writel(0x0a, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_POL_INV); + writel(0x0a, qmp->dp_tx + QSERDES_V5_5NM_TX_TX_POL_INV); + writel(0x0a, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TX_POL_INV); - writel(0x27, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_DRV_LVL); - writel(0x27, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx + QSERDES_V5_5NM_TX_TX_DRV_LVL); + writel(0x27, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TX_DRV_LVL); - writel(0x20, qphy->dp_tx + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); - writel(0x20, qphy->dp_tx2 + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); + writel(0x20, qmp->dp_tx2 + QSERDES_V5_5NM_TX_TX_EMP_POST1_LVL); return 0; } @@ -1776,16 +1740,16 @@ static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_phy *qphy) * We need to calibrate the aux setting here as many times * as the caller tries */ -static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_phy *qphy) +static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_combo *qmp) { static const u8 cfg1_settings[] = { 0x20, 0x13, 0x23, 0x1d }; u8 val; - qphy->dp_aux_cfg++; - qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); - val = cfg1_settings[qphy->dp_aux_cfg]; + qmp->dp_aux_cfg++; + qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); + val = cfg1_settings[qmp->dp_aux_cfg]; - writel(val, qphy->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); + writel(val, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG1); return 0; } @@ -1793,13 +1757,13 @@ static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_phy *qphy) static int qmp_combo_dp_configure(struct phy *phy, union phy_configure_opts *opts) { const struct phy_configure_opts_dp *dp_opts = &opts->dp; - struct qmp_phy *qphy = phy_get_drvdata(phy); - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; - memcpy(&qphy->dp_opts, dp_opts, sizeof(*dp_opts)); - if (qphy->dp_opts.set_voltages) { - cfg->configure_dp_tx(qphy); - qphy->dp_opts.set_voltages = 0; + memcpy(&qmp->dp_opts, dp_opts, sizeof(*dp_opts)); + if (qmp->dp_opts.set_voltages) { + cfg->configure_dp_tx(qmp); + qmp->dp_opts.set_voltages = 0; } return 0; @@ -1807,20 +1771,18 @@ static int qmp_combo_dp_configure(struct phy *phy, union phy_configure_opts *opt static int qmp_combo_dp_calibrate(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; if (cfg->calibrate_dp_phy) - return cfg->calibrate_dp_phy(qphy); + return cfg->calibrate_dp_phy(qmp); return 0; } -static int qmp_combo_com_init(struct qmp_phy *qphy) +static int qmp_combo_com_init(struct qmp_combo *qmp) { - struct qcom_qmp *qmp = qphy->qmp; - struct qmp_phy *usb_phy = qmp->usb_phy; - const struct qmp_phy_cfg *cfg = usb_phy->cfg; + const struct qmp_phy_cfg *cfg = qmp->cfg; void __iomem *dp_com = qmp->dp_com; int ret; @@ -1872,7 +1834,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy) qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); - qphy_setbits(usb_phy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); mutex_unlock(&qmp->phy_mutex); @@ -1889,11 +1851,9 @@ static int qmp_combo_com_init(struct qmp_phy *qphy) return ret; } -static int qmp_combo_com_exit(struct qmp_phy *qphy) +static int qmp_combo_com_exit(struct qmp_combo *qmp) { - struct qcom_qmp *qmp = qphy->qmp; - struct qmp_phy *usb_phy = qmp->usb_phy; - const struct qmp_phy_cfg *cfg = usb_phy->cfg; + const struct qmp_phy_cfg *cfg = qmp->cfg; mutex_lock(&qmp->phy_mutex); if (--qmp->init_count) { @@ -1914,76 +1874,75 @@ static int qmp_combo_com_exit(struct qmp_phy *qphy) static int qmp_combo_dp_init(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; int ret; - ret = qmp_combo_com_init(qphy); + ret = qmp_combo_com_init(qmp); if (ret) return ret; - cfg->dp_aux_init(qphy); + cfg->dp_aux_init(qmp); return 0; } static int qmp_combo_dp_exit(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qmp_combo *qmp = phy_get_drvdata(phy); - qmp_combo_com_exit(qphy); + qmp_combo_com_exit(qmp); return 0; } static int qmp_combo_dp_power_on(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); - const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *tx = qphy->dp_tx; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; + void __iomem *tx = qmp->dp_tx; - qmp_combo_dp_serdes_init(qphy); + qmp_combo_dp_serdes_init(qmp); qmp_combo_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); if (cfg->lanes >= 2) - qmp_combo_configure_lane(qphy->dp_tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); + qmp_combo_configure_lane(qmp->dp_tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); /* Configure special DP tx tunings */ - cfg->configure_dp_tx(qphy); + cfg->configure_dp_tx(qmp); /* Configure link rate, swing, etc. */ - cfg->configure_dp_phy(qphy); + cfg->configure_dp_phy(qmp); return 0; } static int qmp_combo_dp_power_off(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qmp_combo *qmp = phy_get_drvdata(phy); /* Assert DP PHY power down */ - writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->dp_pcs + QSERDES_DP_PHY_PD_CTL); + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_pcs + QSERDES_DP_PHY_PD_CTL); return 0; } static int qmp_combo_usb_power_on(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; - const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *serdes = qphy->serdes; - void __iomem *tx = qphy->tx; - void __iomem *rx = qphy->rx; - void __iomem *pcs = qphy->pcs; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; + void __iomem *serdes = qmp->serdes; + void __iomem *tx = qmp->tx; + void __iomem *rx = qmp->rx; + void __iomem *pcs = qmp->pcs; void __iomem *status; unsigned int val; int ret; qmp_combo_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); - ret = clk_prepare_enable(qphy->pipe_clk); + ret = clk_prepare_enable(qmp->pipe_clk); if (ret) { dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret); return ret; @@ -1993,12 +1952,12 @@ static int qmp_combo_usb_power_on(struct phy *phy) qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); if (cfg->lanes >= 2) - qmp_combo_configure_lane(qphy->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); + qmp_combo_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); if (cfg->lanes >= 2) - qmp_combo_configure_lane(qphy->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); + qmp_combo_configure_lane(qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); @@ -2022,27 +1981,27 @@ static int qmp_combo_usb_power_on(struct phy *phy) return 0; err_disable_pipe_clk: - clk_disable_unprepare(qphy->pipe_clk); + clk_disable_unprepare(qmp->pipe_clk); return ret; } static int qmp_combo_usb_power_off(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = phy_get_drvdata(phy); + const struct qmp_phy_cfg *cfg = qmp->cfg; - clk_disable_unprepare(qphy->pipe_clk); + clk_disable_unprepare(qmp->pipe_clk); /* PHY reset */ - qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); + qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); /* stop SerDes and Phy-Coding-Sublayer */ - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], + qphy_clrbits(qmp->pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START); /* Put PHY into POWER DOWN state: active low */ - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); return 0; @@ -2050,37 +2009,37 @@ static int qmp_combo_usb_power_off(struct phy *phy) static int qmp_combo_usb_init(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qmp_combo *qmp = phy_get_drvdata(phy); int ret; - ret = qmp_combo_com_init(qphy); + ret = qmp_combo_com_init(qmp); if (ret) return ret; ret = qmp_combo_usb_power_on(phy); if (ret) - qmp_combo_com_exit(qphy); + qmp_combo_com_exit(qmp); return ret; } static int qmp_combo_usb_exit(struct phy *phy) { - struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qmp_combo *qmp = phy_get_drvdata(phy); int ret; ret = qmp_combo_usb_power_off(phy); if (ret) return ret; - return qmp_combo_com_exit(qphy); + return qmp_combo_com_exit(qmp); } static int qmp_combo_usb_set_mode(struct phy *phy, enum phy_mode mode, int submode) { - struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qmp_combo *qmp = phy_get_drvdata(phy); - qphy->mode = mode; + qmp->mode = mode; return 0; } @@ -2102,15 +2061,15 @@ static const struct phy_ops qmp_combo_dp_phy_ops = { .owner = THIS_MODULE, }; -static void qmp_combo_enable_autonomous_mode(struct qmp_phy *qphy) +static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp) { - const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *pcs_usb = qphy->pcs_usb ?: qphy->pcs; - void __iomem *pcs_misc = qphy->pcs_misc; + const struct qmp_phy_cfg *cfg = qmp->cfg; + void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; + void __iomem *pcs_misc = qmp->pcs_misc; u32 intr_mask; - if (qphy->mode == PHY_MODE_USB_HOST_SS || - qphy->mode == PHY_MODE_USB_DEVICE_SS) + if (qmp->mode == PHY_MODE_USB_HOST_SS || + qmp->mode == PHY_MODE_USB_DEVICE_SS) intr_mask = ARCVR_DTCT_EN | ALFPS_DTCT_EN; else intr_mask = ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL; @@ -2131,11 +2090,11 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_phy *qphy) qphy_clrbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN); } -static void qmp_combo_disable_autonomous_mode(struct qmp_phy *qphy) +static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp) { - const struct qmp_phy_cfg *cfg = qphy->cfg; - void __iomem *pcs_usb = qphy->pcs_usb ?: qphy->pcs; - void __iomem *pcs_misc = qphy->pcs_misc; + const struct qmp_phy_cfg *cfg = qmp->cfg; + void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; + void __iomem *pcs_misc = qmp->pcs_misc; /* Disable i/o clamp_n on resume for normal mode */ if (pcs_misc) @@ -2151,20 +2110,19 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_phy *qphy) static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); - struct qmp_phy *qphy = qmp->usb_phy; - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; - dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qphy->mode); + dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode); if (!qmp->init_count) { dev_vdbg(dev, "PHY not initialized, bailing out\n"); return 0; } - qmp_combo_enable_autonomous_mode(qphy); + qmp_combo_enable_autonomous_mode(qmp); - clk_disable_unprepare(qphy->pipe_clk); + clk_disable_unprepare(qmp->pipe_clk); clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); return 0; @@ -2172,12 +2130,11 @@ static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev) static int __maybe_unused qmp_combo_runtime_resume(struct device *dev) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); - struct qmp_phy *qphy = qmp->usb_phy; - const struct qmp_phy_cfg *cfg = qphy->cfg; + struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; int ret = 0; - dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qphy->mode); + dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode); if (!qmp->init_count) { dev_vdbg(dev, "PHY not initialized, bailing out\n"); @@ -2188,14 +2145,14 @@ static int __maybe_unused qmp_combo_runtime_resume(struct device *dev) if (ret) return ret; - ret = clk_prepare_enable(qphy->pipe_clk); + ret = clk_prepare_enable(qmp->pipe_clk); if (ret) { dev_err(dev, "pipe_clk enable failed, err=%d\n", ret); clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); return ret; } - qmp_combo_disable_autonomous_mode(qphy); + qmp_combo_disable_autonomous_mode(qmp); return 0; } @@ -2207,7 +2164,7 @@ static const struct dev_pm_ops qmp_combo_pm_ops = { static int qmp_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct qmp_combo *qmp = dev_get_drvdata(dev); int num = cfg->num_vregs; int ret, i; @@ -2239,7 +2196,7 @@ static int qmp_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg static int qmp_combo_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct qmp_combo *qmp = dev_get_drvdata(dev); int i; int ret; @@ -2260,7 +2217,7 @@ static int qmp_combo_reset_init(struct device *dev, const struct qmp_phy_cfg *cf static int qmp_combo_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct qmp_combo *qmp = dev_get_drvdata(dev); int num = cfg->num_clks; int i; @@ -2297,7 +2254,7 @@ static void phy_clk_release_provider(void *res) * clk | +-------+ | +-----+ * +---------------+ */ -static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) +static int phy_pipe_clk_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_fixed_rate *fixed; struct clk_init_data init = { }; @@ -2400,12 +2357,12 @@ static unsigned long qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_phy_dp_clks *dp_clks; - const struct qmp_phy *qphy; + const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_pixel_hw); - qphy = dp_clks->qphy; - dp_opts = &qphy->dp_opts; + qmp = dp_clks->qmp; + dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { case 1620: @@ -2444,12 +2401,12 @@ static unsigned long qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { const struct qmp_phy_dp_clks *dp_clks; - const struct qmp_phy *qphy; + const struct qmp_combo *qmp; const struct phy_configure_opts_dp *dp_opts; dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_link_hw); - qphy = dp_clks->qphy; - dp_opts = &qphy->dp_opts; + qmp = dp_clks->qmp; + dp_opts = &qmp->dp_opts; switch (dp_opts->link_rate) { case 1620: @@ -2484,8 +2441,7 @@ qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data) return &dp_clks->dp_pixel_hw; } -static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, - struct device_node *np) +static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) { struct clk_init_data init = { }; struct qmp_phy_dp_clks *dp_clks; @@ -2496,8 +2452,8 @@ static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, if (!dp_clks) return -ENOMEM; - dp_clks->qphy = qphy; - qphy->dp_clks = dp_clks; + dp_clks->qmp = qmp; + qmp->dp_clks = dp_clks; snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); init.ops = &qcom_qmp_dp_link_clk_ops; @@ -2526,20 +2482,15 @@ static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int id, +static int qmp_combo_create_dp(struct device *dev, struct device_node *np, void __iomem *serdes, const struct qmp_phy_cfg *cfg) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct qmp_combo *qmp = dev_get_drvdata(dev); struct phy *generic_phy; - struct qmp_phy *qphy; int ret; - qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); - if (!qphy) - return -ENOMEM; - - qphy->cfg = cfg; - qphy->dp_serdes = serdes; + qmp->cfg = cfg; + qmp->dp_serdes = serdes; /* * Get memory resources for each PHY: * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. @@ -2548,18 +2499,18 @@ static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int i * * Note that only tx/tx2 and pcs are used by the DP implementation. */ - qphy->dp_tx = devm_of_iomap(dev, np, 0, NULL); - if (IS_ERR(qphy->dp_tx)) - return PTR_ERR(qphy->dp_tx); + qmp->dp_tx = devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(qmp->dp_tx)) + return PTR_ERR(qmp->dp_tx); - qphy->dp_pcs = devm_of_iomap(dev, np, 2, NULL); - if (IS_ERR(qphy->dp_pcs)) - return PTR_ERR(qphy->dp_pcs); + qmp->dp_pcs = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qmp->dp_pcs)) + return PTR_ERR(qmp->dp_pcs); if (cfg->lanes >= 2) { - qphy->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); - if (IS_ERR(qphy->dp_tx2)) - return PTR_ERR(qphy->dp_tx2); + qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); + if (IS_ERR(qmp->dp_tx2)) + return PTR_ERR(qmp->dp_tx2); } generic_phy = devm_phy_create(dev, np, &qmp_combo_dp_phy_ops); @@ -2569,72 +2520,65 @@ static int qmp_combo_create_dp(struct device *dev, struct device_node *np, int i return ret; } - qphy->phy = generic_phy; - qphy->qmp = qmp; - qmp->phys[id] = qphy; - phy_set_drvdata(generic_phy, qphy); + qmp->dp_phy = generic_phy; + phy_set_drvdata(generic_phy, qmp); return 0; } -static int qmp_combo_create_usb(struct device *dev, struct device_node *np, int id, +static int qmp_combo_create_usb(struct device *dev, struct device_node *np, void __iomem *serdes, const struct qmp_phy_cfg *cfg) { - struct qcom_qmp *qmp = dev_get_drvdata(dev); + struct qmp_combo *qmp = dev_get_drvdata(dev); struct phy *generic_phy; - struct qmp_phy *qphy; int ret; - qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); - if (!qphy) - return -ENOMEM; - - qphy->cfg = cfg; - qphy->serdes = serdes; + qmp->cfg = cfg; + qmp->serdes = serdes; /* * Get memory resources for each PHY: * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. * For dual lane PHYs: tx2 -> 3, rx2 -> 4, pcs_misc (optional) -> 5 * For single lane PHYs: pcs_misc (optional) -> 3. */ - qphy->tx = devm_of_iomap(dev, np, 0, NULL); - if (IS_ERR(qphy->tx)) - return PTR_ERR(qphy->tx); + qmp->tx = devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(qmp->tx)) + return PTR_ERR(qmp->tx); - qphy->rx = devm_of_iomap(dev, np, 1, NULL); - if (IS_ERR(qphy->rx)) - return PTR_ERR(qphy->rx); + qmp->rx = devm_of_iomap(dev, np, 1, NULL); + if (IS_ERR(qmp->rx)) + return PTR_ERR(qmp->rx); - qphy->pcs = devm_of_iomap(dev, np, 2, NULL); - if (IS_ERR(qphy->pcs)) - return PTR_ERR(qphy->pcs); + qmp->pcs = devm_of_iomap(dev, np, 2, NULL); + if (IS_ERR(qmp->pcs)) + return PTR_ERR(qmp->pcs); if (cfg->pcs_usb_offset) - qphy->pcs_usb = qphy->pcs + cfg->pcs_usb_offset; + qmp->pcs_usb = qmp->pcs + cfg->pcs_usb_offset; if (cfg->lanes >= 2) { - qphy->tx2 = devm_of_iomap(dev, np, 3, NULL); - if (IS_ERR(qphy->tx2)) - return PTR_ERR(qphy->tx2); + qmp->tx2 = devm_of_iomap(dev, np, 3, NULL); + if (IS_ERR(qmp->tx2)) + return PTR_ERR(qmp->tx2); - qphy->rx2 = devm_of_iomap(dev, np, 4, NULL); - if (IS_ERR(qphy->rx2)) - return PTR_ERR(qphy->rx2); + qmp->rx2 = devm_of_iomap(dev, np, 4, NULL); + if (IS_ERR(qmp->rx2)) + return PTR_ERR(qmp->rx2); - qphy->pcs_misc = devm_of_iomap(dev, np, 5, NULL); + qmp->pcs_misc = devm_of_iomap(dev, np, 5, NULL); } else { - qphy->pcs_misc = devm_of_iomap(dev, np, 3, NULL); + qmp->pcs_misc = devm_of_iomap(dev, np, 3, NULL); } - if (IS_ERR(qphy->pcs_misc)) { + if (IS_ERR(qmp->pcs_misc)) { dev_vdbg(dev, "PHY pcs_misc-reg not used\n"); - qphy->pcs_misc = NULL; + qmp->pcs_misc = NULL; } - qphy->pipe_clk = devm_get_clk_from_child(dev, np, NULL); - if (IS_ERR(qphy->pipe_clk)) { - return dev_err_probe(dev, PTR_ERR(qphy->pipe_clk), - "failed to get lane%d pipe_clk\n", id); + qmp->pipe_clk = devm_get_clk_from_child(dev, np, NULL); + if (IS_ERR(qmp->pipe_clk)) { + return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), + "failed to get pipe clock\n"); } generic_phy = devm_phy_create(dev, np, &qmp_combo_usb_phy_ops); @@ -2644,17 +2588,15 @@ static int qmp_combo_create_usb(struct device *dev, struct device_node *np, int return ret; } - qphy->phy = generic_phy; - qphy->qmp = qmp; - qmp->phys[id] = qphy; - phy_set_drvdata(generic_phy, qphy); + qmp->usb_phy = generic_phy; + phy_set_drvdata(generic_phy, qmp); return 0; } static int qmp_combo_probe(struct platform_device *pdev) { - struct qcom_qmp *qmp; + struct qmp_combo *qmp; struct device *dev = &pdev->dev; struct device_node *child; struct phy_provider *phy_provider; @@ -2709,10 +2651,6 @@ static int qmp_combo_probe(struct platform_device *pdev) if (num > expected_phys) return -EINVAL; - qmp->phys = devm_kcalloc(dev, num, sizeof(*qmp->phys), GFP_KERNEL); - if (!qmp->phys) - return -ENOMEM; - pm_runtime_set_active(dev); ret = devm_pm_runtime_enable(dev); if (ret) @@ -2729,14 +2667,14 @@ static int qmp_combo_probe(struct platform_device *pdev) serdes = dp_serdes; /* Create per-lane phy */ - ret = qmp_combo_create_dp(dev, child, id, serdes, cfg); + ret = qmp_combo_create_dp(dev, child, serdes, cfg); if (ret) { dev_err(dev, "failed to create lane%d phy, %d\n", id, ret); goto err_node_put; } - ret = phy_dp_clks_register(qmp, qmp->phys[id], child); + ret = phy_dp_clks_register(qmp, child); if (ret) { dev_err(qmp->dev, "failed to register DP clock source\n"); @@ -2746,15 +2684,13 @@ static int qmp_combo_probe(struct platform_device *pdev) serdes = usb_serdes; /* Create per-lane phy */ - ret = qmp_combo_create_usb(dev, child, id, serdes, cfg); + ret = qmp_combo_create_usb(dev, child, serdes, cfg); if (ret) { dev_err(dev, "failed to create lane%d phy, %d\n", id, ret); goto err_node_put; } - qmp->usb_phy = qmp->phys[id]; - /* * Register the pipe clock provided by phy. * See function description to see details of this pipe clock. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nl6-20020a17090b384600b00213cdfa8abasi2415274pjb.173.2022.11.11.01.02.07; Fri, 11 Nov 2022 01:02:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="qv4nf/KV"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233577AbiKKI6U (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233449AbiKKI51 (ORCPT ); Fri, 11 Nov 2022 03:57:27 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2B697E992; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0E84961F08; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2B1A8C4FF41; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157044; bh=9QCvgaPFthb6sQCOGE29pX488mZSMXQmDL1/DQjfEp8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qv4nf/KV+mhHf+Otksy3+RznjhjvBR4RRjN6zOMUk1nfntKpdXHx9haFkISEhfKK3 TbJaYMrFXR717ui97z39VNeodX4PBg4B8f6lFwuw8o+tbl7CpsiHgW6BChO8ZHLNS1 l1Pbrz4B1hd7DQpylfEwz8nV++K6CHraNO2kKYpe82utvQLUF0XRYnph1tn4vkD8DN 9AzI4JQi0V8hvmasTv5GmyBaq5ud728XK1cRKTFhUCLfUUP97zLa+kFTNvNx1toUp4 Fgy7ZJTnwehHo0pmg8ldlTH4SsUzpLqzbWBnCAegbBgF4aZ9a039Sz5o6FljmKkYVH YOlbe0f64csFw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002Ug-Fp; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 19/22] phy: qcom-qmp-combo: clean up device-tree parsing Date: Fri, 11 Nov 2022 09:56:40 +0100 Message-Id: <20221111085643.9478-20-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189754725677787?= X-GMAIL-MSGID: =?utf-8?q?1749189754725677787?= Since the QMP driver split there will be precisely two child nodes so drop the obsolete iteration construct. While at it, drop the verbose error logging that would have been printed also on probe deferrals. Note that there is no need to check if there are additional child nodes (the kernel is not a devicetree validator), but let's return an error if either child node is missing. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 82 ++++++++--------------- 1 file changed, 28 insertions(+), 54 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 43b7ea5d2edc..a4df228d8ae2 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2598,13 +2598,12 @@ static int qmp_combo_probe(struct platform_device *pdev) { struct qmp_combo *qmp; struct device *dev = &pdev->dev; - struct device_node *child; + struct device_node *dp_np, *usb_np; struct phy_provider *phy_provider; void __iomem *serdes; void __iomem *usb_serdes; void __iomem *dp_serdes = NULL; const struct qmp_phy_cfg *cfg = NULL; - int num, id, expected_phys; int ret; qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL); @@ -2630,8 +2629,6 @@ static int qmp_combo_probe(struct platform_device *pdev) if (IS_ERR(dp_serdes)) return PTR_ERR(dp_serdes); - expected_phys = 2; - mutex_init(&qmp->phy_mutex); ret = qmp_combo_clk_init(dev, cfg); @@ -2646,75 +2643,52 @@ static int qmp_combo_probe(struct platform_device *pdev) if (ret) return ret; - num = of_get_available_child_count(dev->of_node); - /* do we have a rogue child node ? */ - if (num > expected_phys) + usb_np = of_get_child_by_name(dev->of_node, "usb3-phy"); + if (!usb_np) + return -EINVAL; + + dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); + if (!dp_np) { + of_node_put(usb_np); return -EINVAL; + } pm_runtime_set_active(dev); ret = devm_pm_runtime_enable(dev); if (ret) - return ret; + goto err_node_put; /* * Prevent runtime pm from being ON by default. Users can enable * it using power/control in sysfs. */ pm_runtime_forbid(dev); - id = 0; - for_each_available_child_of_node(dev->of_node, child) { - if (of_node_name_eq(child, "dp-phy")) { - serdes = dp_serdes; - - /* Create per-lane phy */ - ret = qmp_combo_create_dp(dev, child, serdes, cfg); - if (ret) { - dev_err(dev, "failed to create lane%d phy, %d\n", - id, ret); - goto err_node_put; - } - - ret = phy_dp_clks_register(qmp, child); - if (ret) { - dev_err(qmp->dev, - "failed to register DP clock source\n"); - goto err_node_put; - } - } else if (of_node_name_eq(child, "usb3-phy")) { - serdes = usb_serdes; - - /* Create per-lane phy */ - ret = qmp_combo_create_usb(dev, child, serdes, cfg); - if (ret) { - dev_err(dev, "failed to create lane%d phy, %d\n", - id, ret); - goto err_node_put; - } - - /* - * Register the pipe clock provided by phy. - * See function description to see details of this pipe clock. - */ - ret = phy_pipe_clk_register(qmp, child); - if (ret) { - dev_err(qmp->dev, - "failed to register pipe clock source\n"); - goto err_node_put; - } - } + ret = qmp_combo_create_usb(dev, usb_np, usb_serdes, cfg); + if (ret) + goto err_node_put; - id++; - } + ret = phy_pipe_clk_register(qmp, usb_np); + if (ret) + goto err_node_put; - if (!qmp->usb_phy) - return -EINVAL; + ret = qmp_combo_create_dp(dev, dp_np, dp_serdes, cfg); + if (ret) + goto err_node_put; + + ret = phy_dp_clks_register(qmp, dp_np); + if (ret) + goto err_node_put; phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + of_node_put(usb_np); + of_node_put(dp_np); + return PTR_ERR_OR_ZERO(phy_provider); err_node_put: - of_node_put(child); + of_node_put(usb_np); + of_node_put(dp_np); return ret; } From patchwork Fri Nov 11 08:56:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18577 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626555wru; Fri, 11 Nov 2022 01:01:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf6OI9PFeX9I080nzLgkwfg7YvfGUIYmheGeNEEB8WU5QV9S7bvWG3vdMahnsnRqMdHpnlwC X-Received: by 2002:a05:6402:60a:b0:461:92bd:21cf with SMTP id n10-20020a056402060a00b0046192bd21cfmr559916edv.405.1668157261051; Fri, 11 Nov 2022 01:01:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157261; cv=none; d=google.com; s=arc-20160816; b=UJdGw6uvdw60P9HEXs3whRMsv58TfxGfBn7mW08oW2/atSP9a0TVTHYPv0ghGg1klA BtEcYmk6T/oj1NfJA9xfZCJhBkLNENjwXjJ1Yd5EGOP1/aTquMvq4HPx/ARH/7/kWKp6 /QX0466CFmW46rYWyw222xFF1L+z5WZda2fUMAyQFjiVgoZuc12VlH2CutGQJ8wu+/T9 6eIqq/JCfGHn5cbWjgKY7O+dVjoQduaD93rNEUU7uSBrfhLt1GQE+4eMW0PkCDiq9AuA pNcv102aDuHNQPBjEVvdAof4ca+gal2LrqRpeaZalBy+szSNFm1yiquJofYv4YTo4OYm iMfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vuFGKNm8TtBFRpQkbmVYckPVTj3a7ulawnexTwWqZ5A=; b=xfvqdqw5SxZbeJvM75z9titrc5gXhR/b1os5bdElqNuNsFj/S1vxySOfKEkVGFVITA UYeVBugNiNRxuRIS+F9EiEA/cZIeFbvdZncQMYNN4XtAbbQMNBTSmH82okCmVhJLM8za EK3jng5dUoM0UjTAmxNfMqQgnCKswvb2zlgupITAtn0WWLyjCvuaOaPGE5jLKG7eGliT T9sfuJxQHxG+yJIyBlHS6ek0aXTYLCMLD+ktH25HImaa+rU4liTB0fC/2psAlM65Uqvj oFfJvmqFchSR4xTnQETqOcyAJSUnh59djghcTx+bpnZYG04qK2Z23X5GYppl37UL19t/ M/hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ELePEi3Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lx3-20020a170906af0300b007adacdfd08asi1218035ejb.295.2022.11.11.01.00.35; Fri, 11 Nov 2022 01:01:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ELePEi3Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233019AbiKKI7G (ORCPT + 99 others); Fri, 11 Nov 2022 03:59:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233469AbiKKI53 (ORCPT ); Fri, 11 Nov 2022 03:57:29 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 477657E983; Fri, 11 Nov 2022 00:57:28 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BCDD4B82477; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3769DC4FF60; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157044; bh=ZcOkzTSNHIA1u3WkLWyPc5izwzYrejfJdBdYMy+OOdU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ELePEi3YOs70QuiGKmgAsdZ0ftGkFzuyqHie6+tNV0s9cvADpQb4Wb6fDDraTx87Y jIu9XWpXK5X27abzDsQFfxvaE1a+Qwg+Ey3i3aNr5hz7wXCpkwn3p/h36TXRlmCQhg DWANKJMIv0YCoMLTiVlXI00/sluewrVtLvutt6Yvnp5cOUknOulrrvtkCnSu5BSJoM 4l1PDOAqG/MEIMe6SFIXlmN0nKcK8oxd4VnsVP3A7CekYvQKbLJSAnCKxHLWirBdXZ RrhMXWNCaiZ2Mi2L29my+iHVzUybxj+mT3JUKgM9YMXVvh4niZ5TgTLBE7aGUA+6S9 e2EyCf178ESpA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002Uj-J3; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 20/22] phy: qcom-qmp-combo: clean up probe initialisation Date: Fri, 11 Nov 2022 09:56:41 +0100 Message-Id: <20221111085643.9478-21-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189668304853248?= X-GMAIL-MSGID: =?utf-8?q?1749189668304853248?= Stop abusing the driver data pointer and instead pass the driver state structure directly to the initialisation helpers during probe. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 62 ++++++++++------------- 1 file changed, 28 insertions(+), 34 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index a4df228d8ae2..bb2c86976f78 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -2162,9 +2162,10 @@ static const struct dev_pm_ops qmp_combo_pm_ops = { qmp_combo_runtime_resume, NULL) }; -static int qmp_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg) +static int qmp_combo_vreg_init(struct qmp_combo *qmp) { - struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + struct device *dev = qmp->dev; int num = cfg->num_vregs; int ret, i; @@ -2194,9 +2195,10 @@ static int qmp_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg return 0; } -static int qmp_combo_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg) +static int qmp_combo_reset_init(struct qmp_combo *qmp) { - struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + struct device *dev = qmp->dev; int i; int ret; @@ -2215,9 +2217,10 @@ static int qmp_combo_reset_init(struct device *dev, const struct qmp_phy_cfg *cf return 0; } -static int qmp_combo_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg) +static int qmp_combo_clk_init(struct qmp_combo *qmp) { - struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + struct device *dev = qmp->dev; int num = cfg->num_clks; int i; @@ -2482,15 +2485,13 @@ static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np) return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); } -static int qmp_combo_create_dp(struct device *dev, struct device_node *np, - void __iomem *serdes, const struct qmp_phy_cfg *cfg) +static int qmp_combo_create_dp(struct qmp_combo *qmp, struct device_node *np) { - struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + struct device *dev = qmp->dev; struct phy *generic_phy; int ret; - qmp->cfg = cfg; - qmp->dp_serdes = serdes; /* * Get memory resources for each PHY: * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. @@ -2526,15 +2527,13 @@ static int qmp_combo_create_dp(struct device *dev, struct device_node *np, return 0; } -static int qmp_combo_create_usb(struct device *dev, struct device_node *np, - void __iomem *serdes, const struct qmp_phy_cfg *cfg) +static int qmp_combo_create_usb(struct qmp_combo *qmp, struct device_node *np) { - struct qmp_combo *qmp = dev_get_drvdata(dev); + const struct qmp_phy_cfg *cfg = qmp->cfg; + struct device *dev = qmp->dev; struct phy *generic_phy; int ret; - qmp->cfg = cfg; - qmp->serdes = serdes; /* * Get memory resources for each PHY: * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. @@ -2600,10 +2599,6 @@ static int qmp_combo_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *dp_np, *usb_np; struct phy_provider *phy_provider; - void __iomem *serdes; - void __iomem *usb_serdes; - void __iomem *dp_serdes = NULL; - const struct qmp_phy_cfg *cfg = NULL; int ret; qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL); @@ -2611,35 +2606,34 @@ static int qmp_combo_probe(struct platform_device *pdev) return -ENOMEM; qmp->dev = dev; - dev_set_drvdata(dev, qmp); - cfg = of_device_get_match_data(dev); - if (!cfg) + qmp->cfg = of_device_get_match_data(dev); + if (!qmp->cfg) return -EINVAL; - usb_serdes = serdes = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(serdes)) - return PTR_ERR(serdes); + qmp->serdes = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(qmp->serdes)) + return PTR_ERR(qmp->serdes); qmp->dp_com = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(qmp->dp_com)) return PTR_ERR(qmp->dp_com); - dp_serdes = devm_platform_ioremap_resource(pdev, 2); - if (IS_ERR(dp_serdes)) - return PTR_ERR(dp_serdes); + qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(qmp->dp_serdes)) + return PTR_ERR(qmp->dp_serdes); mutex_init(&qmp->phy_mutex); - ret = qmp_combo_clk_init(dev, cfg); + ret = qmp_combo_clk_init(qmp); if (ret) return ret; - ret = qmp_combo_reset_init(dev, cfg); + ret = qmp_combo_reset_init(qmp); if (ret) return ret; - ret = qmp_combo_vreg_init(dev, cfg); + ret = qmp_combo_vreg_init(qmp); if (ret) return ret; @@ -2663,7 +2657,7 @@ static int qmp_combo_probe(struct platform_device *pdev) */ pm_runtime_forbid(dev); - ret = qmp_combo_create_usb(dev, usb_np, usb_serdes, cfg); + ret = qmp_combo_create_usb(qmp, usb_np); if (ret) goto err_node_put; @@ -2671,7 +2665,7 @@ static int qmp_combo_probe(struct platform_device *pdev) if (ret) goto err_node_put; - ret = qmp_combo_create_dp(dev, dp_np, dp_serdes, cfg); + ret = qmp_combo_create_dp(qmp, dp_np); if (ret) goto err_node_put; From patchwork Fri Nov 11 08:56:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18573 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626268wru; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nc30-20020a1709071c1e00b0078dfe6dc4d2si1482713ejc.33.2022.11.11.01.00.00; Fri, 11 Nov 2022 01:00:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="IhkZiL+/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233599AbiKKI6f (ORCPT + 99 others); Fri, 11 Nov 2022 03:58:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233453AbiKKI51 (ORCPT ); Fri, 11 Nov 2022 03:57:27 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C64227E99E; Fri, 11 Nov 2022 00:57:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 11EB461F09; Fri, 11 Nov 2022 08:57:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 546FAC433D6; Fri, 11 Nov 2022 08:57:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668157044; bh=wNuGpKWL+DXYqRL8dJhpoLp3afK+DCMbnrSrckORwI0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IhkZiL+/I42sPfWcc6sdn9+jWnAA0mJK8u3W0y13AD442x+oObrzDzripiudhPUOK 39qOEF6jk2jgriEf5IcAwE2AZNTjCSadq5k4Gn4cuVh7C1K02cpwXqhi17ryLEYUPN 8CMsaNUS/wA9W7a1D9YX3wWEGPOytsvQZ/slmI8NlpkUz3kYtJttBcnsvmtn8qU2Wg Zt0kl0dnXA2rR6B+T80SfWAqdX91FM+u1JU2wGMoEoKHdQqZdfm+FwC8h5T3klIEN3 4XgnSruYBewJKQ66ACHhWJAvzR9xvMc03hqln50fnZ/BQ0y53QSCS7J1I/zxqsI90y LtJkBRah2AnsA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1otPqK-0002Um-MH; Fri, 11 Nov 2022 09:56:56 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 21/22] phy: qcom-qmp-combo: clean up PHY init Date: Fri, 11 Nov 2022 09:56:42 +0100 Message-Id: <20221111085643.9478-22-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221111085643.9478-1-johan+linaro@kernel.org> References: <20221111085643.9478-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749189629056328291?= X-GMAIL-MSGID: =?utf-8?q?1749189629056328291?= Clean up the USB PHY initialisation somewhat by programming both tx and rx for the second lane after the first lane. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index bb2c86976f78..6d98d37f8562 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -1950,14 +1950,12 @@ static int qmp_combo_usb_power_on(struct phy *phy) /* Tx, Rx, and PCS configurations */ qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); - - if (cfg->lanes >= 2) - qmp_combo_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); - qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); - if (cfg->lanes >= 2) + if (cfg->lanes >= 2) { + qmp_combo_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); qmp_combo_configure_lane(qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); + } qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); From patchwork Fri Nov 11 08:56:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 18566 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp626137wru; Fri, 11 Nov 2022 01:00:07 -0800 (PST) X-Google-Smtp-Source: AA0mqf5AZ/cxkC5JtfnhupcqPOrSCxa6yHuRCQyUI7M4sFgOyirW9IEM1rnUcCMzCB9snEIhpYBl X-Received: by 2002:aa7:c983:0:b0:461:c6e8:452e with SMTP id c3-20020aa7c983000000b00461c6e8452emr593553edt.298.1668157207625; Fri, 11 Nov 2022 01:00:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668157207; cv=none; d=google.com; s=arc-20160816; b=U7KCXhVR3GT7MLo1wAOtl9135J6rPduictaGDyGgdAgQkqXBuqMVqXaGCGMaSoWa7W 4ItG4X+ikUacXEfanjqpVk4i/oYD6YOyREsBHiMnEFBP3CMzB4Z0xXL5NxepCwyox2m7 W9R6LGKjqByD1Q2zGymAzmPTiAJ49c2kx6Q+LY4nBetyRxEBfpK0wa/F49bplt17BN7O ZY57yDaW6f39YWx22Ii0AngOyGcpjKMgsiCVAxpxeS2Egz0qYY6HMyXe3NhNDr6dzu/h Ki46DOIbI8SQ7NSNFTi1tHjdrpMlGKlOB0ZQsLESkQHptUedK76/1hDn1za8gE1cVsiN 8IYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vVXGmWiCG7WpeIURxXIzJeVoO7TkbD8/trSLhmSBmtM=; b=AH2QKgxnUyT0KprXILewXTNdL6IzXzhVyokXUre/pLT/2PD7v61CQqMuNYa9o3zLOG AX9xtHdXdM8fbE82JV7QCJj5BNC048W/orAXQEC6zpr7D+Jg4jJRfD1BT/5q19EBxB2P ngKJTeVqaIK9aSmX4ynXcE+4lupa6/rh/EUyEVeu6ZfEjgvvV6RhUWiko87yA5KrhGMC 7e+8g5C1Gfv2Ei1uov3X6XDfcLd6dTkFH8/D/PPmq56StqDx2An0/t0rvbu3s+rrtQg2 Au/DSwRyiQGC3L3iEN64FMXnYVU2PAxVt/bQVOTwVbQ2hMiwQFkYb92nGK5ODKatzW5F hDsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=rA8F1HOe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 82 +++++++++++------------ 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 6d98d37f8562..51a03ac05c91 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -905,17 +905,17 @@ struct qmp_combo { struct qmp_phy_dp_clks *dp_clks; }; -static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_combo *qmp); -static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_combo *qmp); -static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_combo *qmp); -static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_combo *qmp); +static void qmp_v3_dp_aux_init(struct qmp_combo *qmp); +static void qmp_v3_configure_dp_tx(struct qmp_combo *qmp); +static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp); +static int qmp_v3_calibrate_dp_phy(struct qmp_combo *qmp); -static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_combo *qmp); -static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_combo *qmp); -static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp); -static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_combo *qmp); +static void qmp_v4_dp_aux_init(struct qmp_combo *qmp); +static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp); +static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp); +static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp); -static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp); +static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp); static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) { @@ -995,10 +995,10 @@ static const struct qmp_phy_cfg sc7180_usb3dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, + .dp_aux_init = qmp_v3_dp_aux_init, + .configure_dp_tx = qmp_v3_configure_dp_tx, + .configure_dp_phy = qmp_v3_configure_dp_phy, + .calibrate_dp_phy = qmp_v3_calibrate_dp_phy, .clk_list = qmp_v3_phy_clk_l, .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), @@ -1042,10 +1042,10 @@ static const struct qmp_phy_cfg sdm845_usb3dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate, + .dp_aux_init = qmp_v3_dp_aux_init, + .configure_dp_tx = qmp_v3_configure_dp_tx, + .configure_dp_phy = qmp_v3_configure_dp_phy, + .calibrate_dp_phy = qmp_v3_calibrate_dp_phy, .clk_list = qmp_v3_phy_clk_l, .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), @@ -1090,10 +1090,10 @@ static const struct qmp_phy_cfg sc8180x_usb3dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qmp_v4_dp_aux_init, + .configure_dp_tx = qmp_v4_configure_dp_tx, + .configure_dp_phy = qmp_v4_configure_dp_phy, + .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, .clk_list = qmp_v4_phy_clk_l, .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), @@ -1138,10 +1138,10 @@ static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v5_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v5_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qmp_v4_dp_aux_init, + .configure_dp_tx = qmp_v4_configure_dp_tx, + .configure_dp_phy = qmp_v5_configure_dp_phy, + .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, .clk_list = qmp_v4_phy_clk_l, .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), @@ -1186,10 +1186,10 @@ static const struct qmp_phy_cfg sm8250_usb3dpphy_cfg = { .swing_hbr3_hbr2 = &qmp_dp_v3_voltage_swing_hbr3_hbr2, .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2, - .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init, - .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx, - .configure_dp_phy = qcom_qmp_v4_phy_configure_dp_phy, - .calibrate_dp_phy = qcom_qmp_v4_dp_phy_calibrate, + .dp_aux_init = qmp_v4_dp_aux_init, + .configure_dp_tx = qmp_v4_configure_dp_tx, + .configure_dp_phy = qmp_v4_configure_dp_phy, + .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, .clk_list = qmp_v4_sm8250_usbphy_clk_l, .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l), @@ -1262,7 +1262,7 @@ static int qmp_combo_dp_serdes_init(struct qmp_combo *qmp) return 0; } -static void qcom_qmp_v3_phy_dp_aux_init(struct qmp_combo *qmp) +static void qmp_v3_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, @@ -1343,7 +1343,7 @@ static int qmp_combo_configure_dp_swing(struct qmp_combo *qmp, return 0; } -static void qcom_qmp_v3_phy_configure_dp_tx(struct qmp_combo *qmp) +static void qmp_v3_configure_dp_tx(struct qmp_combo *qmp) { const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias_en, drvr_en; @@ -1396,7 +1396,7 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp) return reverse; } -static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_combo *qmp) +static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp) { const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; @@ -1473,7 +1473,7 @@ static int qcom_qmp_v3_phy_configure_dp_phy(struct qmp_combo *qmp) * We need to calibrate the aux setting here as many times * as the caller tries */ -static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_combo *qmp) +static int qmp_v3_calibrate_dp_phy(struct qmp_combo *qmp) { static const u8 cfg1_settings[] = { 0x13, 0x23, 0x1d }; u8 val; @@ -1487,7 +1487,7 @@ static int qcom_qmp_v3_dp_phy_calibrate(struct qmp_combo *qmp) return 0; } -static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_combo *qmp) +static void qmp_v4_dp_aux_init(struct qmp_combo *qmp) { writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, @@ -1514,7 +1514,7 @@ static void qcom_qmp_v4_phy_dp_aux_init(struct qmp_combo *qmp) qmp->dp_pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); } -static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_combo *qmp) +static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp) { /* Program default values before writing proper values */ writel(0x27, qmp->dp_tx + QSERDES_V4_TX_TX_DRV_LVL); @@ -1527,7 +1527,7 @@ static void qcom_qmp_v4_phy_configure_dp_tx(struct qmp_combo *qmp) QSERDES_V4_TX_TX_EMP_POST1_LVL); } -static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_combo *qmp) +static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp) { const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks; const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; @@ -1617,7 +1617,7 @@ static int qcom_qmp_v45_phy_configure_dp_phy(struct qmp_combo *qmp) return 0; } -static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp) +static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp) { const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias0_en, drvr0_en, bias1_en, drvr1_en; @@ -1625,7 +1625,7 @@ static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp) u32 status; int ret; - ret = qcom_qmp_v45_phy_configure_dp_phy(qmp); + ret = qmp_v45_configure_dp_phy(qmp); if (ret < 0) return ret; @@ -1679,7 +1679,7 @@ static int qcom_qmp_v4_phy_configure_dp_phy(struct qmp_combo *qmp) return 0; } -static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp) +static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp) { const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; u32 bias0_en, drvr0_en, bias1_en, drvr1_en; @@ -1687,7 +1687,7 @@ static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp) u32 status; int ret; - ret = qcom_qmp_v45_phy_configure_dp_phy(qmp); + ret = qmp_v45_configure_dp_phy(qmp); if (ret < 0) return ret; @@ -1740,7 +1740,7 @@ static int qcom_qmp_v5_phy_configure_dp_phy(struct qmp_combo *qmp) * We need to calibrate the aux setting here as many times * as the caller tries */ -static int qcom_qmp_v4_dp_phy_calibrate(struct qmp_combo *qmp) +static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp) { static const u8 cfg1_settings[] = { 0x20, 0x13, 0x23, 0x1d }; u8 val;