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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id fc7-20020a05600c524700b0040c44cb251dsm12388301wmb.46.2023.12.13.03.13.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 03:13:34 -0800 (PST) From: Christian Marangi To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Christian Marangi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH v3 1/4] dt-bindings: net: phy: Document new LEDs active-low property Date: Wed, 13 Dec 2023 12:13:19 +0100 Message-Id: <20231213111322.6152-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 13 Dec 2023 03:13:39 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785165012577951698 X-GMAIL-MSGID: 1785165012577951698 Document new LEDs active-low property to define if the LED require to be set low to be turned on. active-low can be defined in the leds node for PHY that apply the LED polarity globally for each attached LED or in the specific led node for PHY that supports setting the LED polarity per LED. Declaring both way is not supported and will result in the schema getting rejected. Signed-off-by: Christian Marangi --- Changes v3: - Out of RFC Changes v2: - Add this patch .../devicetree/bindings/net/ethernet-phy.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 8fb2a6ee7e5b..9cb3981fed2a 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -213,6 +213,11 @@ properties: '#size-cells': const: 0 + 'active-low': + type: boolean + description: + This define whether all LEDs needs to be low to be turned on. + patternProperties: '^led@[a-f0-9]+$': $ref: /schemas/leds/common.yaml# @@ -225,11 +230,26 @@ properties: driver dependent and required for ports that define multiple LED for the same port. + 'active-low': + type: boolean + description: + This define whether the LED needs to be low to be turned on. + required: - reg unevaluatedProperties: false + allOf: + - if: + required: + - active-low + then: + patternProperties: + '^led@[a-f0-9]+$': + properties: + 'active-low': false + additionalProperties: false required: From patchwork Wed Dec 13 11:13:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 177892 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp7697497dys; Wed, 13 Dec 2023 03:13:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IHS48t6kCWFlfyrYGiSA7xV+I/AvZJKbSFQzQD+NR9hBPgdf7LU27E70LFhKRPCv2YUfWMG X-Received: by 2002:a05:6a21:a5a4:b0:18f:fcc5:4c4f with SMTP id gd36-20020a056a21a5a400b0018ffcc54c4fmr3449720pzc.40.1702466028429; Wed, 13 Dec 2023 03:13:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702466028; cv=none; d=google.com; s=arc-20160816; b=NGAY/8EnodD2wAa8ZH/5A0DsXMKt2yeEWESy+xM9hnVP5qfzMfQfn5vTR6bUDCbF0B 7q1WvQp2thAh+SUQz0vMXvAeu/nBEHtzP/AY2sCu0Rcl2Irbdmd0Lvab6iaKUJLBOjTw wfVJLqzBVw+V8Y0CV7M5cW6VeyCLoBo7pLb23d04POtaFwDPiQUlHTC+0qewNFbIAEvy uZoEtdxmgYzfmWbDKNjILk0TXgEbYx7n8xcCEW/XxG57Z6fAWTIm9ihxczWvXtpmZuGm 5B6fbR4G0Zc6J3hIWRIrqUfBMUbBuyfCB8XjsevMYOfIL1F64bquPLDcpWBfGWQey69R uTJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=y3zKCeCRkldFKgWiWSKXv43mAIMprUIreQLunV+AG6M=; fh=tzu85gBR3VlvEe4Hwx1jZkp3RmpXm0UiYz0dmr1/rjQ=; b=P5EUM9DXd9ISR6kkKxFJnQwh2cOf2lFNo/xedYuuDaXD94C/YnFWGABwmmbZLYOBWt N3AjmCDnM/ro4gqSDKprZ1nmExrRzpLO9nV9e92mU9U+uKy7dBSnxZAYuJS9/AYIRYlf k4NaO9BFdR6GV2F4ZxpRWMkd387hLM+Qv2brBzqA+oyliQzGM1QRaHNB2A3N8cIgZ9pQ s3w0nmKCJ2AEH3W4h3ZPz3KnUWipYEianHmuc0atX2oLNwlV49vhY69+3E4a/9CRncQP FxUaBc8MEu5CaBB0b8n6cGOl87QRYocz09uITM5Y5nYwyHnodLVMx/axs1ldJty9FPAJ sQlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=IPW21o2F; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. 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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id fc7-20020a05600c524700b0040c44cb251dsm12388301wmb.46.2023.12.13.03.13.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 03:13:35 -0800 (PST) From: Christian Marangi To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Christian Marangi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH v3 2/4] net: phy: add support for PHY LEDs active-low Date: Wed, 13 Dec 2023 12:13:20 +0100 Message-Id: <20231213111322.6152-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231213111322.6152-1-ansuelsmth@gmail.com> References: <20231213111322.6152-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 13 Dec 2023 03:13:46 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785165018157800644 X-GMAIL-MSGID: 1785165018157800644 Add support for PHY LEDs active-low. Some PHY require LED to be set to active low to be turned on. Adds support for this by declaring active-low property in DT. Active-low can be defined in 2 different way: - In leds node to apply the active low setting globally for every LED. - In each led to apply the active low setting per LED (if supported). PHY driver needs to declare .led_polarity_set() to configure LED polarity. Index will be -1 if the option is set globally or will indicate the LED to apply the polarity settings. Function finally pass a bool to indicate if LED has to be set active low. .led_polarity_set() is called for both leds node and for each led subnode. PHY driver will ignore the additional call based on the passed index value if global setting or per LED setting is supported. Signed-off-by: Christian Marangi --- Changes v3: - Out of RFC Changes v2: - Add this patch drivers/net/phy/phy_device.c | 18 ++++++++++++++++++ include/linux/phy.h | 15 +++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index d8e9335d415c..a9f5d250abff 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -3093,6 +3093,7 @@ static int of_phy_led(struct phy_device *phydev, struct led_init_data init_data = {}; struct led_classdev *cdev; struct phy_led *phyled; + bool active_low; u32 index; int err; @@ -3109,6 +3110,13 @@ static int of_phy_led(struct phy_device *phydev, if (index > U8_MAX) return -EINVAL; + active_low = of_property_read_bool(led, "active-low"); + if (phydev->drv->led_polarity_set) { + err = phydev->drv->led_polarity_set(phydev, index, active_low); + if (err) + return err; + } + phyled->index = index; if (phydev->drv->led_brightness_set) cdev->brightness_set_blocking = phy_led_set_brightness; @@ -3145,6 +3153,7 @@ static int of_phy_leds(struct phy_device *phydev) { struct device_node *node = phydev->mdio.dev.of_node; struct device_node *leds, *led; + bool active_low; int err; if (!IS_ENABLED(CONFIG_OF_MDIO)) @@ -3157,6 +3166,15 @@ static int of_phy_leds(struct phy_device *phydev) if (!leds) return 0; + active_low = of_property_read_bool(leds, "active-low"); + if (phydev->drv->led_polarity_set) { + err = phydev->drv->led_polarity_set(phydev, -1, active_low); + if (err) { + of_node_put(leds); + return err; + } + } + for_each_available_child_of_node(leds, led) { err = of_phy_led(phydev, led); if (err) { diff --git a/include/linux/phy.h b/include/linux/phy.h index 6e7ebcc50b85..cbdebf174361 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -1145,6 +1145,21 @@ struct phy_driver { int (*led_hw_control_get)(struct phy_device *dev, u8 index, unsigned long *rules); + /** + * @led_polarity_set: Set the LED polarity if active low + * @dev: PHY device which has the LED + * @index: Which LED of the PHY device or -1 + * @active_low: LED needs to be set low to turn on + * + * Set the PHY to require the LED low to turn on. + * index can be the LED of the PHY device or -1 whether the + * LED polatiry is global and applied to every LED or polarity + * is set per LED. + * + * Returns 0, or an error code. + */ + int (*led_polarity_set)(struct phy_device *dev, int index, + bool active_low); }; #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ struct phy_driver, mdiodrv) From patchwork Wed Dec 13 11:13:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 177893 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp7697556dys; Wed, 13 Dec 2023 03:13:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IGfaL8bXbs65slkKR/Dx/ckELrh38e0+OjJSilZzbmnvp+gsc1Kmh1sj5qv42k+/NbXP1sZ X-Received: by 2002:a17:903:2d1:b0:1d0:6b95:9c06 with SMTP id s17-20020a17090302d100b001d06b959c06mr4688354plk.16.1702466036046; Wed, 13 Dec 2023 03:13:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702466036; cv=none; d=google.com; s=arc-20160816; b=agC8CqzsUO14tOX5GUmS7mfUZ6AYQNsHkBsWPuuA1saLuiHyYb5Zr9jtKb9AJqtIkX wHqB+1wwwrosDCaCSrwOyw4ceWlDiUtc8PC5+us26bCRUmU0GapMdQzcF6d8vK6aKj3J GkJXNaEgSnaNrJWiSyvj24BTqql6QiL8Ry9+6OKmqI85/U/IDISf7nQuHkhHZMZ3monJ OAxk1af/7z7KDhJiyIIURa1fc1rMqUq2ISn4UkwEr1CaiHA5k9s05E1bKhM20mFMdkh+ hxexrU+dll/Ig9WwauicZ1PPKddkKqFPa2zt5N+9e97f8CJ/RpLpLByYTkiWOMqhf/+D IcnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Jbp9q33bbrLugJBFpEcvsBQj4/TK8c9t0fvxH3F0ISo=; fh=tzu85gBR3VlvEe4Hwx1jZkp3RmpXm0UiYz0dmr1/rjQ=; b=J7DTP2bIgN6PLbZ9d7jSeeisf53L0G74DYC/UROHZ9GSZJ7dJmgfpTHCy2veqayjhP Hfrk5omJaCkYtPqZfVV6PKwsBoevy2EASBWGnNOKImq+djKX1auCXUQaF+suFzoQ8TF2 ho3+svajd1ZJMhVPzRZOnoVPNFHhbpKKmiIZm9LCfAHgBBaHv+wVHfWNRrfjWWwFjSfh 7QXkqCt5b8BWPzxUMJfmHn2GIcJubEsgudpqlimwA65bWgBTABXgTAwtj4/1dM7O1vGo LoWHc9AxQVYSV73lQQCpVTWl3AlrKz2Hemzso2rfBGQTFlv/zcc9ISx60CJOAQXPtaMQ +vEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=NLwzBxxg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from agentk.vger.email (agentk.vger.email. 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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id fc7-20020a05600c524700b0040c44cb251dsm12388301wmb.46.2023.12.13.03.13.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 03:13:36 -0800 (PST) From: Christian Marangi To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Christian Marangi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH v3 3/4] dt-bindings: net: Document QCA808x PHYs Date: Wed, 13 Dec 2023 12:13:21 +0100 Message-Id: <20231213111322.6152-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231213111322.6152-1-ansuelsmth@gmail.com> References: <20231213111322.6152-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 13 Dec 2023 03:13:50 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785165026174762969 X-GMAIL-MSGID: 1785165026174762969 Add Documentation for QCA808x PHYs for the additional LED configuration for this PHY. Signed-off-by: Christian Marangi Reviewed-by: Rob Herring --- For Rob, I used enum instead of const as I assume more PHY will come in the future for the qca808x family. Currently only qca8081 has seen around. Changes v3: - Use compatible instead of select - Out of RFC Changes v2: - Fix License warning from checkpatch - Drop redundant Description phrase - Improve commit tile - Drop special property (generalized) .../devicetree/bindings/net/qca,qca808x.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qca,qca808x.yaml diff --git a/Documentation/devicetree/bindings/net/qca,qca808x.yaml b/Documentation/devicetree/bindings/net/qca,qca808x.yaml new file mode 100644 index 000000000000..e2552655902a --- /dev/null +++ b/Documentation/devicetree/bindings/net/qca,qca808x.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qca,qca808x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Atheros QCA808X PHY + +maintainers: + - Christian Marangi + +description: + QCA808X PHYs can have up to 3 LEDs attached. + All 3 LEDs are disabled by default. + 2 LEDs have dedicated pins with the 3rd LED having the + double function of Interrupt LEDs/GPIO or additional LED. + + By default this special PIN is set to LED function. + +allOf: + - $ref: ethernet-phy.yaml# + +properties: + compatible: + enum: + - ethernet-phy-id004d.d101 + +unevaluatedProperties: false + +examples: + - | + #include + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-id004d.d101"; + reg = <0>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + }; + }; + }; From patchwork Wed Dec 13 11:13:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 177894 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:3b04:b0:fb:cd0c:d3e with SMTP id c4csp7697698dys; Wed, 13 Dec 2023 03:14:12 -0800 (PST) X-Google-Smtp-Source: AGHT+IGiqjVuw+mnTSWkawbjfmaR1JB+CaFeARCKTFSKSyOEb9bi4mvI+xjKQRq9LRSvI2DRhWNQ X-Received: by 2002:a05:6e02:1a63:b0:35f:717e:c960 with SMTP id w3-20020a056e021a6300b0035f717ec960mr1081264ilv.26.1702466052173; Wed, 13 Dec 2023 03:14:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702466052; cv=none; d=google.com; s=arc-20160816; b=p+ElDA0gNq8Bxfa4/HV8pUDxhPVzsH6NlhWoBJaxAmcxr5NdTpm8+0QyO8hi1Hm08z mdbis7rhQpyNN4HXLrmi27e9x5MBml8ztiATeREM+nzdp3Ah6zcOprZegTooYUOPHwz9 C9giUlRjvMmrLopcGkCvw/owWAr+/nxAZlpLp+rYxhNOv9ZAWCQJsVOw22egxts1syBp UbXWlTAdJekb7t9QaBUYql6+gdgn3tbFuLQHyLemcdUDLpvdlaP9pbBAlCNJIVie6UqE IFFhdifW1eXD4w1kTi1uvvWXKgzIL0V89VuueNmlP5856GTUA6COtfsGkuVMRYm+LyMw peMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iZeodouXCxjXC5HG8L3ZXr6Z5BBeR9v4nmWTsbrew50=; fh=tzu85gBR3VlvEe4Hwx1jZkp3RmpXm0UiYz0dmr1/rjQ=; b=06jKvQDqYgCT3B273pq6vNdJSkYmuT8/X+hI1aH/XhvFXztvXdigxkHnwf7vYLLCD4 x4Q333QW0Q/keXGkMEkkCILusQUexDKgMX5PeoSbsyvo1mP1hARN4Edfm18Lh7dWfp/n Ac3hUO0CzjTHH+s/dF8aqfmL3Uu/9SvJ+8GpVNPL9uzKWb8+Z28p5/AN3u9yuiI6wQo+ owyZPLkiBtiA+vqrTw86JmYKhzuesgE/w90l+fX1X75Kdt/m5hWvXb6tq206dGyNb6E7 pS3nOeiRnTlWql5EmY4FdZIBqrS1cdbxnrJMyCPmQ2o2ePj0FZrp1VlIYIlXiYvMPxc/ oyww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=L0qQrMym; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from pete.vger.email (pete.vger.email. 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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id fc7-20020a05600c524700b0040c44cb251dsm12388301wmb.46.2023.12.13.03.13.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 03:13:37 -0800 (PST) From: Christian Marangi To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Christian Marangi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH v3 4/4] net: phy: at803x: add LED support for qca808x Date: Wed, 13 Dec 2023 12:13:22 +0100 Message-Id: <20231213111322.6152-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231213111322.6152-1-ansuelsmth@gmail.com> References: <20231213111322.6152-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 13 Dec 2023 03:14:06 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785165043519742858 X-GMAIL-MSGID: 1785165043519742858 Add LED support for QCA8081 PHY. Documentation for this LEDs PHY is very scarce even with NDA access to Documentation for OEMs. Only the blink pattern are documented and are very confusing most of the time. No documentation is present about forcing the LED on/off or to always blink. Those settings were reversed by poking the regs and trying to find the correct bits to trigger these modes. Some bits mode are not clear and maybe the documentation option are not 100% correct. For the sake of LED support the reversed option are enough to add support for current LED APIs. Supported HW control modes are: - tx - rx - link10 - link100 - link1000 - half_duplex - full_duplex Also add support for LED polarity set to set LED polarity to active high or low. QSDK sets this value to high by default but PHY reset value doesn't have this enabled by default. QSDK also sets 2 additional bits but their usage is not clear, info about this is added in the header. It was verified that for correct function of the LED if active high is needed, only BIT 6 is needed. Signed-off-by: Christian Marangi --- Changes v3: - Out of RFC - Drop link_25000 and add TODO commends waiting for the netdev trigger thing to be merged (I will take care of sending a followup patch later) Changes v2: - Move to new led_polarity_set implementation - Drop special probe drivers/net/phy/at803x.c | 281 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 281 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index b9d3a26cf6dc..7c3c4df65787 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -272,6 +272,69 @@ #define QCA808X_CDT_STATUS_STAT_OPEN 2 #define QCA808X_CDT_STATUS_STAT_SHORT 3 +#define QCA808X_MMD7_LED2_CTRL 0x8074 +#define QCA808X_MMD7_LED2_FORCE_CTRL 0x8075 +#define QCA808X_MMD7_LED1_CTRL 0x8076 +#define QCA808X_MMD7_LED1_FORCE_CTRL 0x8077 +#define QCA808X_MMD7_LED0_CTRL 0x8078 +#define QCA808X_MMD7_LED_CTRL(x) (0x8078 - ((x) * 2)) + +/* LED hw control pattern is the same for every LED */ +#define QCA808X_LED_PATTERN_MASK GENMASK(15, 0) +#define QCA808X_LED_SPEED2500_ON BIT(15) +#define QCA808X_LED_SPEED2500_BLINK BIT(14) +/* Follow blink trigger even if duplex or speed condition doesn't match */ +#define QCA808X_LED_BLINK_CHECK_BYPASS BIT(13) +#define QCA808X_LED_FULL_DUPLEX_ON BIT(12) +#define QCA808X_LED_HALF_DUPLEX_ON BIT(11) +#define QCA808X_LED_TX_BLINK BIT(10) +#define QCA808X_LED_RX_BLINK BIT(9) +#define QCA808X_LED_TX_ON_10MS BIT(8) +#define QCA808X_LED_RX_ON_10MS BIT(7) +#define QCA808X_LED_SPEED1000_ON BIT(6) +#define QCA808X_LED_SPEED100_ON BIT(5) +#define QCA808X_LED_SPEED10_ON BIT(4) +#define QCA808X_LED_COLLISION_BLINK BIT(3) +#define QCA808X_LED_SPEED1000_BLINK BIT(2) +#define QCA808X_LED_SPEED100_BLINK BIT(1) +#define QCA808X_LED_SPEED10_BLINK BIT(0) + +#define QCA808X_MMD7_LED0_FORCE_CTRL 0x8079 +#define QCA808X_MMD7_LED_FORCE_CTRL(x) (0x8079 - ((x) * 2)) + +/* LED force ctrl is the same for every LED + * No documentation exist for this, not even internal one + * with NDA as QCOM gives only info about configuring + * hw control pattern rules and doesn't indicate any way + * to force the LED to specific mode. + * These define comes from reverse and testing and maybe + * lack of some info or some info are not entirely correct. + * For the basic LED control and hw control these finding + * are enough to support LED control in all the required APIs. + */ +#define QCA808X_LED_FORCE_MASK GENMASK(15, 13) +#define QCA808X_LED_FORCE_BLINK_8HZ FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x7) +#define QCA808X_LED_FORCE_BLINK_4HZ FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x6) +#define QCA808X_LED_FORCE_ON FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x5) +#define QCA808X_LED_FORCE_OFF FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x4) +/* HW control option are confusing: + * - 0x3 is 50% on 50% off at 4hz + * - 0x2 is 75% on 25% off at 4hz + * - 0x1 is 25% on 75% off at 4hz + * - 0x0 is 50% on 50% off at 8hz and is set by default + * This comes from visual check and may not be 100% correct. + */ +#define QCA808X_LED_HW_CONTROL_50_50_4HZ FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x3) +#define QCA808X_LED_HW_CONTROL_75_25 FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x2) +#define QCA808X_LED_HW_CONTROL_25_75 FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x1) +#define QCA808X_LED_HW_CONTROL_50_50_8HZ FIELD_PREP(QCA808X_LED_FORCE_MASK, 0x0) + +#define QCA808X_MMD7_LED_POLARITY_CTRL 0x901a +/* QSDK sets by default 0x46 to this reg that sets BIT 6 for + * LED to active high. It's not clear what BIT 3 and BIT 4 does. + */ +#define QCA808X_LED_ACTIVE_HIGH BIT(6) + /* QCA808X 1G chip type */ #define QCA808X_PHY_MMD7_CHIP_TYPE 0x901d #define QCA808X_PHY_CHIP_TYPE_1G BIT(0) @@ -2128,6 +2191,218 @@ static void qca808x_link_change_notify(struct phy_device *phydev) QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0); } +static int qca808x_led_parse_netdev(struct phy_device *phydev, unsigned long rules, + u16 *offload_trigger) +{ + /* TODO: add link_2500 when added to netdev trigger */ + /* Parsing specific to netdev trigger */ + if (test_bit(TRIGGER_NETDEV_TX, &rules)) + *offload_trigger |= QCA808X_LED_TX_BLINK; + if (test_bit(TRIGGER_NETDEV_RX, &rules)) + *offload_trigger |= QCA808X_LED_RX_BLINK; + if (test_bit(TRIGGER_NETDEV_LINK_10, &rules)) + *offload_trigger |= QCA808X_LED_SPEED10_ON; + if (test_bit(TRIGGER_NETDEV_LINK_100, &rules)) + *offload_trigger |= QCA808X_LED_SPEED100_ON; + if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules)) + *offload_trigger |= QCA808X_LED_SPEED1000_ON; + if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &rules)) + *offload_trigger |= QCA808X_LED_HALF_DUPLEX_ON; + if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &rules)) + *offload_trigger |= QCA808X_LED_FULL_DUPLEX_ON; + + if (rules && !*offload_trigger) + return -EOPNOTSUPP; + + /* Enable BLINK_CHECK_BYPASS by default to make the LED + * blink even with duplex or speed mode not enabled. + */ + *offload_trigger |= QCA808X_LED_BLINK_CHECK_BYPASS; + + return 0; +} + +static int qca808x_led_hw_control_enable(struct phy_device *phydev, u8 index) +{ + u16 reg; + + if (index > 2) + return -EINVAL; + + reg = QCA808X_MMD7_LED_FORCE_CTRL(index); + + return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, + QCA808X_LED_FORCE_MASK); +} + +static int qca808x_led_hw_is_supported(struct phy_device *phydev, u8 index, + unsigned long rules) +{ + u16 offload_trigger = 0; + + if (index > 2) + return -EINVAL; + + return qca808x_led_parse_netdev(phydev, rules, &offload_trigger); +} + +static int qca808x_led_hw_control_set(struct phy_device *phydev, u8 index, + unsigned long rules) +{ + u16 reg, offload_trigger = 0; + int ret; + + if (index > 2) + return -EINVAL; + + reg = QCA808X_MMD7_LED_CTRL(index); + + ret = qca808x_led_parse_netdev(phydev, rules, &offload_trigger); + if (ret) + return ret; + + ret = qca808x_led_hw_control_enable(phydev, index); + if (ret) + return ret; + + return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, + QCA808X_LED_PATTERN_MASK, + offload_trigger); +} + +static bool qca808x_led_hw_control_status(struct phy_device *phydev, u8 index) +{ + u16 reg; + int val; + + if (index > 2) + return false; + + reg = QCA808X_MMD7_LED_FORCE_CTRL(index); + + val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); + + return !(val & QCA808X_LED_FORCE_MASK); +} + +static int qca808x_led_hw_control_get(struct phy_device *phydev, u8 index, + unsigned long *rules) +{ + u16 reg; + int val; + + if (index > 2) + return -EINVAL; + + /* Check if we have hw control enabled */ + if (qca808x_led_hw_control_status(phydev, index)) + return -EINVAL; + + reg = QCA808X_MMD7_LED_CTRL(index); + + /* TODO: add link_2500 when added to netdev trigger */ + val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); + if (val & QCA808X_LED_TX_BLINK) + set_bit(TRIGGER_NETDEV_TX, rules); + if (val & QCA808X_LED_RX_BLINK) + set_bit(TRIGGER_NETDEV_RX, rules); + if (val & QCA808X_LED_SPEED10_ON) + set_bit(TRIGGER_NETDEV_LINK_10, rules); + if (val & QCA808X_LED_SPEED100_ON) + set_bit(TRIGGER_NETDEV_LINK_100, rules); + if (val & QCA808X_LED_SPEED1000_ON) + set_bit(TRIGGER_NETDEV_LINK_1000, rules); + if (val & QCA808X_LED_HALF_DUPLEX_ON) + set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules); + if (val & QCA808X_LED_FULL_DUPLEX_ON) + set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules); + + return 0; +} + +static int qca808x_led_hw_control_reset(struct phy_device *phydev, u8 index) +{ + u16 reg; + + if (index > 2) + return -EINVAL; + + reg = QCA808X_MMD7_LED_CTRL(index); + + return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, + QCA808X_LED_PATTERN_MASK); +} + +static int qca808x_led_brightness_set(struct phy_device *phydev, + u8 index, enum led_brightness value) +{ + u16 reg; + int ret; + + if (index > 2) + return -EINVAL; + + if (!value) { + ret = qca808x_led_hw_control_reset(phydev, index); + if (ret) + return ret; + } + + reg = QCA808X_MMD7_LED_FORCE_CTRL(index); + + return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, + QCA808X_LED_FORCE_MASK, + value ? QCA808X_LED_FORCE_ON : + QCA808X_LED_FORCE_OFF); +} + +static int qca808x_led_blink_set(struct phy_device *phydev, u8 index, + unsigned long *delay_on, + unsigned long *delay_off) +{ + u16 reg; + int ret; + + if (index > 2) + return -EINVAL; + + reg = QCA808X_MMD7_LED_FORCE_CTRL(index); + + ret = phy_modify_mmd(phydev, MDIO_MMD_AN, reg, + QCA808X_LED_FORCE_MASK, + QCA808X_LED_FORCE_BLINK_4HZ); + if (ret) + return ret; + + /* We set blink to 4Hz, aka 250ms */ + *delay_on = 250 / 2; + *delay_off = 250 / 2; + + return 0; +} + +static int qca808x_led_polarity_set(struct phy_device *phydev, int index, + bool active_low) +{ + int ret; + + /* Ignore calling LED polarity set for LED node */ + if (index >= 0) + return 0; + + if (active_low) { + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, + QCA808X_MMD7_LED_POLARITY_CTRL, + QCA808X_LED_ACTIVE_HIGH); + } else { + ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, + QCA808X_MMD7_LED_POLARITY_CTRL, + QCA808X_LED_ACTIVE_HIGH); + } + + return ret; +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -2304,6 +2579,12 @@ static struct phy_driver at803x_driver[] = { .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, .link_change_notify = qca808x_link_change_notify, + .led_brightness_set = qca808x_led_brightness_set, + .led_blink_set = qca808x_led_blink_set, + .led_hw_is_supported = qca808x_led_hw_is_supported, + .led_hw_control_set = qca808x_led_hw_control_set, + .led_hw_control_get = qca808x_led_hw_control_get, + .led_polarity_set = qca808x_led_polarity_set, }, }; module_phy_driver(at803x_driver);