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These ranges are defined per platform, but hard-coded values were used instead which resulted in a smaller range available on the i.MX8M[MNP] than what was possible. Fixes: 846307185f0f ("drm/bridge: samsung-dsim: update PLL reference clock") Signed-off-by: Adam Ford Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index be5914caa17d..239d253a7d71 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -573,8 +573,8 @@ static unsigned long samsung_dsim_pll_find_pms(struct samsung_dsim *dsi, u16 _m, best_m; u8 _s, best_s; - p_min = DIV_ROUND_UP(fin, (12 * MHZ)); - p_max = fin / (6 * MHZ); + p_min = DIV_ROUND_UP(fin, (driver_data->pll_fin_max * MHZ)); + p_max = fin / (driver_data->pll_fin_min * MHZ); for (_p = p_min; _p <= p_max; ++_p) { for (_s = 0; _s <= 5; ++_s) { From patchwork Tue Dec 12 03:32:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 177076 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp7490010vqy; Mon, 11 Dec 2023 19:33:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IFNu/OR8OF4g4jpmO+d+3Paxzi4kMcxUWcy32fphhx5cnBZTsfdWqt7mSttXuJhQ46fxXHk X-Received: by 2002:a17:90a:e54b:b0:286:a27a:f232 with SMTP id ei11-20020a17090ae54b00b00286a27af232mr4899828pjb.5.1702352009680; Mon, 11 Dec 2023 19:33:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702352009; cv=none; d=google.com; s=arc-20160816; b=kAmeBA3gKz1vxqRxmEVVdycK6P9pVv5i59fh4Wq4wWixgLfeQGSu7QK2S1yOLB0qcG CPx/JNh8hDVBv3bqVVZKdnJzU22zpVZv+I07trCXGlcvlTiGfVWKg8j5NAO4bvM4+1UZ lSSb4z8/oKAyzSY0jXJWHntvS4BwwEkgaA0iqgQLevQumkgYfh/ch1VBUCt3uC8z+EWg g5EzQPHNC+fGEbcM0w2iB0eVc6+q2KscMqBOl2ANhDaC0oxcz/h7ioamXg+k4wGu3EFY lPfNJThTnAKMLD0uWT7L1FHYYu6tvqn4Kn4xPhVMamuf0BjMuX5ynGjDPlMgjrg6pwKe VYzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nYInYE6vgyZ8xggSLq7h777qBlps2bVu+HQMH76x0n0=; fh=9VTGxy7dmFtvjNXbJI8jvBMy/4r8PRlLrFbMT19D6hU=; b=QpsMFj4gKzLjgXbOp4AYo3j57FiF/1kHzxCoj4lnqadi2WvUfLwB53ITmrEkL/hIN2 1CXJEacL3FY3jksfi39HTEeb3U3PinZaJ2+4bGhuR7EddpQrVJDZ5LwQPmMpt15bzT0M kHTP8qUo5hbJzHbB1WnDes20Dcdc7bNPGKfLf20RvDZWUaaQJnBXv9XmNwgE40Af/1dr Dg1xVYYJ5sfszz+tDE8XtSBPobo0cHzDNxH+RgHOB3V+g6oclCcrmcHzShUFkGPLpJsg sp87wUzsIUvWOtp7RnRhVc1tGixOe3eEHO4rDPCCplz76tpw/RuIc5g2hmtVHwc4d2D7 fy3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=PlZ5rd0I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from fry.vger.email (fry.vger.email. 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Mon, 11 Dec 2023 19:33:15 -0800 (PST) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: aford@beaconembedded.com, Adam Ford , Frieder Schrempf , Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Michael Tretter , Marco Felsch , linux-kernel@vger.kernel.org Subject: [PATCH 2/2] drm/bridge: samsung-dsim: Fix porch calcalcuation rounding Date: Mon, 11 Dec 2023 21:32:59 -0600 Message-Id: <20231212033259.189718-2-aford173@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212033259.189718-1-aford173@gmail.com> References: <20231212033259.189718-1-aford173@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Mon, 11 Dec 2023 19:33:25 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785045460491167828 X-GMAIL-MSGID: 1785045460491167828 When using video sync pulses, the HFP, HBP, and HSA are divided between the available lanes if there is more than one lane. For certain timings and lane configurations, the HFP may not be evenly divisible. If the HFP is rounded down, it ends up being too small which can cause some monitors to not sync properly. In these instances, adjust htotal and hsync to round the HFP up, and recalculate the htotal. Tested-by: Frieder Schrempf # Kontron BL i.MX8MM with HDMI monitor Signed-off-by: Adam Ford diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 239d253a7d71..f5795da1d8bb 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1628,6 +1628,27 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge, adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); } + /* + * When using video sync pulses, the HFP, HBP, and HSA are divided between + * the available lanes if there is more than one lane. For certain + * timings and lane configurations, the HFP may not be evenly divisible. + * If the HFP is rounded down, it ends up being too small which can cause + * some monitors to not sync properly. In these instances, adjust htotal + * and hsync to round the HFP up, and recalculate the htotal. Through trial + * and error, it appears that the HBP and HSA do not appearto need the same + * correction that HFP does. + */ + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE && dsi->lanes > 1) { + int hfp = adjusted_mode->hsync_start - adjusted_mode->hdisplay; + int remainder = hfp % dsi->lanes; + + if (remainder) { + adjusted_mode->hsync_start += remainder; + adjusted_mode->hsync_end += remainder; + adjusted_mode->htotal += remainder; + } + } + return 0; }