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[8.43.85.97]) by mx.google.com with ESMTPS id z12-20020ab0770c000000b007c5c7cd43c9si911175uaq.31.2023.12.09.09.05.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Dec 2023 09:05:15 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@xry111.site header.s=default header.b=eYFLCEHP; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=xry111.site Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6C5E7385828C for ; Sat, 9 Dec 2023 17:05:14 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id 87E353858C53 for ; Sat, 9 Dec 2023 17:04:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 87E353858C53 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 87E353858C53 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=89.208.246.23 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702141462; cv=none; b=E+PL45tu0OJoXdXR1KVeiIe+9lV00w4J4M1ikq2eLuvM/qjbdXFrVAH8D3GTH5peEuBKxBUqg1xXEOZ9Mu2SqZxEocx+RWRuugEfHpuQ+pkufE8iG9OLX/lI4X78LvGM6v/eBO6aQVGqCuv2DCUHGRBfwxEDmWvPhYgkKtTBQDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702141462; c=relaxed/simple; bh=FuxlXFPwOr4Up4grdnjCQvtLSeftoOBE1PXxAV84nkM=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=JGJi5ho4xg5VKyLCiqN5tBI1H9h15Ey937epQKlMV9KEPfmj6p79Hb6oEgsjhs5R2Zm4RMSVRiGmm/WuUG3Q3vqtVlGGDn989c1oYWpuFe/JPvCF87RZeT3kJIxA5CbHDzCl3e1fW3XThan74VFqYnRJDlHvPuAZWkMy4f6M6fs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1702141458; bh=FuxlXFPwOr4Up4grdnjCQvtLSeftoOBE1PXxAV84nkM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eYFLCEHPX1pHEH0khwo2noUDIC/v6sLg+mnbcJRaZ6itX/Xwvi+j5CKSCALMF8wfM 9dkR8XCom2+veSFWubzYwtkId+ZgauWo2dtiMMN3zFH7+D4aMMwgS09QY3zlvhJKTM Nt4uEaBimpNIdjuSC93ivIAOb/rxlS++A15wc6IA= Received: from stargazer.. (unknown [IPv6:240e:358:1144:3a00:dc73:854d:832e:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id A2D436693E; Sat, 9 Dec 2023 12:04:15 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, c@jia.je, Xi Ruoyao Subject: [PATCH 1/3] LoongArch: Include rtl.h for COSTS_N_INSNS instead of hard coding our own Date: Sun, 10 Dec 2023 01:03:46 +0800 Message-ID: <20231209170347.12601-3-xry111@xry111.site> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231209170347.12601-2-xry111@xry111.site> References: <20231209170347.12601-2-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784824742013511753 X-GMAIL-MSGID: 1784824742013511753 With loongarch-def.cc switched from C to C++, we can include rtl.h for COSTS_N_INSNS, instead of hard coding our own. THis is a non-functional change for now, but it will make the code more future-proof in case COSTS_N_INSNS in rtl.h would be changed. gcc/ChangeLog: * config/loongarch/loongarch-def.cc (rtl.h): Include. (COSTS_N_INSNS): Remove the macro definition. --- gcc/config/loongarch/loongarch-def.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/gcc/config/loongarch/loongarch-def.cc b/gcc/config/loongarch/loongarch-def.cc index c41804a180e..6217b19268c 100644 --- a/gcc/config/loongarch/loongarch-def.cc +++ b/gcc/config/loongarch/loongarch-def.cc @@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. If not see #include "system.h" #include "coretypes.h" #include "tm.h" +#include "rtl.h" #include "loongarch-def.h" #include "loongarch-str.h" @@ -89,8 +90,6 @@ array_tune loongarch_cpu_align = .set (CPU_LA464, la464_align ()) .set (CPU_LA664, la464_align ()); -#define COSTS_N_INSNS(N) ((N) * 4) - /* Default RTX cost initializer. */ loongarch_rtx_cost_data::loongarch_rtx_cost_data () : fp_add (COSTS_N_INSNS (1)), From patchwork Sat Dec 9 17:03:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 176199 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp6152385vqy; Sat, 9 Dec 2023 09:04:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IEM/SpT/t2xsrjpslfSJHhp5vnd653ZrjNb9tSTkvPyPuOmNU6VOTk72iBSAwYERLfpZt/8 X-Received: by 2002:a05:6358:9dae:b0:170:26c3:ae83 with SMTP id d46-20020a0563589dae00b0017026c3ae83mr1448076rwo.57.1702141490123; Sat, 09 Dec 2023 09:04:50 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702141490; cv=pass; d=google.com; s=arc-20160816; b=rWts12T6yH9OVo+G6PLVRN0EPvobspHm8ndXw8CFIwkg2KuN2Lu9gvNEAtfg+0EFW0 jpPhWkneRW1AJ1M7MgpD9p9n+pP4vA0xFdyhbdyh7WSMvgipCVMlPKU+wgEFs0U4fXjQ b729NPZBcHSU2UOsKPJmYB5o1tY89l/VVJ9ublPTDNTFM86oK23ecrTT7ohs4UgKgcgB J6Y0HAN5SQyqMmj/vUyfsc/NPMcj8xDHbc5w2M2zVGo1r/ptr4dysH+UP5alZz99jz6S QB6SqY+EzvGP1WWqUZd6dawwi5llEEMIIgXLA5jSMUwnVmoukqcqYoLM9WLNLF9qoPyr 8RSA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=kOlUunPFUXHoSPkWPIkVIA2lLqBrAoM5frgGGOcpQQY=; fh=lAZEJv+juT1q6RYyAreaw+ZnRPAcRoheJ20Uybha2qY=; b=YEQ7nyhJOvI7GH2OwF6XBLbdUdLW/YFpyG31lPk6pWuJw/oWmGhVK3V0/U42dcYOM9 N9507k/HHBQx0gSX0la6dH8xwXGBk4ba1BHM0UlZqLuJwZ5s9cT6LEboD2VbNtYQhSAN OFKGslFQXGXtBpsn9Vbq3pCLn8bd3+hyieHngwZ2sVP0tzayCguvDT9oISwIOD9B6uS2 8YprwFd27GWLPLUa4DbKXEV0CyOEn/Eh8LKXrNYPUPzVp2+ofPMypoa8QSVVtSp+qbvy wW9mFAqtVLOo9W03CX2Gf51Q9TYa9ir4stLWwPBWPlhV9vM1HsdO30ps3LcdqY51JN1K RXbA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@xry111.site header.s=default header.b=ECJMeFMU; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=xry111.site Received: from server2.sourceware.org (server2.sourceware.org. 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(unknown [IPv6:240e:358:1144:3a00:dc73:854d:832e:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 7B1286693F; Sat, 9 Dec 2023 12:04:19 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, c@jia.je, Xi Ruoyao Subject: [PATCH 2/3] LoongArch: Fix instruction costs [PR112936] Date: Sun, 10 Dec 2023 01:03:47 +0800 Message-ID: <20231209170347.12601-4-xry111@xry111.site> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231209170347.12601-2-xry111@xry111.site> References: <20231209170347.12601-2-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784824714839719470 X-GMAIL-MSGID: 1784824714839719470 Replace the instruction costs in loongarch_rtx_cost_data constructor based on micro-benchmark results on LA464 and LA664. This allows optimizations like "x * 17" to alsl, and "x * 68" to alsl and slli. gcc/ChangeLog: PR target/112936 * config/loongarch/loongarch-def.cc (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update instruction costs per micro-benchmark results. (loongarch_rtx_cost_optimize_size): Set all instruction costs to (COSTS_N_INSNS (1) + 1). * config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove special case for multiplication when optimizing for size. Adjust division cost when TARGET_64BIT && !TARGET_DIV32. Account the extra cost when TARGET_CHECK_ZERO_DIV and optimizing for speed. gcc/testsuite/ChangeLog PR target/112936 * gcc.target/loongarch/mul-const-reduction.c: New test. --- gcc/config/loongarch/loongarch-def.cc | 39 ++++++++++--------- gcc/config/loongarch/loongarch.cc | 22 +++++------ .../loongarch/mul-const-reduction.c | 11 ++++++ 3 files changed, 43 insertions(+), 29 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c diff --git a/gcc/config/loongarch/loongarch-def.cc b/gcc/config/loongarch/loongarch-def.cc index 6217b19268c..4a8885e8343 100644 --- a/gcc/config/loongarch/loongarch-def.cc +++ b/gcc/config/loongarch/loongarch-def.cc @@ -92,15 +92,15 @@ array_tune loongarch_cpu_align = /* Default RTX cost initializer. */ loongarch_rtx_cost_data::loongarch_rtx_cost_data () - : fp_add (COSTS_N_INSNS (1)), - fp_mult_sf (COSTS_N_INSNS (2)), - fp_mult_df (COSTS_N_INSNS (4)), - fp_div_sf (COSTS_N_INSNS (6)), + : fp_add (COSTS_N_INSNS (5)), + fp_mult_sf (COSTS_N_INSNS (5)), + fp_mult_df (COSTS_N_INSNS (5)), + fp_div_sf (COSTS_N_INSNS (8)), fp_div_df (COSTS_N_INSNS (8)), - int_mult_si (COSTS_N_INSNS (1)), - int_mult_di (COSTS_N_INSNS (1)), - int_div_si (COSTS_N_INSNS (4)), - int_div_di (COSTS_N_INSNS (6)), + int_mult_si (COSTS_N_INSNS (4)), + int_mult_di (COSTS_N_INSNS (4)), + int_div_si (COSTS_N_INSNS (5)), + int_div_di (COSTS_N_INSNS (5)), branch_cost (6), memory_latency (4) {} @@ -111,18 +111,21 @@ loongarch_rtx_cost_data::loongarch_rtx_cost_data () array_tune loongarch_cpu_rtx_cost_data = array_tune (); -/* RTX costs to use when optimizing for size. */ +/* RTX costs to use when optimizing for size. + We use a value slightly larger than COSTS_N_INSNS (1) for all of them + because they are slower than simple instructions. */ +#define COST_COMPLEX_INSN (COSTS_N_INSNS (1) + 1) const loongarch_rtx_cost_data loongarch_rtx_cost_optimize_size = loongarch_rtx_cost_data () - .fp_add_ (4) - .fp_mult_sf_ (4) - .fp_mult_df_ (4) - .fp_div_sf_ (4) - .fp_div_df_ (4) - .int_mult_si_ (4) - .int_mult_di_ (4) - .int_div_si_ (4) - .int_div_di_ (4); + .fp_add_ (COST_COMPLEX_INSN) + .fp_mult_sf_ (COST_COMPLEX_INSN) + .fp_mult_df_ (COST_COMPLEX_INSN) + .fp_div_sf_ (COST_COMPLEX_INSN) + .fp_div_df_ (COST_COMPLEX_INSN) + .int_mult_si_ (COST_COMPLEX_INSN) + .int_mult_di_ (COST_COMPLEX_INSN) + .int_div_si_ (COST_COMPLEX_INSN) + .int_div_di_ (COST_COMPLEX_INSN); array_tune loongarch_cpu_issue_rate = array_tune () .set (CPU_NATIVE, 4) diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 754aeb8bfb7..f04b5798f39 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -3787,8 +3787,6 @@ loongarch_rtx_costs (rtx x, machine_mode mode, int outer_code, *total = (speed ? loongarch_cost->int_mult_si * 3 + 6 : COSTS_N_INSNS (7)); - else if (!speed) - *total = COSTS_N_INSNS (1) + 1; else if (mode == DImode) *total = loongarch_cost->int_mult_di; else @@ -3823,14 +3821,18 @@ loongarch_rtx_costs (rtx x, machine_mode mode, int outer_code, case UDIV: case UMOD: - if (!speed) - { - *total = COSTS_N_INSNS (loongarch_idiv_insns (mode)); - } - else if (mode == DImode) + if (mode == DImode) *total = loongarch_cost->int_div_di; else - *total = loongarch_cost->int_div_si; + { + *total = loongarch_cost->int_div_si; + if (TARGET_64BIT && !TARGET_DIV32) + *total += COSTS_N_INSNS (2); + } + + if (TARGET_CHECK_ZERO_DIV) + *total += COSTS_N_INSNS (2); + return false; case SIGN_EXTEND: @@ -3862,9 +3864,7 @@ loongarch_rtx_costs (rtx x, machine_mode mode, int outer_code, && (GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == ZERO_EXTEND)))) { - if (!speed) - *total = COSTS_N_INSNS (1) + 1; - else if (mode == DImode) + if (mode == DImode) *total = loongarch_cost->int_mult_di; else *total = loongarch_cost->int_mult_si; diff --git a/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c b/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c new file mode 100644 index 00000000000..02d9a4876d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mtune=la464" } */ +/* { dg-final { scan-assembler "alsl\.w" } } */ +/* { dg-final { scan-assembler "slli\.w" } } */ +/* { dg-final { scan-assembler-not "mul\.w" } } */ + +int +test (int a) +{ + return a * 68; +} From patchwork Sat Dec 9 17:03:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 176201 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp6152686vqy; Sat, 9 Dec 2023 09:05:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGZv/TBMMfOLI3JDP3BsJCilUodlzVL7M+yefSyptH0DmquuDjNRTBWmWjMBiV3Y78AMyj5 X-Received: by 2002:ac8:4e50:0:b0:425:8156:d6a2 with SMTP id e16-20020ac84e50000000b004258156d6a2mr2991916qtw.126.1702141518695; Sat, 09 Dec 2023 09:05:18 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1702141518; cv=pass; d=google.com; s=arc-20160816; b=bpDmHryxQaLg6+9xg9wg8JxmaQ3/nvxAk265wT88B5TJguFe9nXGBbEw9glRHkec7J MSHbzcV8ZR7gGrSynFYwmZj3umz4NWE7ulIiVKXsTqlPu8AdnOfGRB9d0uB/ZLT+7/20 dqfFxHzaM0QgmMJNJWRLQNiXPPJ4iu81PiAql1SkpNOF8cSAjUd8GLemfWvo3mo5tpmt mYrOLe70JriNX8MPhnGzHLc8E+M2QsVj+Q2k6rzhdLyBy+a6yfYF/ZQVnePgdWoZ2nzS vEcfmCbpFzlCoXhIQ92n1DMrChcYjPudKfMqAJWrSrqXCd8+exDJAp2KCvxJqiaMe5Vs Y2Jg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=/PjrpZAA5ZexCN5+N+4deeFho3AkTyztNrYPVctd5Qs=; fh=lAZEJv+juT1q6RYyAreaw+ZnRPAcRoheJ20Uybha2qY=; b=IROwokz7BRN/dFOL811V9g3nxDSZV+MdeVcDKfWPc1FahJ5adQs84jeo1rMghSY0pD QZzc7KSr4rOJWTH3EjSCJ5cpE4pS675mw+nkZFaITk1urpiWI3kvXjrzmVHPGj+wvSrI Du1Wi8Pq2w3kgBAoU4GglK0EQuIJguKsLzwmiOtFDt2leV+mMEOLeMBpPlWEbSFWEuBc Bj92+B48CZ5msbjQEwYAQbLGnXtlVHiu2lj7/HRiaWx/trwxByrwlU8f87OlOHYsABm9 qa3uuayaq0Uom5cxWPqE/Z1hesfecg/8IVg77C2yK0XM6ao39X1buh5Hy/qdlj2snM8f ZI1A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@xry111.site header.s=default header.b=mQ+qO0vk; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=xry111.site Received: from server2.sourceware.org (server2.sourceware.org. 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(unknown [IPv6:240e:358:1144:3a00:dc73:854d:832e:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 55B5466940; Sat, 9 Dec 2023 12:04:22 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, c@jia.je, Xi Ruoyao Subject: [PATCH 3/3] LoongArch: Add alslsi3_extend Date: Sun, 10 Dec 2023 01:03:48 +0800 Message-ID: <20231209170347.12601-5-xry111@xry111.site> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231209170347.12601-2-xry111@xry111.site> References: <20231209170347.12601-2-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784824745219040707 X-GMAIL-MSGID: 1784824745219040707 Following the instruction cost fix, we are generating alsl.w $a0, $a0, $a0, 4 instead of li.w $t0, 17 mul.w $a0, $t0 for "x * 4", because alsl.w is 4 times faster than mul.w. But we didn't have a sign-extending pattern for alsl.w, causing an extra slli.w instruction generated to sign-extend $a0. Add the pattern to remove the redundant extension. gcc/ChangeLog: * config/loongarch/loongarch.md (alslsi3_extend): New define_insn. --- gcc/config/loongarch/loongarch.md | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index afbf201d4d0..7b26d15aa4e 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -2869,6 +2869,18 @@ (define_insn "alsl3" [(set_attr "type" "arith") (set_attr "mode" "")]) +(define_insn "alslsi3_extend" + [(set (match_operand:DI 0 "register_operand" "=r") + (sign_extend:DI + (plus:SI + (ashift:SI (match_operand:SI 1 "register_operand" "r") + (match_operand 2 "const_immalsl_operand" "")) + (match_operand:SI 3 "register_operand" "r"))))] + "" + "alsl.w\t%0,%1,%3,%2" + [(set_attr "type" "arith") + (set_attr "mode" "SI")]) + ;; Reverse the order of bytes of operand 1 and store the result in operand 0.