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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v7-20020a63d547000000b0043cad841eb1si1085129pgi.827.2022.11.10.19.28.35; Thu, 10 Nov 2022 19:28:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=cfwFuhV+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233097AbiKKDZx (ORCPT + 99 others); Thu, 10 Nov 2022 22:25:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232231AbiKKDZh (ORCPT ); Thu, 10 Nov 2022 22:25:37 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 816DC5B59F; Thu, 10 Nov 2022 19:25:35 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AB2upqA018074; Fri, 11 Nov 2022 03:25:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=KVy2F4GdMfJKDsvGf/PKbRUwQn0Evm524WuZkRAFovw=; b=cfwFuhV+cyn8YpsLaAEhtcXKQVvnLY+kn5eiimVWAwi4/ar1KKFJQbL2guNARQ9/zcWo cJDQe7LSKjsl8Z7fmfhRSJbjk6C5I/KgGKEUhRa3lGP8kWuNbzJhnTkpJbHt4PoJ6zRH U/mP8BBs1FT6todPLg9LO1UbUlNSUDPVT0dGBHaxUWCXPgrmuurOBZgfZH577CtMBN3h y6UCm3DSf7n5lwXlD6A0sNxXnQ6tBaMZlqORqG4eAlxzG0ZOxsg2ocT2vpe4cT9oIxas 4NvqggiCwqavfAaJceU0JvX84I2fGJo+XcHHZTU09yIwLIvFaVV3HY7ntF0pr/VtU/GQ hQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ksah80f3g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Nov 2022 03:25:22 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2AB3PLlI027150 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Nov 2022 03:25:21 GMT Received: from th-lint-050.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 10 Nov 2022 19:25:21 -0800 From: Bjorn Andersson To: Georgi Djakov , Sibi Sankar CC: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , "Rob Herring" , Mike Tipton , "Johan Hovold" , , , , Subject: [PATCH v2 01/10] interconnect: qcom: osm-l3: Use platform-independent node ids Date: Thu, 10 Nov 2022 19:25:06 -0800 Message-ID: <20221111032515.3460-2-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221111032515.3460-1-quic_bjorande@quicinc.com> References: <20221111032515.3460-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: pi0_ewH2bYueWuYVSMXj7z7V6ypCc39z X-Proofpoint-GUID: pi0_ewH2bYueWuYVSMXj7z7V6ypCc39z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-10_14,2022-11-09_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 mlxscore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211110021 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749168767829979223?= X-GMAIL-MSGID: =?utf-8?q?1749168767829979223?= The identifiers used for nodes needs to be unique in the running system, but defining them per platform results in a lot of duplicated definitions and prevents us from using generic compatibles. As these identifiers are not exposed outside the kernel, change to use driver-local numbers, picked completely at random. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None drivers/interconnect/qcom/osm-l3.c | 87 +++++++++++------------------- 1 file changed, 30 insertions(+), 57 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index ddbdf0943f94..d23769844419 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -74,6 +74,11 @@ struct qcom_osm_l3_desc { unsigned int reg_perf_state; }; +enum { + OSM_L3_MASTER_NODE = 10000, + OSM_L3_SLAVE_NODE, +}; + #define DEFINE_QNODE(_name, _id, _buswidth, ...) \ static const struct qcom_osm_l3_node _name = { \ .name = #_name, \ @@ -83,97 +88,65 @@ struct qcom_osm_l3_desc { .links = { __VA_ARGS__ }, \ } -DEFINE_QNODE(sdm845_osm_apps_l3, SDM845_MASTER_OSM_L3_APPS, 16, SDM845_SLAVE_OSM_L3); -DEFINE_QNODE(sdm845_osm_l3, SDM845_SLAVE_OSM_L3, 16); +DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE); +DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16); + +static const struct qcom_osm_l3_node * const osm_l3_nodes[] = { + [MASTER_OSM_L3_APPS] = &osm_l3_master, + [SLAVE_OSM_L3] = &osm_l3_slave, +}; + +DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE); +DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32); -static const struct qcom_osm_l3_node * const sdm845_osm_l3_nodes[] = { - [MASTER_OSM_L3_APPS] = &sdm845_osm_apps_l3, - [SLAVE_OSM_L3] = &sdm845_osm_l3, +static const struct qcom_osm_l3_node * const epss_l3_nodes[] = { + [MASTER_EPSS_L3_APPS] = &epss_l3_master, + [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave, }; static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = { - .nodes = sdm845_osm_l3_nodes, - .num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes), + .nodes = osm_l3_nodes, + .num_nodes = ARRAY_SIZE(osm_l3_nodes), .lut_row_size = OSM_LUT_ROW_SIZE, .reg_freq_lut = OSM_REG_FREQ_LUT, .reg_perf_state = OSM_REG_PERF_STATE, }; -DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3); -DEFINE_QNODE(sc7180_osm_l3, SC7180_SLAVE_OSM_L3, 16); - -static const struct qcom_osm_l3_node * const sc7180_osm_l3_nodes[] = { - [MASTER_OSM_L3_APPS] = &sc7180_osm_apps_l3, - [SLAVE_OSM_L3] = &sc7180_osm_l3, -}; - static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = { - .nodes = sc7180_osm_l3_nodes, - .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes), + .nodes = osm_l3_nodes, + .num_nodes = ARRAY_SIZE(osm_l3_nodes), .lut_row_size = OSM_LUT_ROW_SIZE, .reg_freq_lut = OSM_REG_FREQ_LUT, .reg_perf_state = OSM_REG_PERF_STATE, }; -DEFINE_QNODE(sc7280_epss_apps_l3, SC7280_MASTER_EPSS_L3_APPS, 32, SC7280_SLAVE_EPSS_L3); -DEFINE_QNODE(sc7280_epss_l3, SC7280_SLAVE_EPSS_L3, 32); - -static const struct qcom_osm_l3_node * const sc7280_epss_l3_nodes[] = { - [MASTER_EPSS_L3_APPS] = &sc7280_epss_apps_l3, - [SLAVE_EPSS_L3_SHARED] = &sc7280_epss_l3, -}; - static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = { - .nodes = sc7280_epss_l3_nodes, - .num_nodes = ARRAY_SIZE(sc7280_epss_l3_nodes), + .nodes = epss_l3_nodes, + .num_nodes = ARRAY_SIZE(epss_l3_nodes), .lut_row_size = EPSS_LUT_ROW_SIZE, .reg_freq_lut = EPSS_REG_FREQ_LUT, .reg_perf_state = EPSS_REG_PERF_STATE, }; -DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3); -DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32); - -static const struct qcom_osm_l3_node * const sc8180x_osm_l3_nodes[] = { - [MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3, - [SLAVE_OSM_L3] = &sc8180x_osm_l3, -}; - static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = { - .nodes = sc8180x_osm_l3_nodes, - .num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes), + .nodes = osm_l3_nodes, + .num_nodes = ARRAY_SIZE(osm_l3_nodes), .lut_row_size = OSM_LUT_ROW_SIZE, .reg_freq_lut = OSM_REG_FREQ_LUT, .reg_perf_state = OSM_REG_PERF_STATE, }; -DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3); -DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32); - -static const struct qcom_osm_l3_node * const sm8150_osm_l3_nodes[] = { - [MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3, - [SLAVE_OSM_L3] = &sm8150_osm_l3, -}; - static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = { - .nodes = sm8150_osm_l3_nodes, - .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes), + .nodes = osm_l3_nodes, + .num_nodes = ARRAY_SIZE(osm_l3_nodes), .lut_row_size = OSM_LUT_ROW_SIZE, .reg_freq_lut = OSM_REG_FREQ_LUT, .reg_perf_state = OSM_REG_PERF_STATE, }; -DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3); -DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32); - -static const struct qcom_osm_l3_node * const sm8250_epss_l3_nodes[] = { - [MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3, - [SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3, -}; - static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = { - .nodes = sm8250_epss_l3_nodes, - .num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes), + .nodes = epss_l3_nodes, + .num_nodes = ARRAY_SIZE(epss_l3_nodes), .lut_row_size = EPSS_LUT_ROW_SIZE, .reg_freq_lut = EPSS_REG_FREQ_LUT, .reg_perf_state = EPSS_REG_PERF_STATE, From patchwork Fri Nov 11 03:25:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18421 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516522wru; Thu, 10 Nov 2022 19:29:54 -0800 (PST) X-Google-Smtp-Source: AMsMyM438sUHwN/mNGnUsIIBI5J78tn5zagaZp8wpMgbWwtPzrO+nj7rf+Qtp5I4DodTk/zgeHu3 X-Received: by 2002:a63:fd12:0:b0:46f:1e8f:1630 with SMTP id d18-20020a63fd12000000b0046f1e8f1630mr4287082pgh.565.1668137394295; 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Remove the duplicated definitions. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None drivers/interconnect/qcom/osm-l3.c | 48 +++++------------------------- 1 file changed, 8 insertions(+), 40 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index d23769844419..7d6844253241 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -104,7 +104,7 @@ static const struct qcom_osm_l3_node * const epss_l3_nodes[] = { [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave, }; -static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = { +static const struct qcom_osm_l3_desc osm_l3 = { .nodes = osm_l3_nodes, .num_nodes = ARRAY_SIZE(osm_l3_nodes), .lut_row_size = OSM_LUT_ROW_SIZE, @@ -112,39 +112,7 @@ static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = { .reg_perf_state = OSM_REG_PERF_STATE, }; -static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = { - .nodes = osm_l3_nodes, - .num_nodes = ARRAY_SIZE(osm_l3_nodes), - .lut_row_size = OSM_LUT_ROW_SIZE, - .reg_freq_lut = OSM_REG_FREQ_LUT, - .reg_perf_state = OSM_REG_PERF_STATE, -}; - -static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = { - .nodes = epss_l3_nodes, - .num_nodes = ARRAY_SIZE(epss_l3_nodes), - .lut_row_size = EPSS_LUT_ROW_SIZE, - .reg_freq_lut = EPSS_REG_FREQ_LUT, - .reg_perf_state = EPSS_REG_PERF_STATE, -}; - -static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = { - .nodes = osm_l3_nodes, - .num_nodes = ARRAY_SIZE(osm_l3_nodes), - .lut_row_size = OSM_LUT_ROW_SIZE, - .reg_freq_lut = OSM_REG_FREQ_LUT, - .reg_perf_state = OSM_REG_PERF_STATE, -}; - -static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = { - .nodes = osm_l3_nodes, - .num_nodes = ARRAY_SIZE(osm_l3_nodes), - .lut_row_size = OSM_LUT_ROW_SIZE, - .reg_freq_lut = OSM_REG_FREQ_LUT, - .reg_perf_state = OSM_REG_PERF_STATE, -}; - -static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = { +static const struct qcom_osm_l3_desc epss_l3 = { .nodes = epss_l3_nodes, .num_nodes = ARRAY_SIZE(epss_l3_nodes), .lut_row_size = EPSS_LUT_ROW_SIZE, @@ -317,12 +285,12 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) } static const struct of_device_id osm_l3_of_match[] = { - { .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 }, - { .compatible = "qcom,sc7280-epss-l3", .data = &sc7280_icc_epss_l3 }, - { .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 }, - { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 }, - { .compatible = "qcom,sc8180x-osm-l3", .data = &sc8180x_icc_osm_l3 }, - { .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 }, + { .compatible = "qcom,sc7180-osm-l3", .data = &osm_l3 }, + { .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3 }, + { .compatible = "qcom,sdm845-osm-l3", .data = &osm_l3 }, + { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, + { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, + { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3 }, { } }; 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In this configuration, the "shared" vote is done using the REG_L3_VOTE register instead of PERF_STATE. Rename epss_l3 to clarify that it's affecting the PERF_STATE register and add a new L3_VOTE description. Given platform lineage it's assumed that the L3_VOTE-based case will be the predominant one, so use this for a new generic qcom,epss-l3 compatible. While adding the EPSS generic, also add qcom,osm-l3. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None drivers/interconnect/qcom/osm-l3.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 7d6844253241..469be732a00b 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -34,6 +34,7 @@ /* EPSS Register offsets */ #define EPSS_LUT_ROW_SIZE 4 +#define EPSS_REG_L3_VOTE 0x90 #define EPSS_REG_FREQ_LUT 0x100 #define EPSS_REG_PERF_STATE 0x320 @@ -112,7 +113,7 @@ static const struct qcom_osm_l3_desc osm_l3 = { .reg_perf_state = OSM_REG_PERF_STATE, }; -static const struct qcom_osm_l3_desc epss_l3 = { +static const struct qcom_osm_l3_desc epss_l3_perf_state = { .nodes = epss_l3_nodes, .num_nodes = ARRAY_SIZE(epss_l3_nodes), .lut_row_size = EPSS_LUT_ROW_SIZE, @@ -120,6 +121,14 @@ static const struct qcom_osm_l3_desc epss_l3 = { .reg_perf_state = EPSS_REG_PERF_STATE, }; +static const struct qcom_osm_l3_desc epss_l3_l3_vote = { + .nodes = epss_l3_nodes, + .num_nodes = ARRAY_SIZE(epss_l3_nodes), + .lut_row_size = EPSS_LUT_ROW_SIZE, + .reg_freq_lut = EPSS_REG_FREQ_LUT, + .reg_perf_state = EPSS_REG_L3_VOTE, +}; + static int qcom_osm_l3_set(struct icc_node *src, struct icc_node *dst) { struct qcom_osm_l3_icc_provider *qp; @@ -285,12 +294,14 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) } static const struct of_device_id osm_l3_of_match[] = { + { .compatible = "qcom,epss-l3", .data = &epss_l3_l3_vote }, + { .compatible = "qcom,osm-l3", .data = &osm_l3 }, { .compatible = "qcom,sc7180-osm-l3", .data = &osm_l3 }, - { .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3 }, + { .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3_perf_state }, { .compatible = "qcom,sdm845-osm-l3", .data = &osm_l3 }, { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, - { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3 }, + { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, { } }; MODULE_DEVICE_TABLE(of, osm_l3_of_match); From patchwork Fri Nov 11 03:25:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516136wru; Thu, 10 Nov 2022 19:28:43 -0800 (PST) X-Google-Smtp-Source: AA0mqf6GiQMMyYl0YUbcUgdik78ogpv4AMReEP9Cz5uwrJgNr8jp5Kynqu1IGOdfDWNwIudObORr X-Received: by 2002:a17:902:ced0:b0:188:5d24:87e with SMTP id d16-20020a170902ced000b001885d24087emr376744plg.87.1668137323255; Thu, 10 Nov 2022 19:28:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137323; cv=none; d=google.com; s=arc-20160816; b=NdeFiVLC+bjy+CVPk83e12T3SXn8CeogXlGOPCHtmyC395S2yOb2G7fMgd9B2iZHfQ GJmBa1/GhvjtnvNgY9sOhF9njUO6AeFocZLqnAHKlPqLMaryHfv0krKLYZ1LuYqizwhi 5k5jegCvpR1q8PsZSVygZ4+f7DjD4EQebFSA0LSLnYr/K49iDfOS4x0Y6u6yGpCWeZsA I1SUIe4hAvcF462NT38K8CLoIdJC7IRWTcUyx1z1ZiV5eidIeWZWK29fGtlQYJDNPJmZ sfc6DteI0YCuky3g6NHOxPybZ7z4yqLDNzoQFBcEDPlDrp/XfZvGDXaAVyx5snhoHZEO LrFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=RgAfutV/X1+EaLp624oAtxBTKGYUwrZyuYo4Na5GOeg=; b=lOBHDk3Ha4e0DhVS6sIyo5+TmgNwAo1/dOlM/ZKN6/vmRrwmfpsgsf6q6+3XijJusS cga+wBBmHUy3g7ichKFfBvUYjIAUGCiQJ+9j5hDbsLOyuIYfjT3nBJ+iB1gHa8u9GuTf staU3eU0UaXaiDnFPPuVi2qhitoxsskGwDx0MPqx0H7U6/WE07td28z+4rtHB0ZNFZLG 6h3g54+FH2sy0JFDyDtI15w27kb+y0rIhRe09jZhC/lJYvxO0mBJooBcW6Czxx9M1asG dz3HI0HiunG+XKk+/Jg68iE8av06+x8kfsmhhXFPvB40YUshuDa3AwNb0zas+HsjwDbB Fexg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=I5z53LhB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Further more, the average kBps value will always be 0. Simplify the logic by directly looking at the destination node's peak bandwidth request. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None drivers/interconnect/qcom/osm-l3.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 469be732a00b..5fa171087425 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -134,22 +134,14 @@ static int qcom_osm_l3_set(struct icc_node *src, struct icc_node *dst) struct qcom_osm_l3_icc_provider *qp; struct icc_provider *provider; const struct qcom_osm_l3_node *qn; - struct icc_node *n; unsigned int index; - u32 agg_peak = 0; - u32 agg_avg = 0; u64 rate; qn = src->data; provider = src->provider; qp = to_osm_l3_provider(provider); - list_for_each_entry(n, &provider->nodes, node_list) - provider->aggregate(n, 0, n->avg_bw, n->peak_bw, - &agg_avg, &agg_peak); - - rate = max(agg_avg, agg_peak); - rate = icc_units_to_bps(rate); + rate = icc_units_to_bps(dst->peak_bw); do_div(rate, qn->buswidth); for (index = 0; index < qp->max_state - 1; index++) { From patchwork Fri Nov 11 03:25:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18405 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516049wru; Thu, 10 Nov 2022 19:28:24 -0800 (PST) X-Google-Smtp-Source: AA0mqf6m0Y/gRQDXv8YEn3wcguslqOcBf/5sQyxK1DlcGvjtS0p+GfTv+jWBvse44sqXobz/SyHv X-Received: by 2002:a17:902:b7c5:b0:186:5eab:8631 with SMTP id v5-20020a170902b7c500b001865eab8631mr314255plz.134.1668137303837; Thu, 10 Nov 2022 19:28:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137303; cv=none; d=google.com; s=arc-20160816; b=ioq896yBpSjfanOcLD0pj4xYweVJ+FlK4aix3ZbJGFUCI7GoqVwr1dsHTEcUrae2Vi fkM55qYiS5nm9hVdgPK3Y450jeQV7phg1oPXGJGS2ATUsMGOm5AoECj9nA2fDDs5Kdeb TKBXTqUnrvmJsAjYQ4M2XsE71XkNXuHOeTNzs17l2faGY6wYZMr1vg94OZrVMvMq5gCK cJEl63zmqml+5MzW9KaNA/EI6dr7W7vodFiwqZD+u0bYWzoyv4BXlLz7UrlrNqrYXk7p M5F/f3iU3R5BIzRqpTrI201JXFtDMk095vtzqKkQJjz/sVkk5IyPheyIg/HDh0/bqYJV wRaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=MexMrkaWeR7RAiApT1mAXj1kV44/EYUumrwGtULmquA=; b=PaUyUcP047wCnjpyDP3c5Jyb9PbEWO/fau5nq1cgsybfvc63qOlnbd82RRAYFjnohl Nim+xyp930jhSp87URwWeh3kw2QaC30Lrn3fs+Xyq8rz2qdtN7eY76GWvSVjGx2xzvWD 05SJOLhl35H9L4BfvPdFB9VWMz6+4YGl6CzovTjqROe3wGfOS8rFVOnG6x18SawHBJSf MBzwH1lEWz7SW0XykFUjgIMV7mcrN1QGVAZ4955quMolpy0YAn/m7K008TEOYq6oouge jbrMGDlHu3RnyKUpyBK6P77XfpBfJDgSvcRQGVul6QCfcIBmFaRl2EuKGn1pXxx2P0Mg M9Cw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=LSvAXdCN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Krzysztof Kozlowski Reviewed-by: Sibi Sankar --- Changes since v1: - Fixed oneOf to be valid schema - Fixed example to follow schema .../bindings/interconnect/qcom,osm-l3.yaml | 24 ++++++++++++------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index bf538c0c5a81..aadae4424ba9 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -16,13 +16,21 @@ description: properties: compatible: - enum: - - qcom,sc7180-osm-l3 - - qcom,sc7280-epss-l3 - - qcom,sc8180x-osm-l3 - - qcom,sdm845-osm-l3 - - qcom,sm8150-osm-l3 - - qcom,sm8250-epss-l3 + oneOf: + - items: + - enum: + - qcom,sc7180-osm-l3 + - qcom,sc8180x-osm-l3 + - qcom,sdm845-osm-l3 + - qcom,sm8150-osm-l3 + - const: qcom,osm-l3 + - items: + - enum: + - qcom,sc7280-epss-l3 + - qcom,sc8280xp-epss-l3 + - qcom,sm8250-epss-l3 + - qcom,sm8350-epss-l3 + - const: qcom,epss-l3 reg: maxItems: 1 @@ -56,7 +64,7 @@ examples: #define RPMH_CXO_CLK 0 osm_l3: interconnect@17d41000 { - compatible = "qcom,sdm845-osm-l3"; + compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3"; reg = <0x17d41000 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; From patchwork Fri Nov 11 03:25:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516243wru; Thu, 10 Nov 2022 19:29:03 -0800 (PST) X-Google-Smtp-Source: AMsMyM6l/l7b1t9KAV24qy0MnFDYiBMqTABXK0TtRd/P+0OEYCEV3sOO7oa1kU4TE/H7vHKru00V X-Received: by 2002:a17:90b:238b:b0:212:cf2e:2b0b with SMTP id mr11-20020a17090b238b00b00212cf2e2b0bmr3320134pjb.169.1668137342766; Thu, 10 Nov 2022 19:29:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137342; cv=none; d=google.com; s=arc-20160816; b=COBvRzUZdBCcFr0a+iyU6iCiJcSG7hqdu5zgZCiLmHfK5bjdXgPLwExYcvzIQZClOk G21stkREclLJPR6YIaFsr2uU0LF8es7hVz+7GrVFA1G0NN/E8Lu9uK08wOQDXI2sa+c4 G6c/SUHMb6tXWShHqkqwacCdhE7vaNq8wh0IYb8PFqUdyk54x12C3k9RNL3BcgbUjtTs LD8kch717VEZF+S8WARW+aSDiAciVhjmiAn3G7TaZZFfDY/0G0ZEMsXWNFmZCkPUp8bL xF3OhY5i9V2F6f1qkc/rSkZ9nt0DneGqP+E81jEujt0MX9HFVK4N/GSmD6OX0k0/Wbff si2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=z5frpm/ISY1/dDKvfQ5rmMpPUkbAUIx93wq2BLbBdl8=; b=b2g+ipW7QfZHx+E1JFSY57DDGgaHBbIvfLn2TKIQ2BGecRJuAT5PiqMB3hbhbd2oHH XcAEAsrcD5gChmAqECAL/W9i7hRJUhzLtMox96voDng0stJp2hWmowByiKdCFGPaB2q8 azS5i89bZ+NRsbCSY/jn+xT7J1bp1ovMp539N5YblPg1oSsrZOizO9i9F4Qw2C2DuS1O qr7lDfl+Tpj8iyQIcsNdkzp+QiyElIEFHROwJGpgyNNMxM7YBpFmby91oqZHBW7y9DZ8 fz630VLABTYovxYKRH2PPzmN2CWigMHjGsnJ88Fr2XSaldJxnDTARnprPI4k7bxBsE7x ZBvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="Cfs/a7mb"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ea886cf08b4d..f71cf21a8dd8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3558,7 +3558,7 @@ }; osm_l3: interconnect@18321000 { - compatible = "qcom,sc7180-osm-l3"; + compatible = "qcom,sc7180-osm-l3", "qcom,osm-l3"; reg = <0 0x18321000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 07334e19be99..ad9c61768016 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -5359,7 +5359,7 @@ }; epss_l3: interconnect@18590000 { - compatible = "qcom,sc7280-epss-l3"; + compatible = "qcom,sc7280-epss-l3", "qcom,epss-l3"; reg = <0 0x18590000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1a257f672887..9c7d484ce72f 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -5302,7 +5302,7 @@ }; osm_l3: interconnect@17d41000 { - compatible = "qcom,sdm845-osm-l3"; + compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3"; reg = <0 0x17d41000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 18bf51ce8b13..8409fb5ea532 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3958,7 +3958,7 @@ }; osm_l3: interconnect@18321000 { - compatible = "qcom,sm8150-osm-l3"; + compatible = "qcom,sm8150-osm-l3", "qcom,osm-l3"; reg = <0 0x18321000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 27b507f3632b..351c232b8dc6 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4884,7 +4884,7 @@ }; epss_l3: interconnect@18590000 { - compatible = "qcom,sm8250-epss-l3"; + compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; reg = <0 0x18590000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; From patchwork Fri Nov 11 03:25:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516259wru; Thu, 10 Nov 2022 19:29:05 -0800 (PST) X-Google-Smtp-Source: AA0mqf5T+9QWzaLP0NBkOZukOR1W9zvPlIueTFfyDnGqEhQFYJGcFKoVX6OHUaCRY3NbMrjl92pT X-Received: by 2002:a05:6a00:2790:b0:56c:309:b900 with SMTP id bd16-20020a056a00279000b0056c0309b900mr721849pfb.21.1668137345332; Thu, 10 Nov 2022 19:29:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137345; cv=none; d=google.com; s=arc-20160816; b=DJXTw+Ll+GwTNGy86AuuLDIJgDjY6Mbj2FEMB2R2I/sxbNuP0HT64HaJL1TDKyr1Wa zYhkXsH/girg0hy+3drx7I5KqowvlX5id+WuE7UIccfn868JyjJ0yEOh9LOE/9knXKPQ I4E5nxOkYBh+JVkeQmlvwO7dIdmsnNm8ThPN6faF730tYeMHgYkfhgvbnoxa7YVgTnE0 +n/FeX0XRT3a/piKbnhWt1PWcCpT1H54z3/iIHAXTDzz/eBs90cce2A2FzLslXmz998u 5e9uqkzav6cs9gew54MsYQeUinrcUaG28r6tqbKGIeaeXValVwOgpB+xI2e5tsCuaq9q AmJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=A9TISWgAaHzm7eC2jodYF2MDiypLVtuuP7oUlhDRfcU=; b=aSl2hRPkv8bM31zCwgHB7mK81rIOy+IT6d4BMhGUZjaAQcU3EZwZCJ6hFemnPOlw0w SrsKO8A8DtUwC7wkG1X9JUXRqZCLInLhsxJKNkrhZnKkCSAySHBNAia7amcmx39Nhog6 xf9pZ3UKKb7i4zkgXAq4T8A/w8ZJYEhhfPFFzvKjEXT/s5Fte8NdbuuwOXFRkTndle8k gkXOzlrfs6jya8Om1LvVn32DLUPDm016EUgucA+sXzHDAYhRWYWEFUQVxjkZPvT9cK/6 MGBv87Y7+8NOamYHRAsDU7YX0e/PJ1Hn6V8BlOgms/eCoAojqztyzTd9qZdDl9gwmzgM H9qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ZMnzpi8Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 6bc12e507d21..0e80cdcf6bcf 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1782,6 +1782,16 @@ }; }; + epss_l3: interconnect@18590000 { + compatible = "qcom,sc8280xp-epss-l3", "qcom,epss-l3"; + reg = <0 0x18590000 0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18591000 { compatible = "qcom,sc8280xp-cpufreq-epss", "qcom,cpufreq-epss"; reg = <0 0x18591000 0 0x1000>, From patchwork Fri Nov 11 03:25:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18412 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516270wru; Thu, 10 Nov 2022 19:29:06 -0800 (PST) X-Google-Smtp-Source: AMsMyM5R8HE0U2K8pIgFScfNcWmbQpEzSQURHrPwc84IMPF6BhAQ51ytDpkSGQY2/fOC7RZl5Fn3 X-Received: by 2002:a63:e553:0:b0:41e:2cc8:447e with SMTP id z19-20020a63e553000000b0041e2cc8447emr4533589pgj.299.1668137346330; Thu, 10 Nov 2022 19:29:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137346; cv=none; d=google.com; s=arc-20160816; b=VYZjZuAUw3HI5u+5QQbb7nJd5dsk79fiIHR67irATdMWucVm9/BvskzNwLfxdU1fLK yQeydpS1yhaUUusUrheD2cAdVS9AJPIcQ7ssd1wVSo/QMXrI2ykyiJ/dafwRNs2DmpEJ V27/uwSLhZjRBd9A11QjNoUOvzqQxbUm4TW4E9/6hbls5yhhMjqAGNHDubFy+ZHm9urQ xF34qrrOR/k4XnJaQJuCCN1+CCxx6W2ckY161JOuffKVgHsmdXutL5Diaw1cLDYnef+K tlOe0SjkMsBsqkYQZhSWrwwsvuXy58l0/q+JSfNDqRppb2YzlAMUSJAaKTBYLyvW1Y/R D/Vw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=xnPkl0UT3Sv6l3LkuZ1/D4ybnzKZVruHKUKBxCpS5ME=; b=gNI8Ck7vvGxi6jkirGdW7wrMtrxnqKtYTYgs6f45Q6yf48WoUzqbXbBiqUZFPv2iqO 4Zb8feZBeFFt8seVk51ICSUY+aS2JV+PgCw4L0NRCve1EboyTAkDUK7wULdI+BBudQWb t/0LxtboB/fu5gvdoUjtvU5BXjqzp6RSZM2myXm4xuCwcJK+15Js+2rleCSzoQVHwhwE 2F7eIjXjdX+23kkzJ2ezVf1AEOy9MuATunaoCQJtj22bLYjxOLPv5BB05Ii/kVL9Lg61 +SW2mjzCcDD/01znMc63M08DmCaOIWYb59LIC4aykhdq92HMrTKYOE0KaHKD4sUGL04C GCgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="RzNhS5/B"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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The values are based on the tables reported by the hardware, distributed such that each value is the largest value, lower than the cluster frequency. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - None arch/arm64/boot/dts/qcom/sa8540p.dtsi | 39 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 51 ++++++++++++++++++++++++++ 2 files changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi index 8ea2886fbab2..fd36800a7578 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi @@ -14,59 +14,81 @@ compatible = "operating-points-v2"; opp-shared; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <(300000 * 32)>; + }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; + opp-peak-kBps = <(384000 * 32)>; }; opp-499200000 { opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(480000 * 32)>; }; opp-595200000 { opp-hz = /bits/ 64 <595200000>; + opp-peak-kBps = <(576000 * 32)>; }; opp-710400000 { opp-hz = /bits/ 64 <710400000>; + opp-peak-kBps = <(672000 * 32)>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; + opp-peak-kBps = <(768000 * 32)>; }; opp-902400000 { opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(864000 * 32)>; }; opp-1017600000 { opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(960000 * 32)>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; + opp-peak-kBps = <(1075200 * 32)>; }; opp-1209600000 { opp-hz = /bits/ 64 <1209600000>; + opp-peak-kBps = <(1171200 * 32)>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <(1286400 * 32)>; }; opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; + opp-peak-kBps = <(1382400 * 32)>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(1497600 * 32)>; }; opp-1670400000 { opp-hz = /bits/ 64 <1670400000>; + opp-peak-kBps = <(1593600 * 32)>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-1881600000 { opp-hz = /bits/ 64 <1881600000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2016000000 { opp-hz = /bits/ 64 <2016000000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2131200000 { opp-hz = /bits/ 64 <2131200000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2246400000 { opp-hz = /bits/ 64 <2246400000>; + opp-peak-kBps = <(1708800 * 32)>; }; }; @@ -76,54 +98,71 @@ opp-825600000 { opp-hz = /bits/ 64 <825600000>; + opp-peak-kBps = <(300000 * 32)>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; + opp-peak-kBps = <(864000 * 32)>; }; opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; + opp-peak-kBps = <(960000 * 32)>; }; opp-1171200000 { opp-hz = /bits/ 64 <1171200000>; + opp-peak-kBps = <(1171200 * 32)>; }; opp-1286400000 { opp-hz = /bits/ 64 <1286400000>; + opp-peak-kBps = <(1286400 * 32)>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(1382400 * 32)>; }; opp-1516800000 { opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <(1497600 * 32)>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; + opp-peak-kBps = <(1593600 * 32)>; }; opp-1747200000 { opp-hz = /bits/ 64 <1747200000>; + opp-peak-kBps = <(1593600 * 32)>; }; opp-1862400000 { opp-hz = /bits/ 64 <1862400000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-1977600000 { opp-hz = /bits/ 64 <1977600000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2169600000 { opp-hz = /bits/ 64 <2169600000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2284800000 { opp-hz = /bits/ 64 <2284800000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2380800000 { opp-hz = /bits/ 64 <2380800000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2496000000 { opp-hz = /bits/ 64 <2496000000>; + opp-peak-kBps = <(1708800 * 32)>; }; opp-2592000000 { opp-hz = /bits/ 64 <2592000000>; + opp-peak-kBps = <(1708800 * 32)>; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 0e80cdcf6bcf..2ac8f5204905 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -38,66 +39,87 @@ opp-300000000 { opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <(300000 * 32)>; }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; + opp-peak-kBps = <(384000 * 32)>; }; opp-499200000 { opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(480000 * 32)>; }; opp-595200000 { opp-hz = /bits/ 64 <595200000>; + opp-peak-kBps = <(576000 * 32)>; }; opp-691200000 { opp-hz = /bits/ 64 <691200000>; + opp-peak-kBps = <(672000 * 32)>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; + opp-peak-kBps = <(768000 * 32)>; }; opp-902400000 { opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(864000 * 32)>; }; opp-1017600000 { opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(960000 * 32)>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; + opp-peak-kBps = <(1075200 * 32)>; }; opp-1209600000 { opp-hz = /bits/ 64 <1209600000>; + opp-peak-kBps = <(1171200 * 32)>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <(1267200 * 32)>; }; opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; + opp-peak-kBps = <(1363200 * 32)>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(1536000 * 32)>; }; opp-1670400000 { opp-hz = /bits/ 64 <1670400000>; + opp-peak-kBps = <(1612800 * 32)>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-1881600000 { opp-hz = /bits/ 64 <1881600000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-1996800000 { opp-hz = /bits/ 64 <1996800000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2112000000 { opp-hz = /bits/ 64 <2112000000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2227200000 { opp-hz = /bits/ 64 <2227200000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2342400000 { opp-hz = /bits/ 64 <2342400000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2438400000 { opp-hz = /bits/ 64 <2438400000>; + opp-peak-kBps = <(1689600 * 32)>; }; }; @@ -107,66 +129,87 @@ opp-825600000 { opp-hz = /bits/ 64 <825600000>; + opp-peak-kBps = <(768000 * 32)>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; + opp-peak-kBps = <(864000 * 32)>; }; opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; + opp-peak-kBps = <(960000 * 32)>; }; opp-1171200000 { opp-hz = /bits/ 64 <1171200000>; + opp-peak-kBps = <(1171200 * 32)>; }; opp-1286400000 { opp-hz = /bits/ 64 <1286400000>; + opp-peak-kBps = <(1267200 * 32)>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(1363200 * 32)>; }; opp-1516800000 { opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <(1459200 * 32)>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; + opp-peak-kBps = <(1612800 * 32)>; }; opp-1747200000 { opp-hz = /bits/ 64 <1747200000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-1862400000 { opp-hz = /bits/ 64 <1862400000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-1977600000 { opp-hz = /bits/ 64 <1977600000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2169600000 { opp-hz = /bits/ 64 <2169600000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2284800000 { opp-hz = /bits/ 64 <2284800000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2400000000 { opp-hz = /bits/ 64 <2400000000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2496000000 { opp-hz = /bits/ 64 <2496000000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2592000000 { opp-hz = /bits/ 64 <2592000000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2688000000 { opp-hz = /bits/ 64 <2688000000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2803200000 { opp-hz = /bits/ 64 <2803200000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2899200000 { opp-hz = /bits/ 64 <2899200000>; + opp-peak-kBps = <(1689600 * 32)>; }; opp-2995200000 { opp-hz = /bits/ 64 <2995200000>; + opp-peak-kBps = <(1689600 * 32)>; }; }; @@ -185,6 +228,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; @@ -206,6 +250,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; @@ -224,6 +269,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; @@ -242,6 +288,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; @@ -260,6 +307,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu4_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; @@ -278,6 +326,7 @@ power-domain-names = "psci"; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu4_opp_table>; + interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>; 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Extend the existing qcom,msm8998-bwmon and qcom,sc7280-llcc-bwmon to describe these. Signed-off-by: Bjorn Andersson Tested-by: Steev Klimaszewski Reviewed-by: Krzysztof Kozlowski Reviewed-by: Sibi Sankar --- Changes since v1: - Added "cpu" to compatible .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index be29e0b80995..0c720dbde36e 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -25,9 +25,14 @@ properties: - items: - enum: - qcom,sc7280-cpu-bwmon + - qcom,sc8280xp-cpu-bwmon - qcom,sdm845-bwmon - const: qcom,msm8998-bwmon - const: qcom,msm8998-bwmon # BWMON v4 + - items: + - enum: + - qcom,sc8280xp-llcc-bwmon + - const: qcom,sc7280-llcc-bwmon - const: qcom,sc7280-llcc-bwmon # BWMON v5 - const: qcom,sdm845-llcc-bwmon # BWMON v5 From patchwork Fri Nov 11 03:25:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 18411 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp516268wru; Thu, 10 Nov 2022 19:29:06 -0800 (PST) X-Google-Smtp-Source: AMsMyM5+9j2K5iYX/aK4RFSbEk16023Z6NPEanfAozFxzodoUdbzB/L6qDIV3ayU1wZiBiNlLIGq X-Received: by 2002:a17:90b:4fc7:b0:20a:8f71:4fc with SMTP id qa7-20020a17090b4fc700b0020a8f7104fcmr3306552pjb.59.1668137346263; Thu, 10 Nov 2022 19:29:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668137346; cv=none; d=google.com; s=arc-20160816; b=PwcOFNePA0m5bagQlSIafb7JgEVAEEP9Aa+DyazArMjtU7LdO0luekyd0a8DXBWTf6 NLuTi3cNcwdWlHLixOiyKJEPcSa7NgJpqUnzpTU95WEoDZgBIUxrfqAeUcCSHN2n7433 r7Zo0/l8h5kG6QWNukN7/HGhAF7rHeoxY29dTOe27QY7Ekb1L7+S806uBUb0XQK9w6ia cexvDCA9SlSFEpx7XzVL+PV1kZ18k+uQySKztUfdrfMNxJ2xkbs5+AiXyzoz2ls9LKou 5VicM56UmyeNZubRW6T0Y1M/H1C6TF36UZD1lL/ax7eN+OuTpuD6m5GpTUMDqzOw0etk OaXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=lD86X0OQ5dCB6O6o1/+iPAtT36dAVPEgdmKBPA9o/3w=; b=L75RFRdZbKGHpTTZD+LSMqgnZaOxVfjgmgIAfCFKnAGRgtLnXJGrCNebrAWGMmTtIm ZcuiB+TABD79PVJIRgkfXAM7y/TwVcOhWD/VwaYgqccoaumorabZo1RZxTwzF5SsnxWE 6WlgIfs4arV4zC+Utb/RH51A99GuGoaLWsEfdwc9AlXWpdkeGGjOwd4XxSOkFVTBXdxg 0KvauqP2AiO+CtiQYapIHRyVDpwu1sgjxugc0xKGYjCdKRBEsVdgrB8Hgbj8o4VOpDt8 Op5fCLa2cjDoU1FzLSEO/T1Mj0uCiCi6iw6WTHLa1VVHytAb0td0jVT9PGLATcijNggX d2yg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Dpvs6HDN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski Tested-by: Steev Klimaszewski Reviewed-by: Sibi Sankar --- Changes since v1: - Added "cpu" to compatible for the CPU-subsystem bwmon instance arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 91 ++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 2ac8f5204905..62e9dd8a2f07 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1287,6 +1287,97 @@ }; }; + pmu@9091000 { + compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; + reg = <0 0x9091000 0 0x1000>; + + interrupts = ; + + interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI1 3>; + + operating-points-v2 = <&llcc_bwmon_opp_table>; + + llcc_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <762000>; + }; + opp-1 { + opp-peak-kBps = <1720000>; + }; + opp-2 { + opp-peak-kBps = <2086000>; + }; + opp-3 { + opp-peak-kBps = <2597000>; + }; + opp-4 { + opp-peak-kBps = <2929000>; + }; + opp-5 { + opp-peak-kBps = <3879000>; + }; + opp-6 { + opp-peak-kBps = <5161000>; + }; + opp-7 { + opp-peak-kBps = <5931000>; + }; + opp-8 { + opp-peak-kBps = <6515000>; + }; + opp-9 { + opp-peak-kBps = <7980000>; + }; + opp-10 { + opp-peak-kBps = <8136000>; + }; + opp-11 { + opp-peak-kBps = <10437000>; + }; + opp-12 { + opp-peak-kBps = <12191000>; + }; + }; + }; + + pmu@90b6400 { + compatible = "qcom,sc8280xp-cpu-bwmon", "qcom,msm8998-bwmon"; + reg = <0 0x090b6400 0 0x600>; + + interrupts = ; + + interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>; + operating-points-v2 = <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <2288000>; + }; + opp-1 { + opp-peak-kBps = <4577000>; + }; + opp-2 { + opp-peak-kBps = <7110000>; + }; + opp-3 { + opp-peak-kBps = <9155000>; + }; + opp-4 { + opp-peak-kBps = <12298000>; + }; + opp-5 { + opp-peak-kBps = <14236000>; + }; + opp-6 { + opp-peak-kBps = <15258001>; + }; + }; + }; + system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>;