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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1702070078; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m03mTesIlMrxS5Qv8tSD3rwTD8P4+Fu9Srapvhn8Bpg=; b=Fd/NJW5lRzwu+C3899dmvNNsoXFA9PNg+yS9iMopClwePhfXmUR2wNe5m17m91rba9+ZSI IATAldQif2zs/VCA== From: "tip-bot2 for Konrad Dybcio" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] irqchip/qcom-mpm: Support passing a slice of SRAM as reg space Cc: Konrad Dybcio , Thomas Gleixner , "Bryan O'Donoghue" , Shawn Guo , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org> References: <20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org> MIME-Version: 1.0 Message-ID: <170207007705.398.3441673738710273946.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 08 Dec 2023 13:14:47 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784749849933027542 X-GMAIL-MSGID: 1784749849933027542 The following commit has been merged into the irq/core branch of tip: Commit-ID: 4c601685434fd34f9fa328c861241d8433606c4c Gitweb: https://git.kernel.org/tip/4c601685434fd34f9fa328c861241d8433606c4c Author: Konrad Dybcio AuthorDate: Mon, 27 Nov 2023 16:52:13 +01:00 Committer: Thomas Gleixner CommitterDate: Fri, 08 Dec 2023 22:06:36 +01:00 irqchip/qcom-mpm: Support passing a slice of SRAM as reg space The MPM hardware is accessible from the ARM CPUs through a shared memory region (RPM MSG RAM) which is also concurrently accessed by other kinds of cores on the system like modem, ADSP etc. Modeling this relation in a (somewhat) sane manner in the device tree requires to - either present the MPM as a child of said memory region, which makes little sense, as a mapped memory carveout is not a bus. - define nodes which bleed their register spaces into one another - or passing their slice of the MSG RAM through a property Go with the third option and add a way to map a region passed through the "qcom,rpm-msg-ram" property as register space for the MPM interrupt controller. The current way of using 'reg' is preserved for backwards compatibility reasons. [ tglx: Massaged changelog ] Signed-off-by: Konrad Dybcio Signed-off-by: Thomas Gleixner Reviewed-by: Bryan O'Donoghue Acked-by: Shawn Guo Link: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org --- drivers/irqchip/irq-qcom-mpm.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c index 7124565..cda5838 100644 --- a/drivers/irqchip/irq-qcom-mpm.c +++ b/drivers/irqchip/irq-qcom-mpm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) struct device *dev = &pdev->dev; struct irq_domain *parent_domain; struct generic_pm_domain *genpd; + struct device_node *msgram_np; struct qcom_mpm_priv *priv; unsigned int pin_cnt; + struct resource res; int i, irq; int ret; @@ -374,9 +377,26 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) raw_spin_lock_init(&priv->lock); - priv->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + /* If we have a handle to an RPM message ram partition, use it. */ + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); + if (msgram_np) { + ret = of_address_to_resource(msgram_np, 0, &res); + if (ret) { + of_node_put(msgram_np); + return ret; + } + + /* Don't use devm_ioremap_resource, as we're accessing a shared region. */ + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + of_node_put(msgram_np); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } else { + /* Otherwise, fall back to simple MMIO. */ + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } for (i = 0; i < priv->reg_stride; i++) { qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0);