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[23.128.96.33]) by mx.google.com with ESMTPS id jn3-20020a170903050300b001d06e87b213si1811779plb.184.2023.12.08.09.25.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:25:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=kovDIdUM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 5C73C806B9DA; Fri, 8 Dec 2023 09:25:21 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1574273AbjLHRZL (ORCPT + 99 others); Fri, 8 Dec 2023 12:25:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232094AbjLHRZI (ORCPT ); Fri, 8 Dec 2023 12:25:08 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33C8F10E3; Fri, 8 Dec 2023 09:25:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702056314; x=1733592314; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TUcgfMy2yb3feE8SS3tnrv16X02z4XKbq/aanVseT4A=; b=kovDIdUML/Hu/CP8+QJSs8saZSchUYu8VMcrsafs61on/uyR/n64wSx7 l7fuTyOtmw6cHeCC9zO1632O/tgIQHKXu+trgM5h2kCOXvRCUeoD6T5l2 HBDygZCHxg+2IqndFlb1V/8tSCBPv5Qf7zjAga5WB3b3hozFjWGF7Smjx 0XJDEZr9ygLH6e37Q8duiW50T3o47vrAIyjqJAJuP/PcPWrYNLMDO6GJ+ QPDIXFuxy5Mxu1diHf2EmrOzNOa/sAdFZQolCfqhn4seWlHLO1TKUI9Z8 st8GkHovGwarLJzDprJ49ZMoIThLd6qXoj05ajOe1ikmr01e4Kn1xsu9T Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="379432380" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="379432380" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="772201575" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="772201575" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.249.34.218]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:07 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH RFC V2 1/4] perf/core: Add aux_pause, aux_resume, aux_start_paused Date: Fri, 8 Dec 2023 19:24:46 +0200 Message-Id: <20231208172449.35444-2-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208172449.35444-1-adrian.hunter@intel.com> References: <20231208172449.35444-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:25:21 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784735414388711198 X-GMAIL-MSGID: 1784735414388711198 Hardware traces, such as instruction traces, can produce a vast amount of trace data, so being able to reduce tracing to more specific circumstances can be useful. The ability to pause or resume tracing when another event happens, can do that. Add ability for an event to "pause" or "resume" AUX area tracing. Add aux_pause bit to perf_event_attr to indicate that, if the event happens, the associated AUX area tracing should be paused. Ditto aux_resume. Do not allow aux_pause and aux_resume to be set together. Add aux_start_paused bit to perf_event_attr to indicate to an AUX area event that it should start in a "paused" state. Add aux_paused to struct perf_event for AUX area events to keep track of the "paused" state. aux_paused is initialized to aux_start_paused. Add PERF_EF_PAUSE and PERF_EF_RESUME modes for ->stop() and ->start() callbacks. Call as needed, during __perf_event_output(). Add aux_in_pause_resume to struct perf_buffer to prevent races with the NMI handler. Pause/resume in NMI context will miss out if it coincides with another pause/resume. To use aux_pause or aux_resume, an event must be in a group with the AUX area event as the group leader. Example (requires Intel PT and tools patches also): $ perf record --kcore -e '{intel_pt/aux-start-paused/k,syscalls:sys_enter_newuname/aux-resume/,syscalls:sys_exit_newuname/aux-pause/}' uname Linux [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.041 MB perf.data ] $ perf script --call-trace uname 5712 [007] 83.855580930: name: 0x7ffd9dcebec0 uname 5712 [007] 83.855582518: psb offs: 0 uname 5712 [007] 83.855582518: cbr: 42 freq: 4205 MHz (150%) uname 5712 [007] 83.855582723: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855582723: ([kernel.kallsyms]) __x64_sys_newuname uname 5712 [007] 83.855582723: ([kernel.kallsyms]) down_read uname 5712 [007] 83.855582723: ([kernel.kallsyms]) __cond_resched uname 5712 [007] 83.855582932: ([kernel.kallsyms]) preempt_count_add uname 5712 [007] 83.855582932: ([kernel.kallsyms]) in_lock_functions uname 5712 [007] 83.855582932: ([kernel.kallsyms]) preempt_count_sub uname 5712 [007] 83.855582932: ([kernel.kallsyms]) up_read uname 5712 [007] 83.855582932: ([kernel.kallsyms]) preempt_count_add uname 5712 [007] 83.855583348: ([kernel.kallsyms]) in_lock_functions uname 5712 [007] 83.855583348: ([kernel.kallsyms]) preempt_count_sub uname 5712 [007] 83.855583348: ([kernel.kallsyms]) _copy_to_user uname 5712 [007] 83.855583557: ([kernel.kallsyms]) syscall_exit_to_user_mode uname 5712 [007] 83.855583557: ([kernel.kallsyms]) syscall_exit_work uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_syscall_exit uname 5712 [007] 83.855583557: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_trace_buf_alloc uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_swevent_get_recursion_context uname 5712 [007] 83.855583557: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855583557: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_tp_event uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_trace_buf_update uname 5712 [007] 83.855583557: ([kernel.kallsyms]) tracing_gen_ctx_irq_test uname 5712 [007] 83.855583557: ([kernel.kallsyms]) perf_swevent_event uname 5712 [007] 83.855583765: ([kernel.kallsyms]) __perf_event_account_interrupt uname 5712 [007] 83.855583765: ([kernel.kallsyms]) __this_cpu_preempt_check uname 5712 [007] 83.855583765: ([kernel.kallsyms]) perf_event_output_forward uname 5712 [007] 83.855583765: ([kernel.kallsyms]) perf_event_aux_pause uname 5712 [007] 83.855583765: ([kernel.kallsyms]) ring_buffer_get uname 5712 [007] 83.855583765: ([kernel.kallsyms]) __rcu_read_lock uname 5712 [007] 83.855583765: ([kernel.kallsyms]) __rcu_read_unlock uname 5712 [007] 83.855583765: ([kernel.kallsyms]) pt_event_stop uname 5712 [007] 83.855583765: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855583765: ([kernel.kallsyms]) debug_smp_processor_id uname 5712 [007] 83.855583973: ([kernel.kallsyms]) native_write_msr uname 5712 [007] 83.855583973: ([kernel.kallsyms]) native_write_msr uname 5712 [007] 83.855584175: 0x0 Signed-off-by: Adrian Hunter --- include/linux/perf_event.h | 15 +++++++ include/uapi/linux/perf_event.h | 11 ++++- kernel/events/core.c | 72 +++++++++++++++++++++++++++++++-- kernel/events/internal.h | 1 + 4 files changed, 95 insertions(+), 4 deletions(-) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index e85cd1c0eaf3..252c4aac3b79 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -291,6 +291,7 @@ struct perf_event_pmu_context; #define PERF_PMU_CAP_NO_EXCLUDE 0x0040 #define PERF_PMU_CAP_AUX_OUTPUT 0x0080 #define PERF_PMU_CAP_EXTENDED_HW_TYPE 0x0100 +#define PERF_PMU_CAP_AUX_PAUSE 0x0200 struct perf_output_handle; @@ -363,6 +364,8 @@ struct pmu { #define PERF_EF_START 0x01 /* start the counter when adding */ #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ +#define PERF_EF_PAUSE 0x08 /* AUX area event, pause tracing */ +#define PERF_EF_RESUME 0x10 /* AUX area event, resume tracing */ /* * Adds/Removes a counter to/from the PMU, can be done inside a @@ -402,6 +405,15 @@ struct pmu { * * ->start() with PERF_EF_RELOAD will reprogram the counter * value, must be preceded by a ->stop() with PERF_EF_UPDATE. + * + * ->stop() with PERF_EF_PAUSE will stop as simply as possible. Will not + * overlap another ->stop() with PERF_EF_PAUSE nor ->start() with + * PERF_EF_RESUME. + * + * ->start() with PERF_EF_RESUME will start as simply as possible but + * only if the counter is not otherwise stopped. Will not overlap + * another ->start() with PERF_EF_RESUME nor ->stop() with + * PERF_EF_PAUSE. */ void (*start) (struct perf_event *event, int flags); void (*stop) (struct perf_event *event, int flags); @@ -797,6 +809,9 @@ struct perf_event { /* for aux_output events */ struct perf_event *aux_event; + /* for AUX area events */ + unsigned int aux_paused; + void (*destroy)(struct perf_event *); struct rcu_head rcu_head; diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index 39c6a250dd1b..437bc2a8d50c 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -507,7 +507,16 @@ struct perf_event_attr { __u16 sample_max_stack; __u16 __reserved_2; __u32 aux_sample_size; - __u32 __reserved_3; + + union { + __u32 aux_output_cfg; + struct { + __u64 aux_pause : 1, /* on overflow, pause AUX area tracing */ + aux_resume : 1, /* on overflow, resume AUX area tracing */ + aux_start_paused : 1, /* start AUX area tracing paused */ + __reserved_3 : 29; + }; + }; /* * User provided data if sigtrap=1, passed back to user via diff --git a/kernel/events/core.c b/kernel/events/core.c index 4c72a41f11af..c1e11884d06e 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -2060,7 +2060,8 @@ static void perf_put_aux_event(struct perf_event *event) static bool perf_need_aux_event(struct perf_event *event) { - return !!event->attr.aux_output || !!event->attr.aux_sample_size; + return event->attr.aux_output || event->attr.aux_sample_size || + event->attr.aux_pause || event->attr.aux_resume; } static int perf_get_aux_event(struct perf_event *event, @@ -2085,6 +2086,10 @@ static int perf_get_aux_event(struct perf_event *event, !perf_aux_output_match(event, group_leader)) return 0; + if ((event->attr.aux_pause || event->attr.aux_resume) && + !(group_leader->pmu->capabilities & PERF_PMU_CAP_AUX_PAUSE)) + return 0; + if (event->attr.aux_sample_size && !group_leader->pmu->snapshot_aux) return 0; @@ -7773,6 +7778,47 @@ void perf_prepare_header(struct perf_event_header *header, WARN_ON_ONCE(header->size & 7); } +static void __perf_event_aux_pause(struct perf_event *event, bool pause) +{ + if (pause) { + if (!READ_ONCE(event->aux_paused)) { + WRITE_ONCE(event->aux_paused, 1); + event->pmu->stop(event, PERF_EF_PAUSE); + } + } else { + if (READ_ONCE(event->aux_paused)) { + WRITE_ONCE(event->aux_paused, 0); + event->pmu->start(event, PERF_EF_RESUME); + } + } +} + +static void perf_event_aux_pause(struct perf_event *event, bool pause) +{ + struct perf_buffer *rb; + unsigned long flags; + + if (WARN_ON_ONCE(!event)) + return; + + rb = ring_buffer_get(event); + if (!rb) + return; + + local_irq_save(flags); + /* Guard against NMI, NMI loses here */ + if (READ_ONCE(rb->aux_in_pause_resume)) + goto out_restore; + WRITE_ONCE(rb->aux_in_pause_resume, 1); + barrier(); + __perf_event_aux_pause(event, pause); + barrier(); + WRITE_ONCE(rb->aux_in_pause_resume, 0); +out_restore: + local_irq_restore(flags); + ring_buffer_put(rb); +} + static __always_inline int __perf_event_output(struct perf_event *event, struct perf_sample_data *data, @@ -7786,6 +7832,9 @@ __perf_event_output(struct perf_event *event, struct perf_event_header header; int err; + if (event->attr.aux_pause) + perf_event_aux_pause(event->aux_event, true); + /* protect the callchain buffers */ rcu_read_lock(); @@ -7802,6 +7851,10 @@ __perf_event_output(struct perf_event *event, exit: rcu_read_unlock(); + + if (event->attr.aux_resume) + perf_event_aux_pause(event->aux_event, false); + return err; } @@ -11941,10 +11994,23 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu, } if (event->attr.aux_output && - !(pmu->capabilities & PERF_PMU_CAP_AUX_OUTPUT)) { + (!(pmu->capabilities & PERF_PMU_CAP_AUX_OUTPUT) || + event->attr.aux_pause || event->attr.aux_resume)) { + err = -EOPNOTSUPP; + goto err_pmu; + } + + if (event->attr.aux_pause && event->attr.aux_resume) { + err = -EINVAL; + goto err_pmu; + } + + if (event->attr.aux_start_paused && + !(pmu->capabilities & PERF_PMU_CAP_AUX_PAUSE)) { err = -EOPNOTSUPP; goto err_pmu; } + event->aux_paused = event->attr.aux_start_paused; if (cgroup_fd != -1) { err = perf_cgroup_connect(cgroup_fd, event, attr, group_leader); @@ -12741,7 +12807,7 @@ perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu, * Grouping is not supported for kernel events, neither is 'AUX', * make sure the caller's intentions are adjusted. */ - if (attr->aux_output) + if (attr->aux_output || attr->aux_output_cfg) return ERR_PTR(-EINVAL); event = perf_event_alloc(attr, cpu, task, NULL, NULL, diff --git a/kernel/events/internal.h b/kernel/events/internal.h index 5150d5f84c03..3320f78117dc 100644 --- a/kernel/events/internal.h +++ b/kernel/events/internal.h @@ -51,6 +51,7 @@ struct perf_buffer { void (*free_aux)(void *); refcount_t aux_refcount; int aux_in_sampling; + int aux_in_pause_resume; void **aux_pages; void *aux_priv; From patchwork Fri Dec 8 17:24:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 175977 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5603695vqy; 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[2620:137:e000::3:4]) by mx.google.com with ESMTPS id y13-20020a056a00190d00b006cd8cddf8c5si1860249pfi.14.2023.12.08.09.26.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:26:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=PKewKbT5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 8A9AF80608DA; Fri, 8 Dec 2023 09:26:23 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1574390AbjLHRZZ (ORCPT + 99 others); Fri, 8 Dec 2023 12:25:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1574474AbjLHRZP (ORCPT ); Fri, 8 Dec 2023 12:25:15 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 683CD10E6; Fri, 8 Dec 2023 09:25:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702056319; x=1733592319; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t6YX0WodqbjyJ5jO9FJZ3AtIO7LVa6j00EG3qTDrAnw=; b=PKewKbT581rYaTYa6rFSxwKSHf1Xbw6bXAc/IZI6NNVyc6EIvAqBfhj6 qlaxM7WA/Q7RXMcecfCZyRk+LdvUG2c+qlg9VT5FbUsPS6VCHQA4tiqHb O9TE1MfKe0P4XpnB626xQV0NzyGA4c6Yw2C0sXYn8jVs2hmyaF6Y2jlci G18CycOerT/0gaoshBc2WX+CGVPxz+YL4YNQZNdwVRk2b5RK29moNAkfn XY/gPM/DVVXLyYkiECQflC1zjR7TTdVQRUAmyin8k9m7bA+C6d2QsVKxS OkYmjFeUOZKZ3G3GouMMSIjkA83W89+NuBdU4Nv0JwuVxWRKxuRVXDv9A w==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="379432410" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="379432410" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="772201616" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="772201616" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.249.34.218]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:12 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH RFC V2 2/4] perf/x86/intel/pt: Add support for pause / resume Date: Fri, 8 Dec 2023 19:24:47 +0200 Message-Id: <20231208172449.35444-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208172449.35444-1-adrian.hunter@intel.com> References: <20231208172449.35444-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:26:23 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784735480370998131 X-GMAIL-MSGID: 1784735480370998131 Prevent tracing to start if aux_paused. Implement support for PERF_EF_PAUSE / PERF_EF_RESUME. When aux_paused, stop tracing. When not aux_paused, only start tracing if it isn't currently meant to be stopped. Signed-off-by: Adrian Hunter --- arch/x86/events/intel/pt.c | 63 ++++++++++++++++++++++++++++++++++++-- arch/x86/events/intel/pt.h | 4 +++ 2 files changed, 64 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 42a55794004a..692b51849d1c 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -418,6 +418,9 @@ static void pt_config_start(struct perf_event *event) struct pt *pt = this_cpu_ptr(&pt_ctx); u64 ctl = event->hw.config; + if (READ_ONCE(event->aux_paused)) + return; + ctl |= RTIT_CTL_TRACEEN; if (READ_ONCE(pt->vmx_on)) perf_aux_output_flag(&pt->handle, PERF_AUX_FLAG_PARTIAL); @@ -534,7 +537,20 @@ static void pt_config(struct perf_event *event) reg |= (event->attr.config & PT_CONFIG_MASK); event->hw.config = reg; + + /* + * Allow resume before starting so as not to overwrite a value set by a + * PMI. + */ + WRITE_ONCE(pt->resume_allowed, 1); + pt_config_start(event); + + /* + * Allow pause after starting so its pt_config_stop() doesn't race with + * pt_config_start(). + */ + WRITE_ONCE(pt->pause_allowed, 1); } static void pt_config_stop(struct perf_event *event) @@ -1507,6 +1523,7 @@ void intel_pt_interrupt(void) buf = perf_aux_output_begin(&pt->handle, event); if (!buf) { event->hw.state = PERF_HES_STOPPED; + pt->resume_allowed = 0; return; } @@ -1515,6 +1532,7 @@ void intel_pt_interrupt(void) ret = pt_buffer_reset_markers(buf, &pt->handle); if (ret) { perf_aux_output_end(&pt->handle, 0); + pt->resume_allowed = 0; return; } @@ -1569,6 +1587,26 @@ static void pt_event_start(struct perf_event *event, int mode) struct pt *pt = this_cpu_ptr(&pt_ctx); struct pt_buffer *buf; + if (mode & PERF_EF_RESUME) { + if (READ_ONCE(pt->resume_allowed)) { + u64 status; + + /* + * Only if the trace is not active and the error and + * stopped bits are clear, is it safe to start, but a + * PMI might have just cleared these, so resume_allowed + * must be checked again also. + */ + rdmsrl(MSR_IA32_RTIT_STATUS, status); + if (!(status & (RTIT_STATUS_TRIGGEREN | + RTIT_STATUS_ERROR | + RTIT_STATUS_STOPPED)) && + READ_ONCE(pt->resume_allowed)) + pt_config_start(event); + } + return; + } + buf = perf_aux_output_begin(&pt->handle, event); if (!buf) goto fail_stop; @@ -1597,6 +1635,16 @@ static void pt_event_stop(struct perf_event *event, int mode) { struct pt *pt = this_cpu_ptr(&pt_ctx); + if (mode & PERF_EF_PAUSE) { + if (READ_ONCE(pt->pause_allowed)) + pt_config_stop(event); + return; + } + + /* Protect against racing */ + WRITE_ONCE(pt->pause_allowed, 0); + WRITE_ONCE(pt->resume_allowed, 0); + /* * Protect against the PMI racing with disabling wrmsr, * see comment in intel_pt_interrupt(). @@ -1655,8 +1703,12 @@ static long pt_event_snapshot_aux(struct perf_event *event, /* * Here, handle_nmi tells us if the tracing is on */ - if (READ_ONCE(pt->handle_nmi)) + if (READ_ONCE(pt->handle_nmi)) { + /* Protect against racing */ + WRITE_ONCE(pt->pause_allowed, 0); + WRITE_ONCE(pt->resume_allowed, 0); pt_config_stop(event); + } pt_read_offset(buf); pt_update_head(pt); @@ -1673,8 +1725,11 @@ static long pt_event_snapshot_aux(struct perf_event *event, * Compiler barrier not needed as we couldn't have been * preempted by anything that touches pt->handle_nmi. */ - if (pt->handle_nmi) + if (pt->handle_nmi) { + WRITE_ONCE(pt->resume_allowed, 1); pt_config_start(event); + WRITE_ONCE(pt->pause_allowed, 1); + } return ret; } @@ -1790,7 +1845,9 @@ static __init int pt_init(void) if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries)) pt_pmu.pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG; - pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE; + pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | + PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_AUX_PAUSE; pt_pmu.pmu.attr_groups = pt_attr_groups; pt_pmu.pmu.task_ctx_nr = perf_sw_context; pt_pmu.pmu.event_init = pt_event_init; diff --git a/arch/x86/events/intel/pt.h b/arch/x86/events/intel/pt.h index 96906a62aacd..b9527205e028 100644 --- a/arch/x86/events/intel/pt.h +++ b/arch/x86/events/intel/pt.h @@ -117,6 +117,8 @@ struct pt_filters { * @filters: last configured filters * @handle_nmi: do handle PT PMI on this cpu, there's an active event * @vmx_on: 1 if VMX is ON on this cpu + * @pause_allowed: PERF_EF_PAUSE is allowed to stop tracing + * @resume_allowed: PERF_EF_RESUME is allowed to start tracing * @output_base: cached RTIT_OUTPUT_BASE MSR value * @output_mask: cached RTIT_OUTPUT_MASK MSR value */ @@ -125,6 +127,8 @@ struct pt { struct pt_filters filters; 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[23.128.96.35]) by mx.google.com with ESMTPS id n10-20020a6563ca000000b005c66240925dsi1869049pgv.546.2023.12.08.09.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:32:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UemSxrsy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id E8A3B826631D; Fri, 8 Dec 2023 09:32:51 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229913AbjLHRck (ORCPT + 99 others); Fri, 8 Dec 2023 12:32:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1574554AbjLHRZo (ORCPT ); Fri, 8 Dec 2023 12:25:44 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9241137; Fri, 8 Dec 2023 09:25:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702056350; x=1733592350; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cAWcAFXcZ6Kpo1E866I0ZngNa4SgwSqIHT6h4WJDGxc=; b=UemSxrsyHWGwZU2jmX1hBUr/Js0GiOZccrxOw0Z6KFycTXs/ID8YWUxV Fxum47WiCExMgyLSP7DllvbFTilksaFUhZg9bfZqK5bv4oePt3Ey8+95V Fb+07qThkUQ07yZY4qkIMpA1I5CkV28+Fr7F8L1WIjCf7hrU+oU8CxNS1 N0ntW2eqmNWMmI548CNaujfp3nwwsf+WCDLpEmSWiFbmIYs5QWZ36i8Ch OuSc9G9Y7f40E14aBBSNez2/cOf4jh8hCz1d1N6I2elhPffCg27r63ys+ /bdN7j3fI62Lnx6H1cMVzG/gKCxqmCJlxDsOcRqFFjix/RosgC+zku0M0 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="379432514" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="379432514" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="772201691" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="772201691" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.249.34.218]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:18 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH RFC V2 3/4] perf tools: Add support for AUX area pause / resume Date: Fri, 8 Dec 2023 19:24:48 +0200 Message-Id: <20231208172449.35444-4-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208172449.35444-1-adrian.hunter@intel.com> References: <20231208172449.35444-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:32:52 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784735888942918367 X-GMAIL-MSGID: 1784735888942918367 Add config terms aux-pause, aux-resume and aux-start-paused. Still to do: validation, fallbacks for perf_event_open, documentation. Signed-off-by: Adrian Hunter --- tools/include/uapi/linux/perf_event.h | 11 +++++++- tools/perf/util/auxtrace.c | 4 +++ tools/perf/util/evsel.c | 9 +++++++ tools/perf/util/evsel_config.h | 6 +++++ tools/perf/util/parse-events.c | 33 +++++++++++++++++++++++ tools/perf/util/parse-events.h | 3 +++ tools/perf/util/parse-events.l | 3 +++ tools/perf/util/perf_event_attr_fprintf.c | 3 +++ 8 files changed, 71 insertions(+), 1 deletion(-) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h index 3a64499b0f5d..9db32bc10d5b 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -511,7 +511,16 @@ struct perf_event_attr { __u16 sample_max_stack; __u16 __reserved_2; __u32 aux_sample_size; - __u32 __reserved_3; + + union { + __u32 aux_output_cfg; + struct { + __u64 aux_pause : 1, /* on overflow, pause AUX area tracing */ + aux_resume : 1, /* on overflow, resume AUX area tracing */ + aux_start_paused : 1, /* start AUX area tracing paused */ + __reserved_3 : 29; + }; + }; /* * User provided data if sigtrap=1, passed back to user via diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c index a0368202a746..4a7ca8b0d100 100644 --- a/tools/perf/util/auxtrace.c +++ b/tools/perf/util/auxtrace.c @@ -814,6 +814,10 @@ void auxtrace_regroup_aux_output(struct evlist *evlist) if (evsel__is_aux_event(evsel)) aux_evsel = evsel; term = evsel__get_config_term(evsel, AUX_OUTPUT); + if (!term) + term = evsel__get_config_term(evsel, AUX_PAUSE); + if (!term) + term = evsel__get_config_term(evsel, AUX_RESUME); /* If possible, group with the AUX event */ if (term && aux_evsel) evlist__regroup(evlist, aux_evsel, evsel); diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c index a5da74e3a517..03553c104954 100644 --- a/tools/perf/util/evsel.c +++ b/tools/perf/util/evsel.c @@ -1001,6 +1001,15 @@ static void evsel__apply_config_terms(struct evsel *evsel, case EVSEL__CONFIG_TERM_AUX_OUTPUT: attr->aux_output = term->val.aux_output ? 1 : 0; break; + case EVSEL__CONFIG_TERM_AUX_PAUSE: + attr->aux_pause = term->val.aux_pause ? 1 : 0; + break; + case EVSEL__CONFIG_TERM_AUX_RESUME: + attr->aux_resume = term->val.aux_resume ? 1 : 0; + break; + case EVSEL__CONFIG_TERM_AUX_START_PAUSED: + attr->aux_start_paused = term->val.aux_start_paused ? 1 : 0; + break; case EVSEL__CONFIG_TERM_AUX_SAMPLE_SIZE: /* Already applied by auxtrace */ break; diff --git a/tools/perf/util/evsel_config.h b/tools/perf/util/evsel_config.h index aee6f808b512..85ad183b5637 100644 --- a/tools/perf/util/evsel_config.h +++ b/tools/perf/util/evsel_config.h @@ -25,6 +25,9 @@ enum evsel_term_type { EVSEL__CONFIG_TERM_BRANCH, EVSEL__CONFIG_TERM_PERCORE, EVSEL__CONFIG_TERM_AUX_OUTPUT, + EVSEL__CONFIG_TERM_AUX_PAUSE, + EVSEL__CONFIG_TERM_AUX_RESUME, + EVSEL__CONFIG_TERM_AUX_START_PAUSED, EVSEL__CONFIG_TERM_AUX_SAMPLE_SIZE, EVSEL__CONFIG_TERM_CFG_CHG, }; @@ -44,6 +47,9 @@ struct evsel_config_term { unsigned long max_events; bool percore; bool aux_output; + bool aux_pause; + bool aux_resume; + bool aux_start_paused; u32 aux_sample_size; u64 cfg_chg; char *str; diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index aa2f5c6fc7fc..615b04d5fb30 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c @@ -768,6 +768,9 @@ static const char *config_term_name(enum parse_events__term_type term_type) [PARSE_EVENTS__TERM_TYPE_DRV_CFG] = "driver-config", [PARSE_EVENTS__TERM_TYPE_PERCORE] = "percore", [PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT] = "aux-output", + [PARSE_EVENTS__TERM_TYPE_AUX_PAUSE] = "aux-pause", + [PARSE_EVENTS__TERM_TYPE_AUX_RESUME] = "aux-resume", + [PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED] = "aux-start-paused", [PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE] = "aux-sample-size", [PARSE_EVENTS__TERM_TYPE_METRIC_ID] = "metric-id", [PARSE_EVENTS__TERM_TYPE_RAW] = "raw", @@ -817,6 +820,9 @@ config_term_avail(enum parse_events__term_type term_type, struct parse_events_er case PARSE_EVENTS__TERM_TYPE_OVERWRITE: case PARSE_EVENTS__TERM_TYPE_DRV_CFG: case PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT: + case PARSE_EVENTS__TERM_TYPE_AUX_PAUSE: + case PARSE_EVENTS__TERM_TYPE_AUX_RESUME: + case PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED: case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE: case PARSE_EVENTS__TERM_TYPE_RAW: case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE: @@ -936,6 +942,15 @@ do { \ case PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT: CHECK_TYPE_VAL(NUM); break; + case PARSE_EVENTS__TERM_TYPE_AUX_PAUSE: + CHECK_TYPE_VAL(NUM); + break; + case PARSE_EVENTS__TERM_TYPE_AUX_RESUME: + CHECK_TYPE_VAL(NUM); + break; + case PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED: + CHECK_TYPE_VAL(NUM); + break; case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE: CHECK_TYPE_VAL(NUM); if (term->val.num > UINT_MAX) { @@ -1036,6 +1051,9 @@ static int config_term_tracepoint(struct perf_event_attr *attr, case PARSE_EVENTS__TERM_TYPE_OVERWRITE: case PARSE_EVENTS__TERM_TYPE_NOOVERWRITE: case PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT: + case PARSE_EVENTS__TERM_TYPE_AUX_PAUSE: + case PARSE_EVENTS__TERM_TYPE_AUX_RESUME: + case PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED: case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE: return config_term_common(attr, term, err); case PARSE_EVENTS__TERM_TYPE_USER: @@ -1170,6 +1188,18 @@ do { \ ADD_CONFIG_TERM_VAL(AUX_OUTPUT, aux_output, term->val.num ? 1 : 0, term->weak); break; + case PARSE_EVENTS__TERM_TYPE_AUX_PAUSE: + ADD_CONFIG_TERM_VAL(AUX_PAUSE, aux_pause, + term->val.num ? 1 : 0, term->weak); + break; + case PARSE_EVENTS__TERM_TYPE_AUX_RESUME: + ADD_CONFIG_TERM_VAL(AUX_RESUME, aux_resume, + term->val.num ? 1 : 0, term->weak); + break; + case PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED: + ADD_CONFIG_TERM_VAL(AUX_START_PAUSED, aux_start_paused, + term->val.num ? 1 : 0, term->weak); + break; case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE: ADD_CONFIG_TERM_VAL(AUX_SAMPLE_SIZE, aux_sample_size, term->val.num, term->weak); @@ -1232,6 +1262,9 @@ static int get_config_chgs(struct perf_pmu *pmu, struct parse_events_terms *head case PARSE_EVENTS__TERM_TYPE_DRV_CFG: case PARSE_EVENTS__TERM_TYPE_PERCORE: case PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT: + case PARSE_EVENTS__TERM_TYPE_AUX_PAUSE: + case PARSE_EVENTS__TERM_TYPE_AUX_RESUME: + case PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED: case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE: case PARSE_EVENTS__TERM_TYPE_METRIC_ID: case PARSE_EVENTS__TERM_TYPE_RAW: diff --git a/tools/perf/util/parse-events.h b/tools/perf/util/parse-events.h index 63c0a36a4bf1..ff0871385b50 100644 --- a/tools/perf/util/parse-events.h +++ b/tools/perf/util/parse-events.h @@ -74,6 +74,9 @@ enum parse_events__term_type { PARSE_EVENTS__TERM_TYPE_DRV_CFG, PARSE_EVENTS__TERM_TYPE_PERCORE, PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT, + PARSE_EVENTS__TERM_TYPE_AUX_PAUSE, + PARSE_EVENTS__TERM_TYPE_AUX_RESUME, + PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED, PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE, PARSE_EVENTS__TERM_TYPE_METRIC_ID, PARSE_EVENTS__TERM_TYPE_RAW, diff --git a/tools/perf/util/parse-events.l b/tools/perf/util/parse-events.l index e86c45675e1d..56963013c3af 100644 --- a/tools/perf/util/parse-events.l +++ b/tools/perf/util/parse-events.l @@ -244,6 +244,9 @@ overwrite { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_OVERWRITE); } no-overwrite { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_NOOVERWRITE); } percore { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_PERCORE); } aux-output { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT); } +aux-pause { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_PAUSE); } +aux-resume { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_RESUME); } +aux-start-paused { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_START_PAUSED); } aux-sample-size { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE); } metric-id { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_METRIC_ID); } cpu-cycles|cycles { return hw_term(yyscanner, PERF_COUNT_HW_CPU_CYCLES); } diff --git a/tools/perf/util/perf_event_attr_fprintf.c b/tools/perf/util/perf_event_attr_fprintf.c index 8f04d3b7f3ec..e6ba0ac73182 100644 --- a/tools/perf/util/perf_event_attr_fprintf.c +++ b/tools/perf/util/perf_event_attr_fprintf.c @@ -309,6 +309,7 @@ int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr, PRINT_ATTRf(inherit_thread, p_unsigned); PRINT_ATTRf(remove_on_exec, p_unsigned); PRINT_ATTRf(sigtrap, p_unsigned); + PRINT_ATTRf(aux_start_paused, p_unsigned); PRINT_ATTRn("{ wakeup_events, wakeup_watermark }", wakeup_events, p_unsigned, false); PRINT_ATTRf(bp_type, p_unsigned); @@ -323,6 +324,8 @@ int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr, PRINT_ATTRf(sample_max_stack, p_unsigned); PRINT_ATTRf(aux_sample_size, p_unsigned); PRINT_ATTRf(sig_data, p_unsigned); + PRINT_ATTRf(aux_pause, p_unsigned); + PRINT_ATTRf(aux_resume, p_unsigned); return ret; } From patchwork Fri Dec 8 17:24:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 175979 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5607864vqy; Fri, 8 Dec 2023 09:33:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IFrF+iQ7QzRu1ImxsvW7FduJ9WzNbH9JywScOTdoAkwsjjcwFtoZD9E9/EwSPnDyQ0oZpxC X-Received: by 2002:a05:6a20:3d1e:b0:18f:d144:2636 with SMTP id y30-20020a056a203d1e00b0018fd1442636mr397793pzi.59.1702056784592; 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[23.128.96.33]) by mx.google.com with ESMTPS id b23-20020a656697000000b005c65f10c20bsi1825167pgw.288.2023.12.08.09.33.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 09:33:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fTlEJ7Cp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id E143381DDD38; Fri, 8 Dec 2023 09:33:01 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233537AbjLHRcn (ORCPT + 99 others); Fri, 8 Dec 2023 12:32:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1574557AbjLHRZp (ORCPT ); Fri, 8 Dec 2023 12:25:45 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFFF610E3; Fri, 8 Dec 2023 09:25:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702056351; x=1733592351; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KmdBc3HWqTwUasM7vZjbBzM2mrzmquHQNOkk6b78KiY=; b=fTlEJ7CpPbxGXy9gUyjriiXVFqrH35Mx6lGLKRFEXFJzxb4hKRCh1e8x +aHm3N+hIawSiL5yC4VwhqSsr6Z9BW9d/FR4iXMUq26Ppsa0R+Zn8SfhN PlXOGhczzk/DhNc2NrtnOleLdH/lXFi9BZoRSyKZWUCuFD7A4uGF4jg7C yYMEVWdHx+Mek/HzkDWSvTcSvt4nG2lj4zNaATYKzR4gej1eOp1I2p413 fYSU+BnBSrn9cRPf0bUklnFJ+5ewMRk8RcWNTNskdwjMi2Txtg/E0In+f jITeAXzih4RABDheVCr/QFFDUbNIJhsBzWwB/miG75HvgsAnBymoT/L7c w==; X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="379432530" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="379432530" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10918"; a="772201694" X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="772201694" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.249.34.218]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 09:25:27 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH RFC V2 4/4] coresight: Have a stab at support for pause / resume Date: Fri, 8 Dec 2023 19:24:49 +0200 Message-Id: <20231208172449.35444-5-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208172449.35444-1-adrian.hunter@intel.com> References: <20231208172449.35444-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 08 Dec 2023 09:33:02 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784735895260458979 X-GMAIL-MSGID: 1784735895260458979 For discussion only, un-tested, not even compiled... Signed-off-by: Adrian Hunter --- .../hwtracing/coresight/coresight-etm-perf.c | 29 ++++++++++++++++--- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 5ca6278baff4..36e774405c51 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -45,6 +45,7 @@ static bool etm_perf_up; struct etm_ctxt { struct perf_output_handle handle; struct etm_event_data *event_data; + int pr_allowed; }; static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt); @@ -452,6 +453,13 @@ static void etm_event_start(struct perf_event *event, int flags) struct list_head *path; u64 hw_id; + if (mode & PERF_EF_RESUME) { + if (!READ_ONCE(ctxt->pr_allowed)) + return; + } else if (READ_ONCE(event->aux_paused)) { + goto out_pr_allowed; + } + if (!csdev) goto fail; @@ -514,6 +522,8 @@ static void etm_event_start(struct perf_event *event, int flags) event->hw.state = 0; /* Save the event_data for this ETM */ ctxt->event_data = event_data; +out_pr_allowed: + WRITE_ONCE(ctxt->pr_allowed, 1); return; fail_disable_path: @@ -530,6 +540,7 @@ static void etm_event_start(struct perf_event *event, int flags) } fail: event->hw.state = PERF_HES_STOPPED; + WRITE_ONCE(ctxt->pr_allowed, 0); return; } @@ -543,6 +554,11 @@ static void etm_event_stop(struct perf_event *event, int mode) struct etm_event_data *event_data; struct list_head *path; + if (mode & PERF_EF_PAUSE && !READ_ONCE(ctxt->pr_allowed)) + return; + + WRITE_ONCE(ctxt->pr_allowed, 0); + /* * If we still have access to the event_data via handle, * confirm that we haven't messed up the tracking. @@ -556,7 +572,7 @@ static void etm_event_stop(struct perf_event *event, int mode) ctxt->event_data = NULL; if (event->hw.state == PERF_HES_STOPPED) - return; + goto out_pr_allowed; /* We must have a valid event_data for a running event */ if (WARN_ON(!event_data)) @@ -627,6 +643,10 @@ static void etm_event_stop(struct perf_event *event, int mode) /* Disabling the path make its elements available to other sessions */ coresight_disable_path(path); + +out_pr_allowed: + if (mode & PERF_EF_PAUSE) + WRITE_ONCE(ctxt->pr_allowed, 1); } static int etm_event_add(struct perf_event *event, int mode) @@ -634,7 +654,7 @@ static int etm_event_add(struct perf_event *event, int mode) int ret = 0; struct hw_perf_event *hwc = &event->hw; - if (mode & PERF_EF_START) { + if (mode & PERF_EF_START && !READ_ONCE(event->aux_paused)) { etm_event_start(event, 0); if (hwc->state & PERF_HES_STOPPED) ret = -EINVAL; @@ -886,8 +906,9 @@ int __init etm_perf_init(void) { int ret; - etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE | - PERF_PMU_CAP_ITRACE); + etm_pmu.capabilities = PERF_PMU_CAP_EXCLUSIVE | + PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_AUX_PAUSE; etm_pmu.attr_groups = etm_pmu_attr_groups; etm_pmu.task_ctx_nr = perf_sw_context;